517 	div = port->uartclk / baud;  in max310x_set_baud()
536 		frac = (16*(port->uartclk % F)) / F;  in max310x_set_baud()
545 	return (16*port->uartclk) / (c*(16*div + frac));  in max310x_set_baud()
1005 				  port->uartclk / 16 / 0xffff,  in max310x_set_termios()
1006 				  port->uartclk / 4);  in max310x_set_termios()
1273 	s32 uartclk = 0;  in max310x_probe()  local
1286 	device_property_read_u32(dev, "clock-frequency", &uartclk);  in max310x_probe()
1302 		freq = uartclk;  in max310x_probe()
1359 	uartclk = max310x_set_ref_clk(dev, s, freq, xtal);  in max310x_probe()
1360 	if (uartclk < 0) {  in max310x_probe()
1361 		ret = uartclk;  in max310x_probe()
1365 	dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);  in max310x_probe()
1391 		s->p[i].port.uartclk	= uartclk;  in max310x_probe()