drivers/spi/spi-bcm2835.c

167 static void bcm2835_debugfs_create(struct bcm2835_spi *bs,
178 	bs->debugfs_dir = dir;
182 			   &bs->count_transfer_polling);
184 			   &bs->count_transfer_irq);
186 			   &bs->count_transfer_irq_after_polling);
188 			   &bs->count_transfer_dma);
191 static void bcm2835_debugfs_remove(struct bcm2835_spi *bs)
193 	debugfs_remove_recursive(bs->debugfs_dir);
194 	bs->debugfs_dir = NULL;
197 static void bcm2835_debugfs_create(struct bcm2835_spi *bs,
202 static void bcm2835_debugfs_remove(struct bcm2835_spi *bs)
207 static inline u32 bcm2835_rd(struct bcm2835_spi *bs, unsigned int reg)
209 	return readl(bs->regs + reg);
212 static inline void bcm2835_wr(struct bcm2835_spi *bs, unsigned int reg, u32 val)
214 	writel(val, bs->regs + reg);
217 static inline void bcm2835_rd_fifo(struct bcm2835_spi *bs)
221 	while ((bs->rx_len) &&
222 	       (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_RXD)) {
223 		byte = bcm2835_rd(bs, BCM2835_SPI_FIFO);
224 		if (bs->rx_buf)
225 			*bs->rx_buf++ = byte;
226 		bs->rx_len--;
230 static inline void bcm2835_wr_fifo(struct bcm2835_spi *bs)
234 	while ((bs->tx_len) &&
235 	       (bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_TXD)) {
236 		byte = bs->tx_buf ? *bs->tx_buf++ : 0;
237 		bcm2835_wr(bs, BCM2835_SPI_FIFO, byte);
238 		bs->tx_len--;
244  * @bs: BCM2835 SPI controller
247  * The caller must ensure that @bs->rx_len is greater than or equal to @count,
250  * 32-bit instead of just 8-bit).  Moreover @bs->rx_buf must not be %NULL.
252 static inline void bcm2835_rd_fifo_count(struct bcm2835_spi *bs, int count)
257 	bs->rx_len -= count;
260 		val = bcm2835_rd(bs, BCM2835_SPI_FIFO);
262 		memcpy(bs->rx_buf, &val, len);
263 		bs->rx_buf += len;
270  * @bs: BCM2835 SPI controller
273  * The caller must ensure that @bs->tx_len is greater than or equal to @count,
278 static inline void bcm2835_wr_fifo_count(struct bcm2835_spi *bs, int count)
283 	bs->tx_len -= count;
286 		if (bs->tx_buf) {
288 			memcpy(&val, bs->tx_buf, len);
289 			bs->tx_buf += len;
293 		bcm2835_wr(bs, BCM2835_SPI_FIFO, val);
300  * @bs: BCM2835 SPI controller
306 static inline void bcm2835_wait_tx_fifo_empty(struct bcm2835_spi *bs)
308 	while (!(bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_DONE))
314  * @bs: BCM2835 SPI controller
317 static inline void bcm2835_rd_fifo_blind(struct bcm2835_spi *bs, int count)
321 	count = min(count, bs->rx_len);
322 	bs->rx_len -= count;
325 		val = bcm2835_rd(bs, BCM2835_SPI_FIFO);
326 		if (bs->rx_buf)
327 			*bs->rx_buf++ = val;
333  * @bs: BCM2835 SPI controller
336 static inline void bcm2835_wr_fifo_blind(struct bcm2835_spi *bs, int count)
340 	count = min(count, bs->tx_len);
341 	bs->tx_len -= count;
344 		val = bs->tx_buf ? *bs->tx_buf++ : 0;
345 		bcm2835_wr(bs, BCM2835_SPI_FIFO, val);
349 static void bcm2835_spi_reset_hw(struct bcm2835_spi *bs)
351 	u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
369 	bcm2835_wr(bs, BCM2835_SPI_CS, cs);
371 	bcm2835_wr(bs, BCM2835_SPI_DLEN, 0);
376 	struct bcm2835_spi *bs = dev_id;
377 	u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
388 		bcm2835_rd_fifo_blind(bs, BCM2835_SPI_FIFO_SIZE);
390 		bcm2835_rd_fifo_blind(bs, BCM2835_SPI_FIFO_SIZE_3_4);
392 	if (bs->tx_len && cs & BCM2835_SPI_CS_DONE)
393 		bcm2835_wr_fifo_blind(bs, BCM2835_SPI_FIFO_SIZE);
396 	bcm2835_rd_fifo(bs);
398 	bcm2835_wr_fifo(bs);
400 	if (!bs->rx_len) {
402 		bcm2835_spi_reset_hw(bs);
404 		spi_finalize_current_transfer(bs->ctlr);
415 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
418 	bs->count_transfer_irq++;
424 	bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);
428 		bcm2835_wr_fifo_blind(bs, BCM2835_SPI_FIFO_SIZE);
429 	bcm2835_wr_fifo(bs);
433 	bcm2835_wr(bs, BCM2835_SPI_CS, cs);
443  * @bs: BCM2835 SPI controller
487 					  struct bcm2835_spi *bs,
492 	bs->tfr		 = tfr;
493 	bs->tx_prologue  = 0;
494 	bs->rx_prologue  = 0;
495 	bs->tx_spillover = false;
497 	if (bs->tx_buf && !sg_is_last(&tfr->tx_sg.sgl[0]))
498 		bs->tx_prologue = sg_dma_len(&tfr->tx_sg.sgl[0]) & 3;
500 	if (bs->rx_buf && !sg_is_last(&tfr->rx_sg.sgl[0])) {
501 		bs->rx_prologue = sg_dma_len(&tfr->rx_sg.sgl[0]) & 3;
503 		if (bs->rx_prologue > bs->tx_prologue) {
504 			if (!bs->tx_buf || sg_is_last(&tfr->tx_sg.sgl[0])) {
505 				bs->tx_prologue  = bs->rx_prologue;
507 				bs->tx_prologue += 4;
508 				bs->tx_spillover =
515 	if (!bs->tx_prologue)
519 	if (bs->rx_prologue) {
520 		bcm2835_wr(bs, BCM2835_SPI_DLEN, bs->rx_prologue);
521 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA
523 		bcm2835_wr_fifo_count(bs, bs->rx_prologue);
524 		bcm2835_wait_tx_fifo_empty(bs);
525 		bcm2835_rd_fifo_count(bs, bs->rx_prologue);
526 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_RX
532 					   bs->rx_prologue, DMA_FROM_DEVICE);
534 		sg_dma_address(&tfr->rx_sg.sgl[0]) += bs->rx_prologue;
535 		sg_dma_len(&tfr->rx_sg.sgl[0])     -= bs->rx_prologue;
538 	if (!bs->tx_buf)
545 	tx_remaining = bs->tx_prologue - bs->rx_prologue;
547 		bcm2835_wr(bs, BCM2835_SPI_DLEN, tx_remaining);
548 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA
550 		bcm2835_wr_fifo_count(bs, tx_remaining);
551 		bcm2835_wait_tx_fifo_empty(bs);
552 		bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_CLEAR_TX
556 	if (likely(!bs->tx_spillover)) {
557 		sg_dma_address(&tfr->tx_sg.sgl[0]) += bs->tx_prologue;
558 		sg_dma_len(&tfr->tx_sg.sgl[0])     -= bs->tx_prologue;
568  * @bs: BCM2835 SPI controller
574 static void bcm2835_spi_undo_prologue(struct bcm2835_spi *bs)
576 	struct spi_transfer *tfr = bs->tfr;
578 	if (!bs->tx_prologue)
581 	if (bs->rx_prologue) {
582 		sg_dma_address(&tfr->rx_sg.sgl[0]) -= bs->rx_prologue;
583 		sg_dma_len(&tfr->rx_sg.sgl[0])     += bs->rx_prologue;
586 	if (!bs->tx_buf)
589 	if (likely(!bs->tx_spillover)) {
590 		sg_dma_address(&tfr->tx_sg.sgl[0]) -= bs->tx_prologue;
591 		sg_dma_len(&tfr->tx_sg.sgl[0])     += bs->tx_prologue;
593 		sg_dma_len(&tfr->tx_sg.sgl[0])      = bs->tx_prologue - 4;
598 	bs->tx_prologue = 0;
610 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
618 	bs->tx_dma_active = false;
619 	bs->rx_dma_active = false;
620 	bcm2835_spi_undo_prologue(bs);
623 	bcm2835_spi_reset_hw(bs);
638 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
641 	while (!(bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_DONE))
642 		bcm2835_wr(bs, BCM2835_SPI_CS, bs->target->clear_rx_cs);
644 	bs->tx_dma_active = false;
652 	if (cmpxchg(&bs->rx_dma_active, true, false))
655 	bcm2835_spi_undo_prologue(bs);
656 	bcm2835_spi_reset_hw(bs);
664  * @bs: BCM2835 SPI controller
673 				  struct bcm2835_spi *bs,
714 		bs->target = target;
775 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
780 	bs->count_transfer_dma++;
786 	bcm2835_spi_transfer_prologue(ctlr, tfr, bs, cs);
789 	if (bs->tx_buf) {
790 		ret = bcm2835_spi_prepare_sg(ctlr, tfr, bs, target, true);
792 		cookie = dmaengine_submit(bs->fill_tx_desc);
799 	bcm2835_wr(bs, BCM2835_SPI_DLEN, bs->tx_len);
802 	bcm2835_wr(bs, BCM2835_SPI_CS,
805 	bs->tx_dma_active = true;
815 	if (bs->rx_buf) {
816 		ret = bcm2835_spi_prepare_sg(ctlr, tfr, bs, target, false);
824 		bs->tx_dma_active = false;
830 	bs->rx_dma_active = true;
837 	if (!bs->rx_buf && !bs->tx_dma_active &&
838 	    cmpxchg(&bs->rx_dma_active, true, false)) {
840 		bcm2835_spi_reset_hw(bs);
847 	bcm2835_spi_reset_hw(bs);
848 	bcm2835_spi_undo_prologue(bs);
865 				struct bcm2835_spi *bs)
870 		if (bs->fill_tx_desc)
871 			dmaengine_desc_free(bs->fill_tx_desc);
873 		if (bs->fill_tx_addr)
875 					     bs->fill_tx_addr, sizeof(u32),
891 			    struct bcm2835_spi *bs)
935 	bs->fill_tx_addr = dma_map_page_attrs(ctlr->dma_tx->device->dev,
939 	if (dma_mapping_error(ctlr->dma_tx->device->dev, bs->fill_tx_addr)) {
941 		bs->fill_tx_addr = 0;
946 	bs->fill_tx_desc = dmaengine_prep_dma_cyclic(ctlr->dma_tx,
947 						     bs->fill_tx_addr,
950 	if (!bs->fill_tx_desc) {
956 	ret = dmaengine_desc_set_reuse(bs->fill_tx_desc);
985 	bcm2835_dma_release(ctlr, bs);
1002 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1006 	bs->count_transfer_polling++;
1009 	bcm2835_wr(bs, BCM2835_SPI_CS, cs | BCM2835_SPI_CS_TA);
1015 	bcm2835_wr_fifo_blind(bs, BCM2835_SPI_FIFO_SIZE);
1021 	while (bs->rx_len) {
1023 		bcm2835_wr_fifo(bs);
1026 		bcm2835_rd_fifo(bs);
1031 		if (bs->rx_len && time_after(jiffies, timeout)) {
1035 					    bs->tx_len, bs->rx_len);
1039 			bs->count_transfer_irq_after_polling++;
1047 	bcm2835_spi_reset_hw(bs);
1056 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1065 	if (spi_hz >= bs->clk_hz / 2) {
1069 		cdiv = DIV_ROUND_UP(bs->clk_hz, spi_hz);
1077 	tfr->effective_speed_hz = cdiv ? (bs->clk_hz / cdiv) : (bs->clk_hz / 65536);
1078 	bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
1085 	bs->tx_buf = tfr->tx_buf;
1086 	bs->rx_buf = tfr->rx_buf;
1087 	bs->tx_len = tfr->len;
1088 	bs->rx_len = tfr->len;
1118 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1125 	bcm2835_wr(bs, BCM2835_SPI_CS, target->prepare_cs);
1133 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1138 		bs->tx_dma_active = false;
1142 		bs->rx_dma_active = false;
1144 	bcm2835_spi_undo_prologue(bs);
1147 	bcm2835_spi_reset_hw(bs);
1154 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1165 	if (!IS_ERR(bs->cs_gpio))
1166 		gpiod_put(bs->cs_gpio);
1174 				 struct bcm2835_spi *bs,
1226 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1245 		ret = bcm2835_spi_setup_dma(ctlr, spi, bs, target);
1329 	bs->cs_gpio = gpiod_get(&spi->dev, "cs", GPIOD_OUT_LOW);
1331 	if (IS_ERR(bs->cs_gpio)) {
1332 		ret = PTR_ERR(bs->cs_gpio);
1336 	spi_set_csgpiod(spi, 0, bs->cs_gpio);
1352 	struct bcm2835_spi *bs;
1355 	ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*bs));
1373 	bs = spi_controller_get_devdata(ctlr);
1374 	bs->ctlr = ctlr;
1376 	bs->regs = devm_platform_ioremap_resource(pdev, 0);
1377 	if (IS_ERR(bs->regs))
1378 		return PTR_ERR(bs->regs);
1380 	bs->clk = devm_clk_get_enabled(&pdev->dev, NULL);
1381 	if (IS_ERR(bs->clk))
1382 		return dev_err_probe(&pdev->dev, PTR_ERR(bs->clk),
1385 	ctlr->max_speed_hz = clk_get_rate(bs->clk) / 2;
1387 	bs->irq = platform_get_irq(pdev, 0);
1388 	if (bs->irq < 0)
1389 		return bs->irq;
1391 	bs->clk_hz = clk_get_rate(bs->clk);
1393 	err = bcm2835_dma_init(ctlr, &pdev->dev, bs);
1398 	bcm2835_wr(bs, BCM2835_SPI_CS,
1401 	err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt,
1402 			       IRQF_SHARED, dev_name(&pdev->dev), bs);
1415 	bcm2835_debugfs_create(bs, dev_name(&pdev->dev));
1420 	bcm2835_dma_release(ctlr, bs);
1427 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1429 	bcm2835_debugfs_remove(bs);
1433 	bcm2835_dma_release(ctlr, bs);
1436 	bcm2835_wr(bs, BCM2835_SPI_CS,