Lines Matching defs:sp
49 static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned int reg)
51 return ioread32(sp->base + reg);
54 static inline void ath79_spi_wr(struct ath79_spi *sp, unsigned int reg, u32 val)
56 iowrite32(val, sp->base + reg);
64 static inline void ath79_spi_delay(struct ath79_spi *sp, unsigned int nsecs)
66 if (nsecs > sp->rrw_delay)
67 ndelay(nsecs - sp->rrw_delay);
72 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
77 sp->ioc_base |= cs_bit;
79 sp->ioc_base &= ~cs_bit;
81 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
84 static void ath79_spi_enable(struct ath79_spi *sp)
87 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
90 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
91 sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
94 sp->ioc_base &= ~(AR71XX_SPI_IOC_DO | AR71XX_SPI_IOC_CLK);
97 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
100 static void ath79_spi_disable(struct ath79_spi *sp)
103 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
105 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
111 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
112 u32 ioc = sp->ioc_base;
124 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
125 ath79_spi_delay(sp, nsecs);
126 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
127 ath79_spi_delay(sp, nsecs);
129 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
134 return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
140 struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi);
152 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
154 memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes);
157 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
160 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
172 struct ath79_spi *sp;
176 host = spi_alloc_host(&pdev->dev, sizeof(*sp));
182 sp = spi_controller_get_devdata(host);
184 platform_set_drvdata(pdev, sp);
192 sp->bitbang.ctlr = host;
193 sp->bitbang.chipselect = ath79_spi_chipselect;
194 sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
195 sp->bitbang.flags = SPI_CS_HIGH;
197 sp->base = devm_platform_ioremap_resource(pdev, 0);
198 if (IS_ERR(sp->base)) {
199 ret = PTR_ERR(sp->base);
203 sp->clk = devm_clk_get_enabled(&pdev->dev, "ahb");
204 if (IS_ERR(sp->clk)) {
205 ret = PTR_ERR(sp->clk);
209 rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ);
215 sp->rrw_delay = ATH79_SPI_RRW_DELAY_FACTOR / rate;
217 sp->rrw_delay);
219 ath79_spi_enable(sp);
220 ret = spi_bitbang_start(&sp->bitbang);
227 ath79_spi_disable(sp);
236 struct ath79_spi *sp = platform_get_drvdata(pdev);
238 spi_bitbang_stop(&sp->bitbang);
239 ath79_spi_disable(sp);
240 spi_controller_put(sp->bitbang.ctlr);