1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2021-2025, NVIDIA CORPORATION. All rights reserved
25 #include <soc/tegra/tegra-cbb.h>
190 	if (!cbb->fabric->firewall_base ||  in tegra234_cbb_write_access_allowed()
191 	    !cbb->fabric->firewall_ctl ||  in tegra234_cbb_write_access_allowed()
192 	    !cbb->fabric->firewall_wr_ctl) {  in tegra234_cbb_write_access_allowed()
193 		dev_info(&pdev->dev, "SoC data missing for firewall\n");  in tegra234_cbb_write_access_allowed()
197 	if ((cbb->fabric->firewall_ctl > FIREWALL_APERTURE_SZ) ||  in tegra234_cbb_write_access_allowed()
198 	    (cbb->fabric->firewall_wr_ctl > FIREWALL_APERTURE_SZ)) {  in tegra234_cbb_write_access_allowed()
199 		dev_err(&pdev->dev, "wrong firewall offset value\n");  in tegra234_cbb_write_access_allowed()
203 	val = readl(cbb->regs + cbb->fabric->firewall_base + cbb->fabric->firewall_ctl);  in tegra234_cbb_write_access_allowed()
207 	 * then CCPLEX can write to the registers of that fabric.  in tegra234_cbb_write_access_allowed()
213 	 * If the firewall check is enabled then check whether CCPLEX  in tegra234_cbb_write_access_allowed()
216 	val = readl(cbb->regs + cbb->fabric->firewall_base + cbb->fabric->firewall_wr_ctl);  in tegra234_cbb_write_access_allowed()
228 	addr = priv->regs + priv->fabric->notifier_offset;  in tegra234_cbb_fault_enable()
229 	writel(priv->fabric->err_intr_enbl, addr + FABRIC_EN_CFG_INTERRUPT_ENABLE_0_0);  in tegra234_cbb_fault_enable()
237 	writel(0, priv->mon + FABRIC_MN_INITIATOR_ERR_FORCE_0);  in tegra234_cbb_error_clear()
239 	writel(priv->fabric->err_status_clr, priv->mon + FABRIC_MN_INITIATOR_ERR_STATUS_0);  in tegra234_cbb_error_clear()
249 	addr = priv->regs + priv->fabric->notifier_offset;  in tegra234_cbb_get_status()
258 	writel(0x1, cbb->regs + cbb->fabric->off_mask_erd);  in tegra234_cbb_mask_serror()
319 	const struct tegra234_target_lookup *map = cbb->fabric->fab_list[fab_id].target_map;  in tegra234_sw_lookup_target_timeout()
322 	if (target_id >= cbb->fabric->fab_list[fab_id].max_targets) {  in tegra234_sw_lookup_target_timeout()
337 	 *	   <FABRIC>_SN_AXI2APB_<>_BLOCK<index-set-bit>_TMO_0.  in tegra234_sw_lookup_target_timeout()
341 	 *	e) Goto step-a till all bits are set.  in tegra234_sw_lookup_target_timeout()
344 	addr = cbb->regs + map[target_id].offset;  in tegra234_sw_lookup_target_timeout()
367 	unsigned int notifier = cbb->fabric->notifier_offset;  in tegra234_hw_lookup_target_timeout()
371 	writel(target_id, cbb->regs + notifier + FABRIC_EN_CFG_TARGET_NODE_ADDR_INDEX_0_0);  in tegra234_hw_lookup_target_timeout()
373 	hi = readl(cbb->regs + notifier + FABRIC_EN_CFG_TARGET_NODE_ADDR_HI_0);  in tegra234_hw_lookup_target_timeout()
374 	lo = readl(cbb->regs + notifier + FABRIC_EN_CFG_TARGET_NODE_ADDR_LOW_0);  in tegra234_hw_lookup_target_timeout()
386 	if (status & (status - 1))  in tegra234_cbb_print_error()
390 		if (type >= cbb->fabric->max_errors) {  in tegra234_cbb_print_error()
398 					    cbb->fabric->errors[type].code);  in tegra234_cbb_print_error()
407 		if (type >= cbb->fabric->max_errors) {  in tegra234_cbb_print_error()
415 					    cbb->fabric->errors[type].code);  in tegra234_cbb_print_error()
432 	mstr_id = FIELD_GET(FAB_EM_EL_MSTRID, cbb->mn_user_bits);  in print_errlog_err()
433 	vqc = FIELD_GET(FAB_EM_EL_VQC, cbb->mn_user_bits);  in print_errlog_err()
434 	grpsec = FIELD_GET(FAB_EM_EL_GRPSEC, cbb->mn_user_bits);  in print_errlog_err()
435 	falconsec = FIELD_GET(FAB_EM_EL_FALCONSEC, cbb->mn_user_bits);  in print_errlog_err()
439 	 * errors only if initiator_id is CCPLEX, CPMU or GPU.  in print_errlog_err()
443 		requester_socket_id = FIELD_GET(REQ_SOCKET_ID, cbb->mn_attr2);  in print_errlog_err()
451 	fab_id = FIELD_GET(FAB_EM_EL_FABID, cbb->mn_attr2);  in print_errlog_err()
452 	target_id = FIELD_GET(FAB_EM_EL_TARGETID, cbb->mn_attr2);  in print_errlog_err()
454 	access_id = FIELD_GET(FAB_EM_EL_ACCESSID, cbb->mn_attr1);  in print_errlog_err()
456 	cache_type = FIELD_GET(FAB_EM_EL_AXCACHE, cbb->mn_attr0);  in print_errlog_err()
457 	prot_type = FIELD_GET(FAB_EM_EL_AXPROT, cbb->mn_attr0);  in print_errlog_err()
458 	burst_length = FIELD_GET(FAB_EM_EL_BURSTLENGTH, cbb->mn_attr0);  in print_errlog_err()
459 	burst_type = FIELD_GET(FAB_EM_EL_BURSTTYPE, cbb->mn_attr0);  in print_errlog_err()
460 	beat_size = FIELD_GET(FAB_EM_EL_BEATSIZE, cbb->mn_attr0);  in print_errlog_err()
461 	access_type = FIELD_GET(FAB_EM_EL_ACCESSTYPE, cbb->mn_attr0);  in print_errlog_err()
464 	if (cbb->type < cbb->fabric->max_errors)  in print_errlog_err()
466 				    cbb->fabric->errors[cbb->type].code);  in print_errlog_err()
468 		tegra_cbb_print_err(file, "\t  Wrong type index:%u\n", cbb->type);  in print_errlog_err()
471 	if (cbb->fabric->initiator_id)  in print_errlog_err()
473 				    cbb->fabric->initiator_id[mstr_id]);  in print_errlog_err()
475 	tegra_cbb_print_err(file, "\t  Address\t\t: %#llx\n", cbb->access);  in print_errlog_err()
493 			    cbb->fabric->fab_list[fab_id].name, fab_id);  in print_errlog_err()
502 				    cbb->fabric->fab_list[T264_AON_FABRIC_ID].name);  in print_errlog_err()
514 	if (!cbb->fabric->fab_list[fab_id].is_lookup)  in print_errlog_err()
523 	if (!strcmp(cbb->fabric->errors[cbb->type].code, "TIMEOUT_ERR")) {  in print_errlog_err()
524 		if (cbb->fabric->fab_list[fab_id].max_targets)  in print_errlog_err()
537 	status = readl(cbb->mon + FABRIC_MN_INITIATOR_ERR_STATUS_0);  in print_errmonX_info()
540 		return -ENODATA;  in print_errmonX_info()
545 		return -EINVAL;  in print_errmonX_info()
548 	overflow = readl(cbb->mon + FABRIC_MN_INITIATOR_ERR_OVERFLOW_STATUS_0);  in print_errmonX_info()
552 	error = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ERR_STATUS_0);  in print_errmonX_info()
555 		return -EINVAL;  in print_errmonX_info()
558 	cbb->type = 0;  in print_errmonX_info()
564 			hi = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ADDR_HIGH_0);  in print_errmonX_info()
565 			lo = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ADDR_LOW_0);  in print_errmonX_info()
567 			cbb->access = (u64)hi << 32 | lo;  in print_errmonX_info()
569 			cbb->mn_attr0 = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ATTRIBUTES0_0);  in print_errmonX_info()
570 			cbb->mn_attr1 = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ATTRIBUTES1_0);  in print_errmonX_info()
571 			cbb->mn_attr2 = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ATTRIBUTES2_0);  in print_errmonX_info()
572 			cbb->mn_user_bits = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_USER_BITS0_0);  in print_errmonX_info()
577 		cbb->type++;  in print_errmonX_info()
591 		cbb->fabric->fab_list[cbb->fabric->fab_id].name, status);  in print_err_notifier()
595 			unsigned int notifier = cbb->fabric->notifier_offset;  in print_err_notifier()
600 			writel(mask, cbb->regs + notifier + FABRIC_EN_CFG_ADDR_INDEX_0_0);  in print_err_notifier()
601 			hi = readl(cbb->regs + notifier + FABRIC_EN_CFG_ADDR_HI_0);  in print_err_notifier()
602 			lo = readl(cbb->regs + notifier + FABRIC_EN_CFG_ADDR_LOW_0);  in print_err_notifier()
606 			offset = addr - cbb->res->start;  in print_err_notifier()
607 			cbb->mon = cbb->regs + offset;  in print_err_notifier()
608 			cbb->mask = BIT(index);  in print_err_notifier()
611 			tegra234_cbb_error_clear(&cbb->base);  in print_err_notifier()
637 		status = tegra_cbb_get_status(&priv->base);  in tegra234_cbb_debugfs_show()
667 		if (status && (irq == priv->sec_irq)) {  in tegra234_cbb_isr()
670 					    priv->fabric->fab_list[priv->fabric->fab_id].name,  in tegra234_cbb_isr()
671 					    priv->res->start, irq);  in tegra234_cbb_isr()
678 			 * If illegal request is from CCPLEX(id:0x1) initiator then call WARN()  in tegra234_cbb_isr()
680 			if (priv->fabric->off_mask_erd) {  in tegra234_cbb_isr()
681 				mstr_id =  FIELD_GET(USRBITS_MSTR_ID, priv->mn_user_bits);  in tegra234_cbb_isr()
701 	if (priv->sec_irq) {  in tegra234_cbb_interrupt_enable()
702 		int err = devm_request_irq(cbb->dev, priv->sec_irq, tegra234_cbb_isr, 0,  in tegra234_cbb_interrupt_enable()
703 					   dev_name(cbb->dev), priv);  in tegra234_cbb_interrupt_enable()
705 			dev_err(cbb->dev, "failed to register interrupt %u: %d\n", priv->sec_irq,  in tegra234_cbb_interrupt_enable()
732 	[0x01] = "CCPLEX",
870 	[T234_CBB_FABRIC_ID] = { "cbb-fabric", true,
873 	[T234_SCE_FABRIC_ID] = { "sce-fabric", true,
876 	[T234_RCE_FABRIC_ID] = { "rce-fabric", true,
879 	[T234_DCE_FABRIC_ID] = { "dce-fabric", true,
882 	[T234_AON_FABRIC_ID] = { "aon-fabric", true,
885 	[T234_PSC_FABRIC_ID] = { "psc-fabric" },
886 	[T234_BPMP_FABRIC_ID] = { "bpmp-fabric", true,
889 	[T234_FSI_FABRIC_ID] = { "fsi-fabric" },
979 	[0x1] = "CCPLEX",
1151 	{ "CCPLEX",     0x50000 },
1160 	[T234_CBB_FABRIC_ID]  = { "cbb-fabric", true,
1162 	[T234_BPMP_FABRIC_ID] = { "bpmp-fabric", true,
1196 	[0x1] = "CCPLEX",
1346 	[T264_SYSTEM_CBB_FABRIC_ID]   = { "system-cbb-fabric", true,
1349 	[T264_TOP_0_CBB_FABRIC_ID]    = { "top0-cbb-fabric", true,
1352 	[T264_VISION_CBB_FABRIC_ID]   = { "vision-cbb-fabric", true,
1355 	[T264_DISP_USB_CBB_FABRIC_ID] = { "disp-usb-cbb-fabric" },
1356 	[T264_UPHY0_CBB_FABRIC_ID]    = { "uphy0-cbb-fabric", true,
1359 	[T264_AON_FABRIC_ID]          = { "aon-fabric" },
1360 	[T264_PSC_FABRIC_ID]          = { "psc-fabric" },
1361 	[T264_OESP_FABRIC_ID]         = { "oesp-fabric" },
1362 	[T264_APE_FABRIC_ID]          = { "ape-fabirc" },
1363 	[T264_BPMP_FABRIC_ID]         = { "bpmp-fabric" },
1364 	[T264_RCE_0_FABRIC_ID]        = { "rce0-fabric" },
1365 	[T264_RCE_1_FABRIC_ID]        = { "rce1-fabric" },
1366 	[T264_DCE_FABRIC_ID]          = { "dce-fabric" },
1367 	[T264_FSI_FABRIC_ID]          = { "fsi-fabric" },
1368 	[T264_ISC_FABRIC_ID]          = { "isc-fabric" },
1369 	[T264_SB_FABRIC_ID]           = { "sb-fabric" },
1370 	[T264_ISC_CPU_FABRIC_ID]      = { "isc-cpu-fabric" },
1431 	[T254_C2C_FABRIC_ID] = { "c2c-fabric", true },
1432 	[T254_DISP_CLUSTER_FABRIC_ID] = { "display-cluster-fabric", true },
1433 	[T254_GPU_FABRIC_ID] = { "gpu-fabric", true },
1477 	{ .compatible = "nvidia,tegra234-cbb-fabric", .data = &tegra234_cbb_fabric },
1478 	{ .compatible = "nvidia,tegra234-aon-fabric", .data = &tegra234_aon_fabric },
1479 	{ .compatible = "nvidia,tegra234-bpmp-fabric", .data = &tegra234_bpmp_fabric },
1480 	{ .compatible = "nvidia,tegra234-dce-fabric", .data = &tegra234_dce_fabric },
1481 	{ .compatible = "nvidia,tegra234-rce-fabric", .data = &tegra234_rce_fabric },
1482 	{ .compatible = "nvidia,tegra234-sce-fabric", .data = &tegra234_sce_fabric },
1483 	{ .compatible = "nvidia,tegra264-sys-cbb-fabric", .data = &tegra264_sys_cbb_fabric },
1484 	{ .compatible = "nvidia,tegra264-top0-cbb-fabric", .data = &tegra264_top0_cbb_fabric },
1485 	{ .compatible = "nvidia,tegra264-uphy0-cbb-fabric", .data = &tegra264_uphy0_cbb_fabric },
1486 	{ .compatible = "nvidia,tegra264-vision-cbb-fabric", .data = &tegra264_vision_cbb_fabric },
1511 	for (entry = tegra234_cbb_acpi_uids; entry->hid; entry++) {  in tegra234_cbb_acpi_get_fabric()
1512 		if (acpi_dev_hid_uid_match(adev, entry->hid, entry->uid))  in tegra234_cbb_acpi_get_fabric()
1513 			return entry->fabric;  in tegra234_cbb_acpi_get_fabric()
1532 	if (pdev->dev.of_node) {  in tegra234_cbb_probe()
1533 		fabric = of_device_get_match_data(&pdev->dev);  in tegra234_cbb_probe()
1535 		struct acpi_device *device = ACPI_COMPANION(&pdev->dev);  in tegra234_cbb_probe()
1537 			return -ENODEV;  in tegra234_cbb_probe()
1541 			dev_err(&pdev->dev, "no device match found\n");  in tegra234_cbb_probe()
1542 			return -ENODEV;  in tegra234_cbb_probe()
1546 	cbb = devm_kzalloc(&pdev->dev, sizeof(*cbb), GFP_KERNEL);  in tegra234_cbb_probe()
1548 		return -ENOMEM;  in tegra234_cbb_probe()
1550 	INIT_LIST_HEAD(&cbb->base.node);  in tegra234_cbb_probe()
1551 	cbb->base.ops = &tegra234_cbb_ops;  in tegra234_cbb_probe()
1552 	cbb->base.dev = &pdev->dev;  in tegra234_cbb_probe()
1553 	cbb->fabric = fabric;  in tegra234_cbb_probe()
1555 	cbb->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &cbb->res);  in tegra234_cbb_probe()
1556 	if (IS_ERR(cbb->regs))  in tegra234_cbb_probe()
1557 		return PTR_ERR(cbb->regs);  in tegra234_cbb_probe()
1559 	err = tegra_cbb_get_irq(pdev, NULL, &cbb->sec_irq);  in tegra234_cbb_probe()
1570 		dev_info(&pdev->dev, "error reporting not enabled due to firewall\n");  in tegra234_cbb_probe()
1575 	list_add(&cbb->base.node, &cbb_list);  in tegra234_cbb_probe()
1579 	if (cbb->fabric->off_mask_erd)  in tegra234_cbb_probe()
1582 	return tegra_cbb_register(&cbb->base);  in tegra234_cbb_probe()
1589 	tegra234_cbb_error_enable(&cbb->base);  in tegra234_cbb_resume_noirq()
1591 	dev_dbg(dev, "%s resumed\n", cbb->fabric->fab_list[cbb->fabric->fab_id].name);  in tegra234_cbb_resume_noirq()
1603 		.name = "tegra234-cbb",
1622 MODULE_DESCRIPTION("Control Backbone 2.0 error handling driver for Tegra234");