soc/qcom/llcc-qcom.c

3844 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
3859 	if (IS_ERR(drv_data))
3860 		return ERR_CAST(drv_data);
3862 	cfg = drv_data->cfg;
3863 	sz = drv_data->cfg_size;
3904 	if (IS_ERR(drv_data))
3905 		return PTR_ERR(drv_data);
3913 	ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
3920 	ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
3925 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3926 		regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
3934 	ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
3940 	if (drv_data->version >= LLCC_VERSION_4_1_0_0)
3941 		ret = regmap_write(drv_data->bcast_regmap, act_clear_reg,
3959 	if (IS_ERR(drv_data))
3960 		return PTR_ERR(drv_data);
3965 	mutex_lock(&drv_data->lock);
3966 	if (test_bit(desc->slice_id, drv_data->bitmap)) {
3967 		mutex_unlock(&drv_data->lock);
3976 		mutex_unlock(&drv_data->lock);
3980 	__set_bit(desc->slice_id, drv_data->bitmap);
3981 	mutex_unlock(&drv_data->lock);
3999 	if (IS_ERR(drv_data))
4000 		return PTR_ERR(drv_data);
4005 	mutex_lock(&drv_data->lock);
4006 	if (!test_bit(desc->slice_id, drv_data->bitmap)) {
4007 		mutex_unlock(&drv_data->lock);
4015 		mutex_unlock(&drv_data->lock);
4019 	__clear_bit(desc->slice_id, drv_data->bitmap);
4020 	mutex_unlock(&drv_data->lock);
4079 	max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
4088 	ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4092 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4103 	ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4107 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4108 		ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4118 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
4123 		if (drv_data->version < LLCC_VERSION_4_1_0_0) {
4125 			ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
4132 	if (drv_data->version >= LLCC_VERSION_2_0_0_0) {
4136 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN,
4142 	if (drv_data->version >= LLCC_VERSION_2_1_0_0) {
4146 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN,
4152 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4163 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1,
4169 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2,
4175 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3,
4181 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4,
4187 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5,
4193 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6,
4199 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7,
4205 		ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8,
4249 	attr3_val /= drv_data->num_banks;
4252 	ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
4256 	ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
4260 	ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
4264 	ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val);
4272 	ret = regmap_update_bits(drv_data->bcast_regmap,
4279 	ret = regmap_update_bits(drv_data->bcast_regmap,
4286 	ret = regmap_update_bits(drv_data->bcast_regmap,
4293 	ret = regmap_update_bits(drv_data->bcast_regmap,
4300 	ret = regmap_update_bits(drv_data->bcast_regmap,
4307 	ret = regmap_update_bits(drv_data->bcast_regmap,
4314 	ret = regmap_update_bits(drv_data->bcast_regmap,
4321 	ret = regmap_update_bits(drv_data->bcast_regmap,
4328 	ret = regmap_update_bits(drv_data->bcast_regmap,
4335 	ret = regmap_update_bits(drv_data->bcast_regmap,
4360 	sz = drv_data->cfg_size;
4361 	llcc_table = drv_data->cfg;
4363 	if (drv_data->version >= LLCC_VERSION_6_0_0_0) {
4401 	drv_data = ERR_PTR(-ENODEV);
4437 	if (!IS_ERR(drv_data))
4440 	drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
4441 	if (!drv_data) {
4474 	drv_data->num_banks = num_banks;
4476 	drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
4477 	if (!drv_data->regmaps) {
4482 	drv_data->regmaps[0] = regmap;
4488 		drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base);
4489 		if (IS_ERR(drv_data->regmaps[i])) {
4490 			ret = PTR_ERR(drv_data->regmaps[i]);
4495 	drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
4496 	if (IS_ERR(drv_data->bcast_regmap)) {
4498 			drv_data->bcast_regmap = regmap;
4500 			ret = PTR_ERR(drv_data->bcast_regmap);
4506 	ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO],
4511 	drv_data->version = version;
4513 	/* Applicable only when drv_data->version >= 4.1 */
4514 	if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4515 		drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
4516 		if (IS_ERR(drv_data->bcast_and_regmap)) {
4517 			ret = PTR_ERR(drv_data->bcast_and_regmap);
4519 				drv_data->bcast_and_regmap = NULL;
4529 		if (llcc_cfg[i].slice_id > drv_data->max_slices)
4530 			drv_data->max_slices = llcc_cfg[i].slice_id;
4532 	drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices,
4534 	if (!drv_data->bitmap) {
4539 	drv_data->cfg = llcc_cfg;
4540 	drv_data->cfg_size = sz;
4541 	drv_data->edac_reg_offset = cfg->edac_reg_offset;
4542 	drv_data->ecc_irq_configured = cfg->irq_configured;
4543 	mutex_init(&drv_data->lock);
4544 	platform_set_drvdata(pdev, drv_data);
4550 	drv_data->ecc_irq = platform_get_irq_optional(pdev, 0);
4560 						"qcom_llcc_edac", -1, drv_data,
4561 						sizeof(*drv_data));
4568 	drv_data = ERR_PTR(-ENODEV);