fsl/qe/qmc.c

257 	void __iomem *scc_pram;
416 		qmc_write16(chan->qmc->scc_pram + QMC_GBL_MRBLR,
713 		curr = qmc_read16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2));
726 		qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
749 		curr = qmc_read16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2));
762 		qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
785 		curr = qmc_read16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2));
798 		qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2),
1359 		qmc_write16(qmc->scc_pram + QMC_GBL_TSATRX + (i * 2), 0x0000);
1362 	qmc_setbits16(qmc->scc_pram + QMC_GBL_TSATRX + ((info->nb_rx_ts - 1) * 2),
1367 	qmc_write16(qmc->scc_pram + QMC_GBL_RX_S_PTR, val);
1368 	qmc_write16(qmc->scc_pram + QMC_GBL_RXPTR, val);
1369 	qmc_write16(qmc->scc_pram + QMC_GBL_TX_S_PTR, val);
1370 	qmc_write16(qmc->scc_pram + QMC_GBL_TXPTR, val);
1388 		qmc_write16(qmc->scc_pram + QMC_GBL_TSATRX + (i * 2), 0x0000);
1389 		qmc_write16(qmc->scc_pram + QMC_GBL_TSATTX + (i * 2), 0x0000);
1393 	qmc_setbits16(qmc->scc_pram + QMC_GBL_TSATRX + ((info->nb_rx_ts - 1) * 2),
1395 	qmc_setbits16(qmc->scc_pram + QMC_GBL_TSATTX + ((info->nb_tx_ts - 1) * 2),
1400 	qmc_write16(qmc->scc_pram + QMC_GBL_RX_S_PTR, val);
1401 	qmc_write16(qmc->scc_pram + QMC_GBL_RXPTR, val);
1405 	qmc_write16(qmc->scc_pram + QMC_GBL_TX_S_PTR, val);
1406 	qmc_write16(qmc->scc_pram + QMC_GBL_TXPTR, val);
1721 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "scc_pram");
1725 	qmc->scc_pram = devm_ioremap_resource(qmc->dev, res);
1726 	if (IS_ERR(qmc->scc_pram))
1727 		return PTR_ERR(qmc->scc_pram);
1772 	qmc->scc_pram = qe_muram_addr(info);
1780 	if (IS_ERR(qmc->scc_pram))
1781 		return PTR_ERR(qmc->scc_pram);
1851 	val = qmc_read16(qmc->scc_pram + QMC_GBL_RX_S_PTR);
1852 	qmc_write16(qmc->scc_pram + QMC_GBL_RXPTR, val);
1853 	val = qmc_read16(qmc->scc_pram + QMC_GBL_TX_S_PTR);
1854 	qmc_write16(qmc->scc_pram + QMC_GBL_TXPTR, val);
1944 	qmc_write32(qmc->scc_pram + QMC_GBL_MCBASE, qmc->bd_dma_addr);
1957 	qmc_write32(qmc->scc_pram + QMC_GBL_INTBASE, qmc->int_dma_addr);
1958 	qmc_write32(qmc->scc_pram + QMC_GBL_INTPTR, qmc->int_dma_addr);
1961 	qmc_write16(qmc->scc_pram + QMC_GBL_MRBLR, HDLC_MAX_MRU + 4);
1963 	qmc_write16(qmc->scc_pram + QMC_GBL_GRFTHR, 1);
1964 	qmc_write16(qmc->scc_pram + QMC_GBL_GRFCNT, 1);
1966 	qmc_write32(qmc->scc_pram + QMC_GBL_C_MASK32, 0xDEBB20E3);
1967 	qmc_write16(qmc->scc_pram + QMC_GBL_C_MASK16, 0xF0B8);
1971 		memset_io(qmc->scc_pram + QMC_QE_GBL_RSV_B0_START, 0,
1974 		qmc_write32(qmc->scc_pram + QMC_QE_GBL_GCSBASE, qmc->dpram_offset);
1977 		memset_io(qmc->scc_pram + UCC_SLOW_PRAM_SIZE, 0x01, 64);
1978 		memset_io(qmc->scc_pram + UCC_SLOW_PRAM_SIZE + 64, 0x01, 64);
1979 		qmc_write16(qmc->scc_pram + QMC_QE_GBL_RX_FRM_BASE,
1981 		qmc_write16(qmc->scc_pram + QMC_QE_GBL_TX_FRM_BASE,
1989 	qmc_write16(qmc->scc_pram + QMC_GBL_QMCSTATE, 0x8000);