drivers/pinctrl/pinctrl-at91.c

116  * @groups: corresponding pin groups
134  * struct at91_pmx_pin - describes an At91 pin mux
135  * @bank: the bank of the pin
136  * @pin: the pin number in the @bank
137  * @mux: the mux mode : gpio or periph_x of the pin i.e. alternate function.
138  * @conf: the configuration of the pin: PULL_UP, MULTIDRIVE etc...
142 	uint32_t	pin;
148  * struct at91_pin_group - describes an At91 pin group
149  * @name: the name of this specific pin group
150  * @pins_conf: the mux mode for each pin in this group. The size of this
153  *	from the driver-local pin enumeration space
195 	bool (*get_deglitch)(void __iomem *pio, unsigned pin);
197 	bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
199 	bool (*get_pulldown)(void __iomem *pio, unsigned pin);
201 	bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
203 	unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
204 	void (*set_drivestrength)(void __iomem *pio, unsigned pin,
206 	unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
207 	void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
369 static inline int pin_to_bank(unsigned pin)
371 	return pin /= MAX_NB_GPIO_PER_BANK;
374 static unsigned pin_to_mask(unsigned int pin)
376 	return 1 << pin;
379 static unsigned two_bit_pin_value_shift_amount(unsigned int pin)
381 	/* return the shift value for a pin for "two bit" per pin registers,
383 	return 2*((pin >= MAX_NB_GPIO_PER_BANK/2)
384 			? pin - MAX_NB_GPIO_PER_BANK/2 : pin);
387 static unsigned sama5d3_get_drive_register(unsigned int pin)
390 	 * with two bits per pin */
391 	return (pin >= MAX_NB_GPIO_PER_BANK/2)
395 static unsigned at91sam9x5_get_drive_register(unsigned int pin)
398 	 * with two bits per pin */
399 	return (pin >= MAX_NB_GPIO_PER_BANK/2)
408 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin)
410 	return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1);
421 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val)
423 	*val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
424 	return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
434 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)
436 	return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
508 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
510 	return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;
518 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)
520 	if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)
521 		return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
533 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
537 	return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&
538 	       ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
552 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
554 	return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);
570 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
572 	return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;
575 static inline u32 read_drive_strength(void __iomem *reg, unsigned pin)
579 	tmp = tmp >> two_bit_pin_value_shift_amount(pin);
585 							unsigned pin)
588 					sama5d3_get_drive_register(pin), pin);
599 							unsigned pin)
602 				at91sam9x5_get_drive_register(pin), pin);
612 						   unsigned pin)
616 	if (tmp & BIT(pin))
622 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin)
626 	if ((tmp & BIT(pin)))
632 static void set_drive_strength(void __iomem *reg, unsigned pin, u32 strength)
635 	unsigned shift = two_bit_pin_value_shift_amount(pin);
643 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin,
651 	set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting);
654 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin,
665 	set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin,
669 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin,
683 		tmp &= ~BIT(pin);
685 		tmp |= BIT(pin);
690 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
701 		tmp &= ~BIT(pin);
703 		tmp |= BIT(pin);
776 static void at91_pin_dbg(const struct device *dev, const struct at91_pmx_pin *pin)
778 	if (pin->mux) {
780 			pin->bank + 'A', pin->pin, pin->mux - 1 + 'A', pin->conf);
783 			pin->bank + 'A', pin->pin, pin->conf);
788 			    int index, const struct at91_pmx_pin *pin)
793 	if (pin->bank >= gpio_banks) {
794 		dev_err(info->dev, "%s: pin conf %d bank_id %d >= nbanks %d\n",
795 			name, index, pin->bank, gpio_banks);
799 	if (!gpio_chips[pin->bank]) {
800 		dev_err(info->dev, "%s: pin conf %d bank_id %d not enabled\n",
801 			name, index, pin->bank);
805 	if (pin->pin >= MAX_NB_GPIO_PER_BANK) {
806 		dev_err(info->dev, "%s: pin conf %d pin_bank_id %d >= %d\n",
807 			name, index, pin->pin, MAX_NB_GPIO_PER_BANK);
811 	if (!pin->mux)
814 	mux = pin->mux - 1;
817 		dev_err(info->dev, "%s: pin conf %d mux_id %d >= nmux %d\n",
822 	if (!(info->mux_mask[pin->bank * info->nmux + mux] & 1 << pin->pin)) {
823 		dev_err(info->dev, "%s: pin conf %d mux_id %d not supported for pio%c%d\n",
824 			name, index, mux, pin->bank + 'A', pin->pin);
847 	const struct at91_pmx_pin *pin;
859 		pin = &pins_conf[i];
860 		ret = pin_check_config(info, info->groups[group].name, i, pin);
866 		pin = &pins_conf[i];
867 		at91_pin_dbg(info->dev, pin);
868 		pio = pin_to_controller(info, pin->bank);
873 		mask = pin_to_mask(pin->pin);
875 		switch (pin->mux) {
896 		if (pin->mux)
950 	dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset);
954 	dev_dbg(npct->dev, "enable pin %u as PIO%c%d 0x%x\n",
968 	dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset);
969 	/* Set the pin to some default state, GPIO is usually default */
986 	unsigned pin;
997 	pin = pin_id % MAX_NB_GPIO_PER_BANK;
999 	if (at91_mux_get_multidrive(pio, pin))
1002 	if (at91_mux_get_pullup(pio, pin))
1005 	if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))
1007 	if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))
1009 	if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))
1011 	if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))
1014 		*config |= (info->ops->get_drivestrength(pio, pin)
1017 		*config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT);
1018 	if (at91_mux_get_output(pio, pin, &out))
1033 	unsigned pin;
1046 		pin = pin_id % MAX_NB_GPIO_PER_BANK;
1047 		mask = pin_to_mask(pin);
1066 			info->ops->set_drivestrength(pio, pin,
1070 			info->ops->set_slewrate(pio, pin,
1198 	struct at91_pmx_pin *pin;
1209 	 * the binding format is atmel,pins = <bank pin mux CONFIG ...>,
1221 	pin = grp->pins_conf = devm_kcalloc(info->dev,
1231 		pin->bank = be32_to_cpu(*list++);
1232 		pin->pin = be32_to_cpu(*list++);
1233 		grp->pins[j] = pin->bank * MAX_NB_GPIO_PER_BANK + pin->pin;
1234 		pin->mux = be32_to_cpu(*list++);
1235 		pin->conf = be32_to_cpu(*list++);
1237 		at91_pin_dbg(info->dev, pin);
1238 		pin++;
1543  * Then just request_irq() with the pin ID; it works like any ARM IRQ