Lines Matching full:phy

11 #include <linux/phy/phy.h>
158 int (*phy_init)(struct phy *p);
164 struct phy *phy;
175 struct phy *repeater;
180 static int snps_eusb2_hsphy_set_mode(struct phy *p, enum phy_mode mode, int submode)
182 struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);
184 phy->mode = mode;
186 return phy_set_mode_ext(phy->repeater, mode, submode);
203 static void qcom_eusb2_default_parameters(struct snps_eusb2_hsphy *phy)
206 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9,
211 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9,
216 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9,
221 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_8,
226 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_8,
246 static int exynos_eusb2_ref_clk_init(struct snps_eusb2_hsphy *phy)
249 unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk);
259 dev_err(&phy->phy->dev, "unsupported ref_clk_freq: %lu\n", ref_clk_freq);
263 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_COMMON,
267 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_CFG_PLLCFG0,
272 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_CFG_PLLCFG1,
283 static int qcom_eusb2_ref_clk_init(struct snps_eusb2_hsphy *phy)
286 unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk);
296 dev_err(&phy->phy->dev, "unsupported ref_clk_freq: %lu\n", ref_clk_freq);
300 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,
304 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_2,
308 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_3,
312 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_3,
318 static int exynos_snps_eusb2_hsphy_init(struct phy *p)
320 struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);
323 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_RST,
326 fsleep(50); /* required after holding phy in reset */
328 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_COMMON,
332 ret = exynos_eusb2_ref_clk_init(phy);
337 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_PHY_CFG_TX,
341 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_UTMI_TESTSE,
345 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_RST,
348 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_COMMON,
351 snps_eusb2_hsphy_write_mask(phy->base, EXYNOS_USB_PHY_HS_PHY_CTRL_RST,
367 static int qcom_snps_eusb2_hsphy_init(struct phy *p)
369 struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);
372 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG0,
375 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, POR);
377 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,
380 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_APB_ACCESS_CMD,
383 snps_eusb2_hsphy_write_mask(phy->base, QCOM_UTMI_PHY_CMN_CTRL0, TESTBURNIN, 0);
385 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_FSEL_SEL,
389 ret = qcom_eusb2_ref_clk_init(phy);
393 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_1,
397 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_4,
401 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_4,
405 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_5,
409 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_6,
413 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_5,
417 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,
421 qcom_eusb2_default_parameters(phy);
423 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,
427 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL0, SLEEPM, SLEEPM);
429 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,
432 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL_COMMON0,
435 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, 0);
437 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_HS_PHY_CTRL2,
440 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG0,
456 static int snps_eusb2_hsphy_init(struct phy *p)
458 struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);
461 ret = regulator_bulk_enable(ARRAY_SIZE(phy->vregs), phy->vregs);
465 ret = phy_init(phy->repeater);
471 ret = clk_bulk_prepare_enable(phy->data->num_clks, phy->clks);
477 ret = reset_control_assert(phy->phy_reset);
485 ret = reset_control_deassert(phy->phy_reset);
491 ret = phy->data->phy_init(p);
498 clk_bulk_disable_unprepare(phy->data->num_clks, phy->clks);
500 phy_exit(phy->repeater);
502 regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);
507 static int snps_eusb2_hsphy_exit(struct phy *p)
509 struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);
511 clk_bulk_disable_unprepare(phy->data->num_clks, phy->clks);
513 regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);
515 phy_exit(phy->repeater);
531 struct snps_eusb2_hsphy *phy;
533 struct phy *generic_phy;
537 phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
538 if (!phy)
541 phy->data = device_get_match_data(dev);
542 if (!phy->data)
545 phy->base = devm_platform_ioremap_resource(pdev, 0);
546 if (IS_ERR(phy->base))
547 return PTR_ERR(phy->base);
549 phy->phy_reset = devm_reset_control_get_optional_exclusive(dev, NULL);
550 if (IS_ERR(phy->phy_reset))
551 return PTR_ERR(phy->phy_reset);
553 phy->clks = devm_kcalloc(dev, phy->data->num_clks, sizeof(*phy->clks),
555 if (!phy->clks)
558 for (i = 0; i < phy->data->num_clks; ++i)
559 phy->clks[i].id = phy->data->clk_names[i];
561 ret = devm_clk_bulk_get(dev, phy->data->num_clks, phy->clks);
564 "failed to get phy clock(s)\n");
566 phy->ref_clk = NULL;
567 for (i = 0; i < phy->data->num_clks; ++i) {
568 if (!strcmp(phy->clks[i].id, "ref")) {
569 phy->ref_clk = phy->clks[i].clk;
574 if (IS_ERR_OR_NULL(phy->ref_clk)) {
575 ret = phy->ref_clk ? PTR_ERR(phy->ref_clk) : -ENOENT;
580 num = ARRAY_SIZE(phy->vregs);
582 phy->vregs[i].supply = eusb2_hsphy_vreg_names[i];
584 ret = devm_regulator_bulk_get(dev, num, phy->vregs);
589 phy->repeater = devm_of_phy_optional_get(dev, np, NULL);
590 if (IS_ERR(phy->repeater))
591 return dev_err_probe(dev, PTR_ERR(phy->repeater),
596 dev_err(dev, "failed to create phy: %d\n", ret);
600 dev_set_drvdata(dev, phy);
601 phy_set_drvdata(generic_phy, phy);
612 .compatible = "qcom,sm8550-snps-eusb2-phy",
615 .compatible = "samsung,exynos2200-eusb2-phy",
632 MODULE_DESCRIPTION("Synopsys eUSB2 HS PHY driver");