phy/mediatek/phy-mtk-xsphy.c

3  * MediaTek USB3.1 gen2 xsphy Driver
121 static void u2_phy_slew_rate_calibrate(struct mtk_xsphy *xsphy,
161 		tmp = xsphy->src_ref_clk * xsphy->src_coef;
168 	dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n",
170 		xsphy->src_ref_clk, xsphy->src_coef);
179 static void u2_phy_instance_init(struct mtk_xsphy *xsphy,
190 static void u2_phy_instance_power_on(struct mtk_xsphy *xsphy,
202 	dev_dbg(xsphy->dev, "%s(%d)\n", __func__, index);
205 static void u2_phy_instance_power_off(struct mtk_xsphy *xsphy,
217 	dev_dbg(xsphy->dev, "%s(%d)\n", __func__, index);
220 static void u2_phy_instance_set_mode(struct mtk_xsphy *xsphy,
244 static void phy_parse_property(struct mtk_xsphy *xsphy,
279 		dev_err(xsphy->dev, "incompatible phy type\n");
284 static void u2_phy_props_set(struct mtk_xsphy *xsphy,
306 static void u3_phy_props_set(struct mtk_xsphy *xsphy,
312 		mtk_phy_update_field(xsphy->glb_base + SSPXTP_PHYA_GLB_00,
383 	struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
388 		dev_err(xsphy->dev, "failed to enable ref_clk\n");
394 		u2_phy_instance_init(xsphy, inst);
395 		u2_phy_props_set(xsphy, inst);
398 		u3_phy_props_set(xsphy, inst);
405 		dev_err(xsphy->dev, "incompatible phy type\n");
416 	struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
419 		u2_phy_instance_power_on(xsphy, inst);
420 		u2_phy_slew_rate_calibrate(xsphy, inst);
429 	struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
432 		u2_phy_instance_power_off(xsphy, inst);
448 	struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
451 		u2_phy_instance_set_mode(xsphy, inst, mode);
459 	struct mtk_xsphy *xsphy = dev_get_drvdata(dev);
469 	for (index = 0; index < xsphy->nphys; index++)
470 		if (phy_np == xsphy->phys[index]->phy->dev.of_node) {
471 			inst = xsphy->phys[index];
489 	phy_parse_property(xsphy, inst);
505 	{ .compatible = "mediatek,xsphy", },
516 	struct mtk_xsphy *xsphy;
520 	xsphy = devm_kzalloc(dev, sizeof(*xsphy), GFP_KERNEL);
521 	if (!xsphy)
524 	xsphy->nphys = of_get_child_count(np);
525 	xsphy->phys = devm_kcalloc(dev, xsphy->nphys,
526 				       sizeof(*xsphy->phys), GFP_KERNEL);
527 	if (!xsphy->phys)
530 	xsphy->dev = dev;
531 	platform_set_drvdata(pdev, xsphy);
537 		xsphy->glb_base = devm_ioremap_resource(dev, glb_res);
538 		if (IS_ERR(xsphy->glb_base)) {
540 			return PTR_ERR(xsphy->glb_base);
544 	xsphy->src_ref_clk = XSP_REF_CLK;
545 	xsphy->src_coef = XSP_SLEW_RATE_COEF;
548 				 &xsphy->src_ref_clk);
549 	device_property_read_u32(dev, "mediatek,src-coef", &xsphy->src_coef);
561 		xsphy->phys[port] = inst;
605 		.name	= "mtk-xsphy",