drivers/parport/parport_pc.c

106 static void frob_econtrol(struct parport *pb, unsigned char m,
109 	const struct parport_pc_private *priv = pb->physport->private_data;
115 		ectr = inb(ECONTROL(pb));
124 	outb(new, ECONTROL(pb));
208 static int clear_epp_timeout(struct parport *pb)
212 	if (!(parport_pc_read_status(pb) & 0x01))
216 	parport_pc_read_status(pb);
217 	r = parport_pc_read_status(pb);
218 	outb(r | 0x01, STATUS(pb)); /* Some reset by writing 1 */
219 	outb(r & 0xfe, STATUS(pb)); /* Others by writing 0 */
220 	r = parport_pc_read_status(pb);
1416 static int parport_SPP_supported(struct parport *pb)
1426 	clear_epp_timeout(pb);
1430 	outb(w, CONTROL(pb));
1437 	r = inb(CONTROL(pb));
1440 		outb(w, CONTROL(pb));
1441 		r = inb(CONTROL(pb));
1442 		outb(0xc, CONTROL(pb));
1451 			pb->base, w, r);
1456 	parport_pc_write_data(pb, w);
1457 	r = parport_pc_read_data(pb);
1460 		parport_pc_write_data(pb, w);
1461 		r = parport_pc_read_data(pb);
1470 			pb->base, w, r);
1472 			pb->base);
1496 static int parport_ECR_present(struct parport *pb)
1498 	struct parport_pc_private *priv = pb->private_data;
1502 		outb(r, CONTROL(pb));
1503 		if ((inb(ECONTROL(pb)) & 0x3) == (r & 0x3)) {
1504 			outb(r ^ 0x2, CONTROL(pb)); /* Toggle bit 1 */
1506 			r = inb(CONTROL(pb));
1507 			if ((inb(ECONTROL(pb)) & 0x2) == (r & 0x2))
1512 		if ((inb(ECONTROL(pb)) & 0x3) != 0x1)
1515 		ECR_WRITE(pb, 0x34);
1516 		if (inb(ECONTROL(pb)) != 0x35)
1521 	outb(0xc, CONTROL(pb));
1524 	frob_set_mode(pb, ECR_SPP);
1529 	outb(0xc, CONTROL(pb));
1551 static int parport_PS2_supported(struct parport *pb)
1555 	clear_epp_timeout(pb);
1558 	parport_pc_data_reverse(pb);
1560 	parport_pc_write_data(pb, 0x55);
1561 	if (parport_pc_read_data(pb) != 0x55)
1564 	parport_pc_write_data(pb, 0xaa);
1565 	if (parport_pc_read_data(pb) != 0xaa)
1569 	parport_pc_data_forward(pb);
1572 		pb->modes |= PARPORT_MODE_TRISTATE;
1574 		struct parport_pc_private *priv = pb->private_data;
1582 static int parport_ECP_supported(struct parport *pb)
1587 	struct parport_pc_private *priv = pb->private_data;
1596 	ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1597 	ECR_WRITE(pb, ECR_TST << 5); /* TEST FIFO */
1598 	for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02); i++)
1599 		outb(0xaa, FIFO(pb));
1606 		ECR_WRITE(pb, ECR_SPP << 5);
1612 		printk(KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i);
1615 	frob_econtrol(pb, 1<<2, 1<<2);
1616 	frob_econtrol(pb, 1<<2, 0);
1618 		inb(FIFO(pb));
1620 		if (inb(ECONTROL(pb)) & (1<<2))
1627 			       pb->base, i);
1636 	frob_set_mode(pb, ECR_PS2); /* Reset FIFO and enable PS2 */
1637 	parport_pc_data_reverse(pb); /* Must be in PS2 mode */
1638 	frob_set_mode(pb, ECR_TST); /* Test FIFO */
1639 	frob_econtrol(pb, 1<<2, 1<<2);
1640 	frob_econtrol(pb, 1<<2, 0);
1642 		outb(0xaa, FIFO(pb));
1643 		if (inb(ECONTROL(pb)) & (1<<2))
1650 				pb->base, i);
1657 	ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1658 	ECR_WRITE(pb, 0xf4); /* Configuration mode */
1659 	config = inb(CONFIGA(pb));
1664 		pr_warn("0x%lx: Unsupported pword size!\n", pb->base);
1668 		pr_warn("0x%lx: Unsupported pword size!\n", pb->base);
1671 		pr_warn("0x%lx: Unknown implementation ID\n", pb->base);
1680 		       pb->base, 8 * pword);
1683 		       pb->base, config & 0x80 ? "Level" : "Pulses");
1685 		configb = inb(CONFIGB(pb));
1687 		       pb->base, config, configb);
1688 		printk(KERN_DEBUG "0x%lx: ECP settings irq=", pb->base);
1701 	frob_set_mode(pb, ECR_SPP);
1708 static int intel_bug_present_check_epp(struct parport *pb)
1710 	const struct parport_pc_private *priv = pb->private_data;
1715 		unsigned char ecr = inb(ECONTROL(pb));
1718 			ECR_WRITE(pb, i);
1719 			if (clear_epp_timeout(pb)) {
1726 		ECR_WRITE(pb, ecr);
1731 static int intel_bug_present(struct parport *pb)
1734 	if (pb->dev != NULL) {
1738 	return intel_bug_present_check_epp(pb);
1741 static int intel_bug_present(struct parport *pb)
1747 static int parport_ECPPS2_supported(struct parport *pb)
1749 	const struct parport_pc_private *priv = pb->private_data;
1756 	oecr = inb(ECONTROL(pb));
1757 	ECR_WRITE(pb, ECR_PS2 << 5);
1758 	result = parport_PS2_supported(pb);
1759 	ECR_WRITE(pb, oecr);
1765 static int parport_EPP_supported(struct parport *pb)
1781 	if (!clear_epp_timeout(pb))
1785 	if (intel_bug_present(pb))
1788 	pb->modes |= PARPORT_MODE_EPP;
1791 	pb->ops->epp_read_data = parport_pc_epp_read_data;
1792 	pb->ops->epp_write_data = parport_pc_epp_write_data;
1793 	pb->ops->epp_read_addr = parport_pc_epp_read_addr;
1794 	pb->ops->epp_write_addr = parport_pc_epp_write_addr;
1799 static int parport_ECPEPP_supported(struct parport *pb)
1801 	struct parport_pc_private *priv = pb->private_data;
1808 	oecr = inb(ECONTROL(pb));
1810 	ECR_WRITE(pb, 0x80);
1811 	outb(0x04, CONTROL(pb));
1812 	result = parport_EPP_supported(pb);
1814 	ECR_WRITE(pb, oecr);
1818 		pb->ops->epp_read_data = parport_pc_ecpepp_read_data;
1819 		pb->ops->epp_write_data = parport_pc_ecpepp_write_data;
1820 		pb->ops->epp_read_addr = parport_pc_ecpepp_read_addr;
1821 		pb->ops->epp_write_addr = parport_pc_ecpepp_write_addr;
1830 static int parport_PS2_supported(struct parport *pb) { return 0; }
1832 static int parport_ECP_supported(struct parport *pb)
1837 static int parport_EPP_supported(struct parport *pb)
1842 static int parport_ECPEPP_supported(struct parport *pb)
1847 static int parport_ECPPS2_supported(struct parport *pb)
1857 static int programmable_irq_support(struct parport *pb)
1860 	unsigned char oecr = inb(ECONTROL(pb));
1865 	ECR_WRITE(pb, ECR_CNF << 5); /* Configuration MODE */
1867 	intrLine = (inb(CONFIGB(pb)) >> 3) & 0x07;
1870 	ECR_WRITE(pb, oecr);
1874 static int irq_probe_ECP(struct parport *pb)
1881 	ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1882 	ECR_WRITE(pb, (ECR_TST << 5) | 0x04);
1883 	ECR_WRITE(pb, ECR_TST << 5);
1886 	for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02) ; i++)
1887 		outb(0xaa, FIFO(pb));
1889 	pb->irq = probe_irq_off(irqs);
1890 	ECR_WRITE(pb, ECR_SPP << 5);
1892 	if (pb->irq <= 0)
1893 		pb->irq = PARPORT_IRQ_NONE;
1895 	return pb->irq;
1902 static int irq_probe_EPP(struct parport *pb)
1910 	if (pb->modes & PARPORT_MODE_PCECR)
1911 		oecr = inb(ECONTROL(pb));
1915 	if (pb->modes & PARPORT_MODE_PCECR)
1916 		frob_econtrol(pb, 0x10, 0x10);
1918 	clear_epp_timeout(pb);
1919 	parport_pc_frob_control(pb, 0x20, 0x20);
1920 	parport_pc_frob_control(pb, 0x10, 0x10);
1921 	clear_epp_timeout(pb);
1926 	parport_pc_read_epp(pb);
1929 	pb->irq = probe_irq_off(irqs);
1930 	if (pb->modes & PARPORT_MODE_PCECR)
1931 		ECR_WRITE(pb, oecr);
1932 	parport_pc_write_control(pb, 0xc);
1934 	if (pb->irq <= 0)
1935 		pb->irq = PARPORT_IRQ_NONE;
1937 	return pb->irq;
1941 static int irq_probe_SPP(struct parport *pb)
1954 static int parport_irq_probe(struct parport *pb)
1956 	struct parport_pc_private *priv = pb->private_data;
1959 		pb->irq = programmable_irq_support(pb);
1961 		if (pb->irq == PARPORT_IRQ_NONE)
1962 			pb->irq = irq_probe_ECP(pb);
1965 	if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr &&
1966 	    (pb->modes & PARPORT_MODE_EPP))
1967 		pb->irq = irq_probe_EPP(pb);
1969 	clear_epp_timeout(pb);
1971 	if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP))
1972 		pb->irq = irq_probe_EPP(pb);
1974 	clear_epp_timeout(pb);
1976 	if (pb->irq == PARPORT_IRQ_NONE)
1977 		pb->irq = irq_probe_SPP(pb);
1979 	if (pb->irq == PARPORT_IRQ_NONE)
1980 		pb->irq = get_superio_irq(pb);
1982 	return pb->irq;