Lines Matching +full:8 +full:dev
24 struct mt7915_dev *dev = data; in mt7915_implicit_txbf_set() local
29 dev->ibf = !!val; in mt7915_implicit_txbf_set()
31 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE); in mt7915_implicit_txbf_set()
37 struct mt7915_dev *dev = data; in mt7915_implicit_txbf_get() local
39 *val = dev->ibf; in mt7915_implicit_txbf_get()
53 struct mt7915_dev *dev = phy->dev; in mt7915_sys_recovery_set() local
83 * 8: trigger firmware crash. in mt7915_sys_recovery_set()
86 ret = mt7915_mcu_set_ser(dev, 0, 0, band); in mt7915_sys_recovery_set()
94 ret = mt7915_mcu_set_ser(dev, SER_ENABLE, BIT(val), band); in mt7915_sys_recovery_set()
98 ret = mt7915_mcu_set_ser(dev, SER_RECOVER, val, band); in mt7915_sys_recovery_set()
103 mt76_set(dev, MT_WFDMA0_MCU_HOST_INT_ENA, MT_MCU_CMD_WDT_MASK); in mt7915_sys_recovery_set()
104 ret = mt7915_mcu_set_ser(dev, 1, 3, band); in mt7915_sys_recovery_set()
108 dev->recovery.state |= MT_MCU_CMD_WDT_MASK; in mt7915_sys_recovery_set()
109 mt7915_reset(dev); in mt7915_sys_recovery_set()
114 mt76_wr(dev, MT_MCU_WM_CIRQ_EINT_MASK_CLR_ADDR, BIT(18)); in mt7915_sys_recovery_set()
115 mt76_wr(dev, MT_MCU_WM_CIRQ_EINT_SOFT_ADDR, BIT(18)); in mt7915_sys_recovery_set()
129 struct mt7915_dev *dev = phy->dev; in mt7915_sys_recovery_get() local
159 "8: trigger firmware crash\n"); in mt7915_sys_recovery_get()
166 mt76_rr(dev, MT_SWDEF_SER_STATS)); in mt7915_sys_recovery_get()
169 mt76_rr(dev, MT_SWDEF_PLE_STATS)); in mt7915_sys_recovery_get()
172 mt76_rr(dev, MT_SWDEF_PLE1_STATS)); in mt7915_sys_recovery_get()
175 mt76_rr(dev, MT_SWDEF_PLE_AMSDU_STATS)); in mt7915_sys_recovery_get()
178 mt76_rr(dev, MT_SWDEF_PSE_STATS)); in mt7915_sys_recovery_get()
181 mt76_rr(dev, MT_SWDEF_PSE1_STATS)); in mt7915_sys_recovery_get()
184 mt76_rr(dev, MT_SWDEF_LAMC_WISR6_BN0_STATS)); in mt7915_sys_recovery_get()
187 mt76_rr(dev, MT_SWDEF_LAMC_WISR6_BN1_STATS)); in mt7915_sys_recovery_get()
190 mt76_rr(dev, MT_SWDEF_LAMC_WISR7_BN0_STATS)); in mt7915_sys_recovery_get()
193 mt76_rr(dev, MT_SWDEF_LAMC_WISR7_BN1_STATS)); in mt7915_sys_recovery_get()
196 dev->recovery.wm_reset_count, in mt7915_sys_recovery_get()
197 dev->recovery.wa_reset_count); in mt7915_sys_recovery_get()
217 struct mt7915_dev *dev = phy->dev; in mt7915_radar_trigger() local
223 if (val == RADAR_BACKGROUND && !dev->rdd2_phy) { in mt7915_radar_trigger()
224 dev_err(dev->mt76.dev, "Background radar is not enabled\n"); in mt7915_radar_trigger()
230 dev_err(dev->mt76.dev, "No RDD found\n"); in mt7915_radar_trigger()
234 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_RADAR_EMULATE, in mt7915_radar_trigger()
244 struct mt7915_dev *dev = data; in mt7915_muru_debug_set() local
246 dev->muru_debug = val; in mt7915_muru_debug_set()
247 mt7915_mcu_muru_debug_set(dev, dev->muru_debug); in mt7915_muru_debug_set()
255 struct mt7915_dev *dev = data; in mt7915_muru_debug_get() local
257 *val = dev->muru_debug; in mt7915_muru_debug_get()
268 struct mt7915_dev *dev = phy->dev; in mt7915_muru_stats_show() local
275 "HE 2RU", "HE 3RU", "HE 4RU", "HE 5-8RU", "HE 9-16RU", in mt7915_muru_stats_show()
280 "HE 3RU", "HE 4RU", "HE 5-8RU", "HE 9-16RU", "HE >16RU" in mt7915_muru_stats_show()
285 if (!dev->muru_debug) { in mt7915_muru_stats_show()
290 mutex_lock(&dev->mt76.mutex); in mt7915_muru_stats_show()
300 seq_printf(file, "%8s | ", dl_non_he_type[i]); in mt7915_muru_stats_show()
303 seq_printf(file, "%8u | %8u | %8u | %8u | %8u | ", in mt7915_muru_stats_show()
312 for (i = 5; i < 8; i++) in mt7915_muru_stats_show()
313 seq_printf(file, "%8s | ", dl_non_he_type[i]); in mt7915_muru_stats_show()
316 seq_printf(file, "%8u | %8u | %8u | ", in mt7915_muru_stats_show()
341 seq_printf(file, "%8s | ", dl_he_type[i]); in mt7915_muru_stats_show()
344 seq_printf(file, "%8u | %8u | ", in mt7915_muru_stats_show()
350 seq_printf(file, "%8s | ", dl_he_type[i]); in mt7915_muru_stats_show()
353 seq_printf(file, "%8u | %8u | %8u | ", in mt7915_muru_stats_show()
360 seq_printf(file, "%8s | ", dl_he_type[i]); in mt7915_muru_stats_show()
363 seq_printf(file, "%8u | %8u | %8u | %8u | %9u | %8u | ", in mt7915_muru_stats_show()
400 seq_printf(file, "%8s | ", ul_he_type[i]); in mt7915_muru_stats_show()
403 seq_printf(file, "%8u | %8u | %8u | ", in mt7915_muru_stats_show()
411 seq_printf(file, "%8s | ", ul_he_type[i]); in mt7915_muru_stats_show()
414 seq_printf(file, "%8u | %8u | %8u | %8u | %8u | %9u | %7u | ", in mt7915_muru_stats_show()
447 mutex_unlock(&dev->mt76.mutex); in mt7915_muru_stats_show()
456 struct mt7915_dev *dev = dev_get_drvdata(s->private); in mt7915_rdd_monitor() local
457 struct cfg80211_chan_def *chandef = &dev->rdd2_chandef; in mt7915_rdd_monitor()
461 mutex_lock(&dev->mt76.mutex); in mt7915_rdd_monitor()
463 if (!mt7915_eeprom_has_background_radar(dev)) { in mt7915_rdd_monitor()
473 if (!dev->rdd2_phy) { in mt7915_rdd_monitor()
500 mutex_unlock(&dev->mt76.mutex); in mt7915_rdd_monitor()
508 struct mt7915_dev *dev = data; in mt7915_fw_debug_wm_set() local
519 dev->fw.debug_wm = val ? MCU_FW_LOG_TO_HOST : 0; in mt7915_fw_debug_wm_set()
521 if (dev->fw.debug_bin) in mt7915_fw_debug_wm_set()
524 val = dev->fw.debug_wm; in mt7915_fw_debug_wm_set()
526 tx = dev->fw.debug_wm || (dev->fw.debug_bin & BIT(1)); in mt7915_fw_debug_wm_set()
527 rx = dev->fw.debug_wm || (dev->fw.debug_bin & BIT(2)); in mt7915_fw_debug_wm_set()
528 en = dev->fw.debug_wm || (dev->fw.debug_bin & BIT(0)); in mt7915_fw_debug_wm_set()
530 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, val); in mt7915_fw_debug_wm_set()
540 ret = mt7915_mcu_fw_dbg_ctrl(dev, debug, val); in mt7915_fw_debug_wm_set()
546 mt76_clear(dev, MT_CPU_UTIL_CTRL, BIT(0)); in mt7915_fw_debug_wm_set()
547 mt76_wr(dev, MT_DIC_CMD_REG_CMD, BIT(2) | BIT(13) | in mt7915_fw_debug_wm_set()
548 (dev->fw.debug_wm ? 0 : BIT(0))); in mt7915_fw_debug_wm_set()
549 mt76_wr(dev, MT_MCU_WM_CIRQ_IRQ_MASK_CLR_ADDR, BIT(5)); in mt7915_fw_debug_wm_set()
550 mt76_wr(dev, MT_MCU_WM_CIRQ_IRQ_SOFT_ADDR, BIT(5)); in mt7915_fw_debug_wm_set()
554 dev->fw.debug_wm = 0; in mt7915_fw_debug_wm_set()
562 struct mt7915_dev *dev = data; in mt7915_fw_debug_wm_get() local
564 *val = dev->fw.debug_wm; in mt7915_fw_debug_wm_get()
575 struct mt7915_dev *dev = data; in mt7915_fw_debug_wa_set() local
578 dev->fw.debug_wa = val ? MCU_FW_LOG_TO_HOST : 0; in mt7915_fw_debug_wa_set()
580 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, dev->fw.debug_wa); in mt7915_fw_debug_wa_set()
584 ret = mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), in mt7915_fw_debug_wa_set()
585 MCU_WA_PARAM_PDMA_RX, !!dev->fw.debug_wa, 0); in mt7915_fw_debug_wa_set()
588 dev->fw.debug_wa = 0; in mt7915_fw_debug_wa_set()
596 struct mt7915_dev *dev = data; in mt7915_fw_debug_wa_get() local
598 *val = dev->fw.debug_wa; in mt7915_fw_debug_wa_get()
637 struct mt7915_dev *dev = data; in mt7915_fw_debug_bin_set() local
639 if (!dev->relay_fwlog) in mt7915_fw_debug_bin_set()
640 dev->relay_fwlog = relay_open("fwlog_data", dev->debugfs_dir, in mt7915_fw_debug_bin_set()
642 if (!dev->relay_fwlog) in mt7915_fw_debug_bin_set()
645 dev->fw.debug_bin = val; in mt7915_fw_debug_bin_set()
647 relay_reset(dev->relay_fwlog); in mt7915_fw_debug_bin_set()
649 return mt7915_fw_debug_wm_set(dev, dev->fw.debug_wm); in mt7915_fw_debug_bin_set()
655 struct mt7915_dev *dev = data; in mt7915_fw_debug_bin_get() local
657 *val = dev->fw.debug_bin; in mt7915_fw_debug_bin_get()
668 struct mt7915_dev *dev = file->private; in mt7915_fw_util_wm_show() local
670 seq_printf(file, "Program counter: 0x%x\n", mt76_rr(dev, MT_WM_MCU_PC)); in mt7915_fw_util_wm_show()
672 if (dev->fw.debug_wm) { in mt7915_fw_util_wm_show()
674 mt76_rr(dev, MT_CPU_UTIL_BUSY_PCT), in mt7915_fw_util_wm_show()
675 mt76_rr(dev, MT_CPU_UTIL_PEAK_BUSY_PCT)); in mt7915_fw_util_wm_show()
677 mt76_rr(dev, MT_CPU_UTIL_IDLE_CNT), in mt7915_fw_util_wm_show()
678 mt76_rr(dev, MT_CPU_UTIL_PEAK_IDLE_CNT)); in mt7915_fw_util_wm_show()
689 struct mt7915_dev *dev = file->private; in mt7915_fw_util_wa_show() local
691 seq_printf(file, "Program counter: 0x%x\n", mt76_rr(dev, MT_WA_MCU_PC)); in mt7915_fw_util_wa_show()
693 if (dev->fw.debug_wa) in mt7915_fw_util_wa_show()
694 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(QUERY), in mt7915_fw_util_wa_show()
706 struct mt7915_dev *dev = phy->dev; in mt7915_ampdu_stat_read_phy() local
707 bool ext_phy = phy != &dev->phy; in mt7915_ampdu_stat_read_phy()
713 range[i] = mt76_rr(dev, MT_MIB_ARNG(band, i)); in mt7915_ampdu_stat_read_phy()
720 seq_printf(file, "Length: %8d | ", bound[0]); in mt7915_ampdu_stat_read_phy()
727 seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]); in mt7915_ampdu_stat_read_phy()
784 struct mt7915_dev *dev = phy->dev; in mt7915_tx_stats_show() local
788 mutex_lock(&dev->mt76.mutex); in mt7915_tx_stats_show()
797 seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ", in mt7915_tx_stats_show()
806 mutex_unlock(&dev->mt76.mutex); in mt7915_tx_stats_show()
818 struct mt7915_dev *dev = phy->dev; in mt7915_hw_queue_read() local
821 val = mt76_rr(dev, MT_FL_Q_EMPTY); in mt7915_hw_queue_read()
829 mt76_wr(dev, MT_FL_Q0_CTRL, ctrl); in mt7915_hw_queue_read()
831 head = mt76_get_field(dev, MT_FL_Q2_CTRL, in mt7915_hw_queue_read()
833 tail = mt76_get_field(dev, MT_FL_Q2_CTRL, in mt7915_hw_queue_read()
835 queued = mt76_get_field(dev, MT_FL_Q3_CTRL, in mt7915_hw_queue_read()
848 struct mt7915_dev *dev = msta->vif->phy->dev; in mt7915_sta_hw_queue_read() local
858 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(ac, idx)); in mt7915_sta_hw_queue_read()
863 mt76_wr(dev, MT_FL_Q0_CTRL, ctrl | msta->wcid.idx); in mt7915_sta_hw_queue_read()
864 qlen = mt76_get_field(dev, MT_FL_Q3_CTRL, in mt7915_sta_hw_queue_read()
876 struct mt7915_dev *dev = phy->dev; in mt7915_hw_queues_show() local
882 { "ALTX_Q0", 8, 2, MT_LMAC_ALTX0 }, in mt7915_hw_queues_show()
896 { "HIF_Q0", 8, 0, MT_HIF0 }, in mt7915_hw_queues_show()
911 val = mt76_rr(dev, MT_PLE_FREEPG_CNT); in mt7915_hw_queues_show()
912 head = mt76_get_field(dev, MT_PLE_FREEPG_HEAD_TAIL, GENMASK(11, 0)); in mt7915_hw_queues_show()
913 tail = mt76_get_field(dev, MT_PLE_FREEPG_HEAD_TAIL, GENMASK(27, 16)); in mt7915_hw_queues_show()
919 val = mt76_rr(dev, MT_PLE_PG_HIF_GROUP); in mt7915_hw_queues_show()
920 head = mt76_get_field(dev, MT_PLE_HIF_PG_INFO, GENMASK(11, 0)); in mt7915_hw_queues_show()
921 tail = mt76_get_field(dev, MT_PLE_HIF_PG_INFO, GENMASK(27, 16)); in mt7915_hw_queues_show()
946 struct mt7915_dev *dev = phy->dev; in mt7915_xmit_queues_show() local
952 { dev->mt76.q_mcu[MT_MCUQ_WM], " MCUWM" }, in mt7915_xmit_queues_show()
953 { dev->mt76.q_mcu[MT_MCUQ_WA], " MCUWA" }, in mt7915_xmit_queues_show()
954 { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWDL" }, in mt7915_xmit_queues_show()
998 struct mt7915_dev *dev = phy->dev; in mt7915_rate_txpower_get() local
1018 phy != &dev->phy, phy->mt76->chandef.chan->hw_value); in mt7915_rate_txpower_get()
1057 reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_TPC_CTRL_STAT(band) : in mt7915_rate_txpower_get()
1061 mt76_get_field(dev, reg, MT_WF_PHY_TPC_POWER)); in mt7915_rate_txpower_get()
1076 struct mt7915_dev *dev = phy->dev; in mt7915_rate_txpower_set() local
1099 dev_warn(dev->mt76.dev, in mt7915_rate_txpower_set()
1119 mutex_lock(&dev->mt76.mutex); in mt7915_rate_txpower_set()
1150 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), in mt7915_rate_txpower_set()
1158 mutex_unlock(&dev->mt76.mutex); in mt7915_rate_txpower_set()
1174 struct mt7915_dev *dev = dev_get_drvdata(s->private); in mt7915_twt_stats() local
1181 list_for_each_entry_rcu(iter, &dev->twt_list, list) in mt7915_twt_stats()
1183 "%9d | %8d | %5c%c%c%c | %8d | %8d | %8d | %14lld |\n", in mt7915_twt_stats()
1203 struct mt7915_dev *dev = data; in mt7915_rf_regval_get() local
1207 ret = mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, ®val, false); in mt7915_rf_regval_get()
1219 struct mt7915_dev *dev = data; in mt7915_rf_regval_set() local
1222 return mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, &val32, true); in mt7915_rf_regval_set()
1230 struct mt7915_dev *dev = phy->dev; in mt7915_init_debugfs() local
1231 bool ext_phy = phy != &dev->phy; in mt7915_init_debugfs()
1237 debugfs_create_file("muru_debug", 0600, dir, dev, &fops_muru_debug); in mt7915_init_debugfs()
1247 debugfs_create_file("fw_debug_wm", 0600, dir, dev, &fops_fw_debug_wm); in mt7915_init_debugfs()
1248 debugfs_create_file("fw_debug_wa", 0600, dir, dev, &fops_fw_debug_wa); in mt7915_init_debugfs()
1249 debugfs_create_file("fw_debug_bin", 0600, dir, dev, &fops_fw_debug_bin); in mt7915_init_debugfs()
1250 debugfs_create_file("fw_util_wm", 0400, dir, dev, in mt7915_init_debugfs()
1252 debugfs_create_file("fw_util_wa", 0400, dir, dev, in mt7915_init_debugfs()
1254 debugfs_create_file("implicit_txbf", 0600, dir, dev, in mt7915_init_debugfs()
1258 debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir, in mt7915_init_debugfs()
1260 debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval); in mt7915_init_debugfs()
1262 if (!dev->dbdc_support || phy->mt76->band_idx) { in mt7915_init_debugfs()
1264 &dev->hw_pattern); in mt7915_init_debugfs()
1267 debugfs_create_devm_seqfile(dev->mt76.dev, "rdd_monitor", dir, in mt7915_init_debugfs()
1272 dev->debugfs_dir = dir; in mt7915_init_debugfs()
1278 mt7915_debugfs_write_fwlog(struct mt7915_dev *dev, const void *hdr, int hdrlen, in mt7915_debugfs_write_fwlog() argument
1286 dest = relay_reserve(dev->relay_fwlog, hdrlen + len + 4); in mt7915_debugfs_write_fwlog()
1297 relay_flush(dev->relay_fwlog); in mt7915_debugfs_write_fwlog()
1302 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len) in mt7915_debugfs_rx_fw_monitor() argument
1314 if (!dev->relay_fwlog) in mt7915_debugfs_rx_fw_monitor()
1317 hdr.timestamp = cpu_to_le32(mt76_rr(dev, MT_LPON_FRCR(0))); in mt7915_debugfs_rx_fw_monitor()
1319 mt7915_debugfs_write_fwlog(dev, &hdr, sizeof(hdr), data, len); in mt7915_debugfs_rx_fw_monitor()
1322 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len) in mt7915_debugfs_rx_log() argument
1327 if (dev->relay_fwlog) in mt7915_debugfs_rx_log()
1328 mt7915_debugfs_write_fwlog(dev, NULL, 0, data, len); in mt7915_debugfs_rx_log()
1342 struct mt7915_dev *dev = msta->vif->phy->dev; in mt7915_sta_fixed_rate_set() local
1361 /* mode - cck: 0, ofdm: 1, ht: 2, gf: 3, vht: 4, he_su: 8, he_er: 9 in mt7915_sta_fixed_rate_set()
1372 &phy.ldpc, &phy.stbc, &he_ltf) != 8) { in mt7915_sta_fixed_rate_set()
1373 dev_warn(dev->mt76.dev, in mt7915_sta_fixed_rate_set()
1388 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, field); in mt7915_sta_fixed_rate_set()