Lines Matching defs:mphy
90 mt76x02_led_set_config(struct mt76_phy *mphy, u8 delay_on, u8 delay_off)
92 struct mt76x02_dev *dev = container_of(mphy->dev, struct mt76x02_dev,
100 mt76_wr(dev, MT_LED_S0(mphy->leds.pin), val);
101 mt76_wr(dev, MT_LED_S1(mphy->leds.pin), val);
103 val = MT_LED_CTRL_REPLAY(mphy->leds.pin) |
104 MT_LED_CTRL_KICK(mphy->leds.pin);
105 if (mphy->leds.al)
106 val |= MT_LED_CTRL_POLARITY(mphy->leds.pin);
115 struct mt76_phy *mphy = container_of(led_cdev, struct mt76_phy,
122 mt76x02_led_set_config(mphy, delta_on, delta_off);
131 struct mt76_phy *mphy = container_of(led_cdev, struct mt76_phy,
135 mt76x02_led_set_config(mphy, 0, 0xff);
137 mt76x02_led_set_config(mphy, 0xff, 0);
145 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work);
169 dev->mphy.leds.cdev.brightness_set =
171 dev->mphy.leds.cdev.blink_set = mt76x02_led_set_blink;
189 dev->mphy.sband_2g.sband.ht_cap.cap |=
191 dev->mphy.sband_5g.sband.ht_cap.cap |=
193 dev->mphy.chainmask = 0x202;
194 dev->mphy.antenna_mask = 3;
196 dev->mphy.chainmask = 0x101;
197 dev->mphy.antenna_mask = 1;
305 (((vif->addr[0] ^ dev->mphy.macaddr[0]) & ~GENMASK(4, 1)) ||
306 memcmp(vif->addr + 1, dev->mphy.macaddr + 1, ETH_ALEN - 1)))
310 idx = 1 + (((dev->mphy.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
495 qid = dev->mphy.q_tx[queue]->hw_idx;
613 clear_bit(MT76_SCANNING, &dev->mphy.state);
629 mt76_stop_tx_queues(&dev->mphy, sta, true);
685 memcpy(addr, dev->mphy.macaddr, ETH_ALEN);