intel/iwlegacy/4965-mac.c

1748 		    il->stations[sta_id].tid[tid].agg.state == IL_AGG_ON) {
1749 			txq_id = il->stations[sta_id].tid[tid].agg.txq_id;
2241 	if (il->stations[sta_id].tid[tid].agg.state != IL_AGG_OFF) {
2255 	tid_data->agg.txq_id = txq_id;
2267 		tid_data->agg.state = IL_AGG_ON;
2272 		tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA;
2336 	txq_id = tid_data->agg.txq_id;
2338 	switch (il->stations[sta_id].tid[tid].agg.state) {
2360 		il->stations[sta_id].tid[tid].agg.state =
2368 	il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF;
2398 	switch (il->stations[sta_id].tid[tid].agg.state) {
2402 		if (txq_id == tid_data->agg.txq_id &&
2408 			tid_data->agg.state = IL_AGG_OFF;
2416 			tid_data->agg.state = IL_AGG_ON;
2497 il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg,
2507 	if (unlikely(!agg->wait_for_ba)) {
2514 	agg->wait_for_ba = 0;
2515 	D_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2518 	sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4);
2522 	if (agg->frame_count > (64 - sh)) {
2532 	sent_bitmap = bitmap & agg->bitmap;
2541 			   i, (agg->start_idx + i) & 0xff, agg->start_idx + i);
2548 	info = IEEE80211_SKB_CB(il->txq[scd_flow].skbs[agg->start_idx]);
2553 	info->status.ampdu_len = agg->frame_count;
2554 	il4965_hwrate_to_tx_control(il, agg->rate_n_flags, info);
2646 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg,
2657 	if (agg->wait_for_ba)
2660 	agg->frame_count = tx_resp->frame_count;
2661 	agg->start_idx = start_idx;
2662 	agg->rate_n_flags = rate_n_flags;
2663 	agg->bitmap = 0;
2666 	if (agg->frame_count == 1) {
2672 			   agg->frame_count, agg->start_idx, idx);
2684 		agg->wait_for_ba = 0;
2688 		int start = agg->start_idx;
2692 		for (i = 0; i < agg->frame_count; i++) {
2705 				   agg->frame_count, txq_id, idx);
2742 		agg->bitmap = bitmap;
2743 		agg->start_idx = start;
2745 			   agg->frame_count, agg->start_idx,
2746 			   (unsigned long long)agg->bitmap);
2749 			agg->wait_for_ba = 1;
2817 		struct il_ht_agg *agg;
2822 		agg = &il->stations[sta_id].tid[tid].agg;
2824 		il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2840 			    agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2911 	struct il_ht_agg *agg;
2932 	agg = &il->stations[sta_id].tid[tid].agg;
2933 	if (unlikely(agg->txq_id != scd_flow)) {
2941 			   scd_flow, agg->txq_id);
2951 		   agg->wait_for_ba, (u8 *) &ba_resp->sta_addr_lo32,
2957 	D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg->start_idx,
2958 		   (unsigned long long)agg->bitmap);
2961 	il4965_tx_status_reply_compressed_ba(il, agg, ba_resp);
2973 		    agg->state != IL_EMPTYING_HW_QUEUE_DELBA)