Lines Matching refs:dev
77 void b43legacy_radio_lock(struct b43legacy_wldev *dev)
81 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
84 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
88 void b43legacy_radio_unlock(struct b43legacy_wldev *dev)
92 b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); /* dummy read */
93 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
96 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
99 u16 b43legacy_radio_read16(struct b43legacy_wldev *dev, u16 offset)
101 struct b43legacy_phy *phy = &dev->phy;
122 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, offset);
123 return b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
126 void b43legacy_radio_write16(struct b43legacy_wldev *dev, u16 offset, u16 val)
128 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, offset);
129 b43legacy_write16(dev, B43legacy_MMIO_RADIO_DATA_LOW, val);
132 static void b43legacy_set_all_gains(struct b43legacy_wldev *dev,
135 struct b43legacy_phy *phy = &dev->phy;
149 b43legacy_ilt_write(dev, offset + i, first);
152 b43legacy_ilt_write(dev, offset + i, second);
156 b43legacy_phy_write(dev, 0x04A0,
157 (b43legacy_phy_read(dev, 0x04A0) & 0xBFBF)
159 b43legacy_phy_write(dev, 0x04A1,
160 (b43legacy_phy_read(dev, 0x04A1) & 0xBFBF)
162 b43legacy_phy_write(dev, 0x04A2,
163 (b43legacy_phy_read(dev, 0x04A2) & 0xBFBF)
166 b43legacy_dummy_transmission(dev);
169 static void b43legacy_set_original_gains(struct b43legacy_wldev *dev)
171 struct b43legacy_phy *phy = &dev->phy;
189 b43legacy_ilt_write(dev, offset + i, tmp);
193 b43legacy_ilt_write(dev, offset + i, i - start);
195 b43legacy_phy_write(dev, 0x04A0,
196 (b43legacy_phy_read(dev, 0x04A0) & 0xBFBF)
198 b43legacy_phy_write(dev, 0x04A1,
199 (b43legacy_phy_read(dev, 0x04A1) & 0xBFBF)
201 b43legacy_phy_write(dev, 0x04A2,
202 (b43legacy_phy_read(dev, 0x04A2) & 0xBFBF)
204 b43legacy_dummy_transmission(dev);
208 static void b43legacy_synth_pu_workaround(struct b43legacy_wldev *dev,
211 struct b43legacy_phy *phy = &dev->phy;
220 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL,
223 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL,
226 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL,
230 u8 b43legacy_radio_aci_detect(struct b43legacy_wldev *dev, u8 channel)
232 struct b43legacy_phy *phy = &dev->phy;
240 saved = b43legacy_phy_read(dev, 0x0403);
241 b43legacy_radio_selectchannel(dev, channel, 0);
242 b43legacy_phy_write(dev, 0x0403, (saved & 0xFFF8) | 5);
244 rssi = b43legacy_phy_read(dev, 0x048A) & 0x3F;
251 temp = (b43legacy_phy_read(dev, 0x047F) >> 8) & 0x3F;
259 b43legacy_phy_write(dev, 0x0403, saved);
264 u8 b43legacy_radio_aci_scan(struct b43legacy_wldev *dev)
266 struct b43legacy_phy *phy = &dev->phy;
277 b43legacy_phy_lock(dev);
278 b43legacy_radio_lock(dev);
279 b43legacy_phy_write(dev, 0x0802,
280 b43legacy_phy_read(dev, 0x0802) & 0xFFFC);
281 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
282 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS)
284 b43legacy_set_all_gains(dev, 3, 8, 1);
291 ret[i-1] = b43legacy_radio_aci_detect(dev, i);
293 b43legacy_radio_selectchannel(dev, channel, 0);
294 b43legacy_phy_write(dev, 0x0802,
295 (b43legacy_phy_read(dev, 0x0802) & 0xFFFC)
297 b43legacy_phy_write(dev, 0x0403,
298 b43legacy_phy_read(dev, 0x0403) & 0xFFF8);
299 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
300 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS)
302 b43legacy_set_original_gains(dev);
310 b43legacy_radio_unlock(dev);
311 b43legacy_phy_unlock(dev);
317 void b43legacy_nrssi_hw_write(struct b43legacy_wldev *dev, u16 offset, s16 val)
319 b43legacy_phy_write(dev, B43legacy_PHY_NRSSILT_CTRL, offset);
320 b43legacy_phy_write(dev, B43legacy_PHY_NRSSILT_DATA, (u16)val);
324 s16 b43legacy_nrssi_hw_read(struct b43legacy_wldev *dev, u16 offset)
328 b43legacy_phy_write(dev, B43legacy_PHY_NRSSILT_CTRL, offset);
329 val = b43legacy_phy_read(dev, B43legacy_PHY_NRSSILT_DATA);
335 void b43legacy_nrssi_hw_update(struct b43legacy_wldev *dev, u16 val)
341 tmp = b43legacy_nrssi_hw_read(dev, i);
344 b43legacy_nrssi_hw_write(dev, i, tmp);
349 void b43legacy_nrssi_mem_update(struct b43legacy_wldev *dev)
351 struct b43legacy_phy *phy = &dev->phy;
366 static void b43legacy_calc_nrssi_offset(struct b43legacy_wldev *dev)
368 struct b43legacy_phy *phy = &dev->phy;
374 backup[0] = b43legacy_phy_read(dev, 0x0001);
375 backup[1] = b43legacy_phy_read(dev, 0x0811);
376 backup[2] = b43legacy_phy_read(dev, 0x0812);
377 backup[3] = b43legacy_phy_read(dev, 0x0814);
378 backup[4] = b43legacy_phy_read(dev, 0x0815);
379 backup[5] = b43legacy_phy_read(dev, 0x005A);
380 backup[6] = b43legacy_phy_read(dev, 0x0059);
381 backup[7] = b43legacy_phy_read(dev, 0x0058);
382 backup[8] = b43legacy_phy_read(dev, 0x000A);
383 backup[9] = b43legacy_phy_read(dev, 0x0003);
384 backup[10] = b43legacy_radio_read16(dev, 0x007A);
385 backup[11] = b43legacy_radio_read16(dev, 0x0043);
387 b43legacy_phy_write(dev, 0x0429,
388 b43legacy_phy_read(dev, 0x0429) & 0x7FFF);
389 b43legacy_phy_write(dev, 0x0001,
390 (b43legacy_phy_read(dev, 0x0001) & 0x3FFF)
392 b43legacy_phy_write(dev, 0x0811,
393 b43legacy_phy_read(dev, 0x0811) | 0x000C);
394 b43legacy_phy_write(dev, 0x0812,
395 (b43legacy_phy_read(dev, 0x0812) & 0xFFF3)
397 b43legacy_phy_write(dev, 0x0802,
398 b43legacy_phy_read(dev, 0x0802) & ~(0x1 | 0x2));
400 backup[12] = b43legacy_phy_read(dev, 0x002E);
401 backup[13] = b43legacy_phy_read(dev, 0x002F);
402 backup[14] = b43legacy_phy_read(dev, 0x080F);
403 backup[15] = b43legacy_phy_read(dev, 0x0810);
404 backup[16] = b43legacy_phy_read(dev, 0x0801);
405 backup[17] = b43legacy_phy_read(dev, 0x0060);
406 backup[18] = b43legacy_phy_read(dev, 0x0014);
407 backup[19] = b43legacy_phy_read(dev, 0x0478);
409 b43legacy_phy_write(dev, 0x002E, 0);
410 b43legacy_phy_write(dev, 0x002F, 0);
411 b43legacy_phy_write(dev, 0x080F, 0);
412 b43legacy_phy_write(dev, 0x0810, 0);
413 b43legacy_phy_write(dev, 0x0478,
414 b43legacy_phy_read(dev, 0x0478) | 0x0100);
415 b43legacy_phy_write(dev, 0x0801,
416 b43legacy_phy_read(dev, 0x0801) | 0x0040);
417 b43legacy_phy_write(dev, 0x0060,
418 b43legacy_phy_read(dev, 0x0060) | 0x0040);
419 b43legacy_phy_write(dev, 0x0014,
420 b43legacy_phy_read(dev, 0x0014) | 0x0200);
422 b43legacy_radio_write16(dev, 0x007A,
423 b43legacy_radio_read16(dev, 0x007A) | 0x0070);
424 b43legacy_radio_write16(dev, 0x007A,
425 b43legacy_radio_read16(dev, 0x007A) | 0x0080);
428 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F);
433 b43legacy_radio_write16(dev, 0x007B, i);
435 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8)
445 b43legacy_radio_write16(dev, 0x007A,
446 b43legacy_radio_read16(dev, 0x007A)
448 b43legacy_phy_write(dev, 0x0814,
449 b43legacy_phy_read(dev, 0x0814) | 0x0001);
450 b43legacy_phy_write(dev, 0x0815,
451 b43legacy_phy_read(dev, 0x0815) & 0xFFFE);
452 b43legacy_phy_write(dev, 0x0811,
453 b43legacy_phy_read(dev, 0x0811) | 0x000C);
454 b43legacy_phy_write(dev, 0x0812,
455 b43legacy_phy_read(dev, 0x0812) | 0x000C);
456 b43legacy_phy_write(dev, 0x0811,
457 b43legacy_phy_read(dev, 0x0811) | 0x0030);
458 b43legacy_phy_write(dev, 0x0812,
459 b43legacy_phy_read(dev, 0x0812) | 0x0030);
460 b43legacy_phy_write(dev, 0x005A, 0x0480);
461 b43legacy_phy_write(dev, 0x0059, 0x0810);
462 b43legacy_phy_write(dev, 0x0058, 0x000D);
464 b43legacy_phy_write(dev, 0x0003, 0x0122);
466 b43legacy_phy_write(dev, 0x000A,
467 b43legacy_phy_read(dev, 0x000A)
469 b43legacy_phy_write(dev, 0x0814,
470 b43legacy_phy_read(dev, 0x0814) | 0x0004);
471 b43legacy_phy_write(dev, 0x0815,
472 b43legacy_phy_read(dev, 0x0815) & 0xFFFB);
473 b43legacy_phy_write(dev, 0x0003,
474 (b43legacy_phy_read(dev, 0x0003) & 0xFF9F)
476 b43legacy_radio_write16(dev, 0x007A,
477 b43legacy_radio_read16(dev, 0x007A)
479 b43legacy_set_all_gains(dev, 3, 0, 1);
480 b43legacy_radio_write16(dev, 0x0043,
481 (b43legacy_radio_read16(dev, 0x0043)
484 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F);
489 b43legacy_radio_write16(dev, 0x007B, i);
491 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >>
503 b43legacy_radio_write16(dev, 0x007B, saved);
506 b43legacy_phy_write(dev, 0x002E, backup[12]);
507 b43legacy_phy_write(dev, 0x002F, backup[13]);
508 b43legacy_phy_write(dev, 0x080F, backup[14]);
509 b43legacy_phy_write(dev, 0x0810, backup[15]);
511 b43legacy_phy_write(dev, 0x0814, backup[3]);
512 b43legacy_phy_write(dev, 0x0815, backup[4]);
513 b43legacy_phy_write(dev, 0x005A, backup[5]);
514 b43legacy_phy_write(dev, 0x0059, backup[6]);
515 b43legacy_phy_write(dev, 0x0058, backup[7]);
516 b43legacy_phy_write(dev, 0x000A, backup[8]);
517 b43legacy_phy_write(dev, 0x0003, backup[9]);
518 b43legacy_radio_write16(dev, 0x0043, backup[11]);
519 b43legacy_radio_write16(dev, 0x007A, backup[10]);
520 b43legacy_phy_write(dev, 0x0802,
521 b43legacy_phy_read(dev, 0x0802) | 0x1 | 0x2);
522 b43legacy_phy_write(dev, 0x0429,
523 b43legacy_phy_read(dev, 0x0429) | 0x8000);
524 b43legacy_set_original_gains(dev);
526 b43legacy_phy_write(dev, 0x0801, backup[16]);
527 b43legacy_phy_write(dev, 0x0060, backup[17]);
528 b43legacy_phy_write(dev, 0x0014, backup[18]);
529 b43legacy_phy_write(dev, 0x0478, backup[19]);
531 b43legacy_phy_write(dev, 0x0001, backup[0]);
532 b43legacy_phy_write(dev, 0x0812, backup[2]);
533 b43legacy_phy_write(dev, 0x0811, backup[1]);
536 void b43legacy_calc_nrssi_slope(struct b43legacy_wldev *dev)
538 struct b43legacy_phy *phy = &dev->phy;
546 backup[0] = b43legacy_radio_read16(dev, 0x007A);
547 backup[1] = b43legacy_radio_read16(dev, 0x0052);
548 backup[2] = b43legacy_radio_read16(dev, 0x0043);
549 backup[3] = b43legacy_phy_read(dev, 0x0030);
550 backup[4] = b43legacy_phy_read(dev, 0x0026);
551 backup[5] = b43legacy_phy_read(dev, 0x0015);
552 backup[6] = b43legacy_phy_read(dev, 0x002A);
553 backup[7] = b43legacy_phy_read(dev, 0x0020);
554 backup[8] = b43legacy_phy_read(dev, 0x005A);
555 backup[9] = b43legacy_phy_read(dev, 0x0059);
556 backup[10] = b43legacy_phy_read(dev, 0x0058);
557 backup[11] = b43legacy_read16(dev, 0x03E2);
558 backup[12] = b43legacy_read16(dev, 0x03E6);
559 backup[13] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
561 tmp = b43legacy_radio_read16(dev, 0x007A);
563 b43legacy_radio_write16(dev, 0x007A, tmp);
564 b43legacy_phy_write(dev, 0x0030, 0x00FF);
565 b43legacy_write16(dev, 0x03EC, 0x7F7F);
566 b43legacy_phy_write(dev, 0x0026, 0x0000);
567 b43legacy_phy_write(dev, 0x0015,
568 b43legacy_phy_read(dev, 0x0015) | 0x0020);
569 b43legacy_phy_write(dev, 0x002A, 0x08A3);
570 b43legacy_radio_write16(dev, 0x007A,
571 b43legacy_radio_read16(dev, 0x007A)
574 nrssi0 = (s16)b43legacy_phy_read(dev, 0x0027);
575 b43legacy_radio_write16(dev, 0x007A,
576 b43legacy_radio_read16(dev, 0x007A)
579 b43legacy_write16(dev, 0x03E6, 0x0040);
581 b43legacy_write16(dev, 0x03E6, 0x0122);
583 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT,
584 b43legacy_read16(dev,
586 b43legacy_phy_write(dev, 0x0020, 0x3F3F);
587 b43legacy_phy_write(dev, 0x0015, 0xF330);
588 b43legacy_radio_write16(dev, 0x005A, 0x0060);
589 b43legacy_radio_write16(dev, 0x0043,
590 b43legacy_radio_read16(dev, 0x0043)
592 b43legacy_phy_write(dev, 0x005A, 0x0480);
593 b43legacy_phy_write(dev, 0x0059, 0x0810);
594 b43legacy_phy_write(dev, 0x0058, 0x000D);
597 nrssi1 = (s16)b43legacy_phy_read(dev, 0x0027);
598 b43legacy_phy_write(dev, 0x0030, backup[3]);
599 b43legacy_radio_write16(dev, 0x007A, backup[0]);
600 b43legacy_write16(dev, 0x03E2, backup[11]);
601 b43legacy_phy_write(dev, 0x0026, backup[4]);
602 b43legacy_phy_write(dev, 0x0015, backup[5]);
603 b43legacy_phy_write(dev, 0x002A, backup[6]);
604 b43legacy_synth_pu_workaround(dev, phy->channel);
606 b43legacy_write16(dev, 0x03F4, backup[13]);
608 b43legacy_phy_write(dev, 0x0020, backup[7]);
609 b43legacy_phy_write(dev, 0x005A, backup[8]);
610 b43legacy_phy_write(dev, 0x0059, backup[9]);
611 b43legacy_phy_write(dev, 0x0058, backup[10]);
612 b43legacy_radio_write16(dev, 0x0052, backup[1]);
613 b43legacy_radio_write16(dev, 0x0043, backup[2]);
629 b43legacy_calc_nrssi_offset(dev);
631 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
632 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS)
634 b43legacy_phy_write(dev, 0x0802,
635 b43legacy_phy_read(dev, 0x0802) & 0xFFFC);
636 backup[7] = b43legacy_read16(dev, 0x03E2);
637 b43legacy_write16(dev, 0x03E2,
638 b43legacy_read16(dev, 0x03E2) | 0x8000);
639 backup[0] = b43legacy_radio_read16(dev, 0x007A);
640 backup[1] = b43legacy_radio_read16(dev, 0x0052);
641 backup[2] = b43legacy_radio_read16(dev, 0x0043);
642 backup[3] = b43legacy_phy_read(dev, 0x0015);
643 backup[4] = b43legacy_phy_read(dev, 0x005A);
644 backup[5] = b43legacy_phy_read(dev, 0x0059);
645 backup[6] = b43legacy_phy_read(dev, 0x0058);
646 backup[8] = b43legacy_read16(dev, 0x03E6);
647 backup[9] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
649 backup[10] = b43legacy_phy_read(dev, 0x002E);
650 backup[11] = b43legacy_phy_read(dev, 0x002F);
651 backup[12] = b43legacy_phy_read(dev, 0x080F);
652 backup[13] = b43legacy_phy_read(dev,
654 backup[14] = b43legacy_phy_read(dev, 0x0801);
655 backup[15] = b43legacy_phy_read(dev, 0x0060);
656 backup[16] = b43legacy_phy_read(dev, 0x0014);
657 backup[17] = b43legacy_phy_read(dev, 0x0478);
658 b43legacy_phy_write(dev, 0x002E, 0);
659 b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, 0);
662 b43legacy_phy_write(dev, 0x0478,
663 b43legacy_phy_read(dev,
665 b43legacy_phy_write(dev, 0x0801,
666 b43legacy_phy_read(dev,
670 b43legacy_phy_write(dev, 0x0801,
671 b43legacy_phy_read(dev,
675 b43legacy_phy_write(dev, 0x0060,
676 b43legacy_phy_read(dev, 0x0060)
678 b43legacy_phy_write(dev, 0x0014,
679 b43legacy_phy_read(dev, 0x0014)
682 b43legacy_radio_write16(dev, 0x007A,
683 b43legacy_radio_read16(dev, 0x007A)
685 b43legacy_set_all_gains(dev, 0, 8, 0);
686 b43legacy_radio_write16(dev, 0x007A,
687 b43legacy_radio_read16(dev, 0x007A)
690 b43legacy_phy_write(dev, 0x0811,
691 (b43legacy_phy_read(dev, 0x0811)
693 b43legacy_phy_write(dev, 0x0812,
694 (b43legacy_phy_read(dev, 0x0812)
697 b43legacy_radio_write16(dev, 0x007A,
698 b43legacy_radio_read16(dev, 0x007A)
702 nrssi0 = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F);
706 b43legacy_radio_write16(dev, 0x007A,
707 b43legacy_radio_read16(dev, 0x007A)
710 b43legacy_phy_write(dev, 0x0003,
711 (b43legacy_phy_read(dev, 0x0003)
714 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT,
715 b43legacy_read16(dev,
717 b43legacy_radio_write16(dev, 0x007A,
718 b43legacy_radio_read16(dev, 0x007A)
720 b43legacy_phy_write(dev, 0x0015, 0xF330);
722 b43legacy_phy_write(dev, 0x0812,
723 (b43legacy_phy_read(dev, 0x0812)
725 b43legacy_phy_write(dev, 0x0811,
726 (b43legacy_phy_read(dev, 0x0811)
730 b43legacy_set_all_gains(dev, 3, 0, 1);
732 b43legacy_radio_write16(dev, 0x0043, 0x001F);
734 tmp = b43legacy_radio_read16(dev, 0x0052) & 0xFF0F;
735 b43legacy_radio_write16(dev, 0x0052, tmp | 0x0060);
736 tmp = b43legacy_radio_read16(dev, 0x0043) & 0xFFF0;
737 b43legacy_radio_write16(dev, 0x0043, tmp | 0x0009);
739 b43legacy_phy_write(dev, 0x005A, 0x0480);
740 b43legacy_phy_write(dev, 0x0059, 0x0810);
741 b43legacy_phy_write(dev, 0x0058, 0x000D);
743 nrssi1 = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F);
755 b43legacy_phy_write(dev, 0x002E, backup[10]);
756 b43legacy_phy_write(dev, 0x002F, backup[11]);
757 b43legacy_phy_write(dev, 0x080F, backup[12]);
758 b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL,
762 b43legacy_phy_write(dev, 0x0812,
763 b43legacy_phy_read(dev, 0x0812)
765 b43legacy_phy_write(dev, 0x0811,
766 b43legacy_phy_read(dev, 0x0811)
770 b43legacy_radio_write16(dev, 0x007A, backup[0]);
771 b43legacy_radio_write16(dev, 0x0052, backup[1]);
772 b43legacy_radio_write16(dev, 0x0043, backup[2]);
773 b43legacy_write16(dev, 0x03E2, backup[7]);
774 b43legacy_write16(dev, 0x03E6, backup[8]);
775 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, backup[9]);
776 b43legacy_phy_write(dev, 0x0015, backup[3]);
777 b43legacy_phy_write(dev, 0x005A, backup[4]);
778 b43legacy_phy_write(dev, 0x0059, backup[5]);
779 b43legacy_phy_write(dev, 0x0058, backup[6]);
780 b43legacy_synth_pu_workaround(dev, phy->channel);
781 b43legacy_phy_write(dev, 0x0802,
782 b43legacy_phy_read(dev, 0x0802) | 0x0003);
783 b43legacy_set_original_gains(dev);
784 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
785 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS)
788 b43legacy_phy_write(dev, 0x0801, backup[14]);
789 b43legacy_phy_write(dev, 0x0060, backup[15]);
790 b43legacy_phy_write(dev, 0x0014, backup[16]);
791 b43legacy_phy_write(dev, 0x0478, backup[17]);
793 b43legacy_nrssi_mem_update(dev);
794 b43legacy_calc_nrssi_threshold(dev);
801 void b43legacy_calc_nrssi_threshold(struct b43legacy_wldev *dev)
803 struct b43legacy_phy *phy = &dev->phy;
814 if (!(dev->dev->bus->sprom.boardflags_lo &
826 b43legacy_phy_read(dev, 0x0020); /* dummy read */
827 b43legacy_phy_write(dev, 0x0020, (((u16)threshold) << 8)
831 b43legacy_phy_write(dev, 0x0087, 0x0E0D);
832 b43legacy_phy_write(dev, 0x0086, 0x0C0B);
833 b43legacy_phy_write(dev, 0x0085, 0x0A09);
834 b43legacy_phy_write(dev, 0x0084, 0x0808);
835 b43legacy_phy_write(dev, 0x0083, 0x0808);
836 b43legacy_phy_write(dev, 0x0082, 0x0604);
837 b43legacy_phy_write(dev, 0x0081, 0x0302);
838 b43legacy_phy_write(dev, 0x0080, 0x0100);
844 !(dev->dev->bus->sprom.boardflags_lo &
846 tmp16 = b43legacy_nrssi_hw_read(dev, 0x20);
850 b43legacy_phy_write(dev, 0x048A,
851 (b43legacy_phy_read(dev,
854 b43legacy_phy_write(dev, 0x048A,
855 (b43legacy_phy_read(dev,
889 tmp_u16 = b43legacy_phy_read(dev, 0x048A) & 0xF000;
892 b43legacy_phy_write(dev, 0x048A, tmp_u16);
940 b43legacy_phy_read(dev, (offset))); \
944 b43legacy_phy_write(dev, (offset), \
951 b43legacy_radio_read16(dev, (offset))); \
955 b43legacy_radio_write16(dev, (offset), \
962 b43legacy_ilt_read(dev, (offset))); \
966 b43legacy_ilt_write(dev, (offset), \
972 b43legacy_radio_interference_mitigation_enable(struct b43legacy_wldev *dev,
975 struct b43legacy_phy *phy = &dev->phy;
985 b43legacy_phy_write(dev, 0x042B,
986 b43legacy_phy_read(dev, 0x042B)
988 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
989 b43legacy_phy_read(dev,
994 tmp = (b43legacy_radio_read16(dev, 0x0078) & 0x001E);
1002 b43legacy_radio_write16(dev, 0x0078, flipped);
1004 b43legacy_calc_nrssi_threshold(dev);
1007 b43legacy_phy_write(dev, 0x0406, 0x7E28);
1009 b43legacy_phy_write(dev, 0x042B,
1010 b43legacy_phy_read(dev, 0x042B) | 0x0800);
1011 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
1012 b43legacy_phy_read(dev,
1016 b43legacy_phy_write(dev, 0x04A0,
1017 (b43legacy_phy_read(dev, 0x04A0) & 0xC0C0)
1020 b43legacy_phy_write(dev, 0x04A1,
1021 (b43legacy_phy_read(dev, 0x04A1) & 0xC0C0)
1024 b43legacy_phy_write(dev, 0x04A2,
1025 (b43legacy_phy_read(dev, 0x04A2) & 0xC0C0)
1028 b43legacy_phy_write(dev, 0x04A8,
1029 (b43legacy_phy_read(dev, 0x04A8) & 0xC0C0)
1032 b43legacy_phy_write(dev, 0x04AB,
1033 (b43legacy_phy_read(dev, 0x04AB) & 0xC0C0)
1037 b43legacy_phy_write(dev, 0x04A7, 0x0002);
1039 b43legacy_phy_write(dev, 0x04A3, 0x287A);
1041 b43legacy_phy_write(dev, 0x04A9, 0x2027);
1043 b43legacy_phy_write(dev, 0x0493, 0x32F5);
1045 b43legacy_phy_write(dev, 0x04AA, 0x2027);
1047 b43legacy_phy_write(dev, 0x04AC, 0x32F5);
1050 if (b43legacy_phy_read(dev, 0x0033) & 0x0800)
1090 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
1091 b43legacy_phy_read(dev,
1093 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
1094 (b43legacy_phy_read(dev,
1098 b43legacy_phy_write(dev, 0x0033, 0x0800);
1099 b43legacy_phy_write(dev, 0x04A3, 0x2027);
1100 b43legacy_phy_write(dev, 0x04A9, 0x1CA8);
1101 b43legacy_phy_write(dev, 0x0493, 0x287A);
1102 b43legacy_phy_write(dev, 0x04AA, 0x1CA8);
1103 b43legacy_phy_write(dev, 0x04AC, 0x287A);
1105 b43legacy_phy_write(dev, 0x04A0,
1106 (b43legacy_phy_read(dev, 0x04A0)
1108 b43legacy_phy_write(dev, 0x04A7, 0x000D);
1111 b43legacy_phy_write(dev, 0x0406, 0xFF0D);
1113 b43legacy_phy_write(dev, 0x04C0, 0xFFFF);
1114 b43legacy_phy_write(dev, 0x04C1, 0x00A9);
1116 b43legacy_phy_write(dev, 0x04C0, 0x00C1);
1117 b43legacy_phy_write(dev, 0x04C1, 0x0059);
1120 b43legacy_phy_write(dev, 0x04A1,
1121 (b43legacy_phy_read(dev, 0x04A1)
1123 b43legacy_phy_write(dev, 0x04A1,
1124 (b43legacy_phy_read(dev, 0x04A1)
1126 b43legacy_phy_write(dev, 0x04A8,
1127 (b43legacy_phy_read(dev, 0x04A8)
1129 b43legacy_phy_write(dev, 0x04A8,
1130 (b43legacy_phy_read(dev, 0x04A8)
1132 b43legacy_phy_write(dev, 0x04AB,
1133 (b43legacy_phy_read(dev, 0x04AB)
1135 b43legacy_phy_write(dev, 0x04AB,
1136 (b43legacy_phy_read(dev, 0x04AB)
1138 b43legacy_phy_write(dev, 0x04AB,
1139 (b43legacy_phy_read(dev, 0x04AB)
1141 b43legacy_phy_write(dev, 0x04AB,
1142 (b43legacy_phy_read(dev, 0x04AB)
1144 b43legacy_phy_write(dev, 0x04A8,
1145 (b43legacy_phy_read(dev, 0x04A8)
1147 b43legacy_phy_write(dev, 0x04A8,
1148 (b43legacy_phy_read(dev, 0x04A8)
1150 b43legacy_phy_write(dev, 0x04A2,
1151 (b43legacy_phy_read(dev, 0x04A2)
1153 b43legacy_phy_write(dev, 0x04A0,
1154 (b43legacy_phy_read(dev, 0x04A0)
1156 b43legacy_phy_write(dev, 0x04A2,
1157 (b43legacy_phy_read(dev, 0x04A2)
1161 b43legacy_phy_write(dev, 0x048A,
1162 b43legacy_phy_read(dev, 0x048A)
1164 b43legacy_phy_write(dev, 0x0415,
1165 (b43legacy_phy_read(dev, 0x0415)
1167 b43legacy_phy_write(dev, 0x0416,
1168 (b43legacy_phy_read(dev, 0x0416)
1170 b43legacy_phy_write(dev, 0x0417,
1171 (b43legacy_phy_read(dev, 0x0417)
1174 b43legacy_phy_write(dev, 0x048A,
1175 b43legacy_phy_read(dev, 0x048A)
1177 b43legacy_phy_write(dev, 0x048A,
1178 (b43legacy_phy_read(dev, 0x048A)
1180 tmp32 = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
1184 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1190 b43legacy_phy_write(dev, 0x042B,
1191 b43legacy_phy_read(dev, 0x042B)
1193 b43legacy_phy_write(dev, 0x048C,
1194 (b43legacy_phy_read(dev, 0x048C)
1197 b43legacy_phy_write(dev, 0x04AE,
1198 (b43legacy_phy_read(dev, 0x04AE)
1200 b43legacy_phy_write(dev, 0x04AD,
1201 (b43legacy_phy_read(dev, 0x04AD)
1204 b43legacy_ilt_write(dev, 0x1A00 + 0x3, 0x007F);
1205 b43legacy_ilt_write(dev, 0x1A00 + 0x2, 0x007F);
1206 b43legacy_phy_write(dev, 0x04AD,
1207 b43legacy_phy_read(dev, 0x04AD)
1210 b43legacy_calc_nrssi_slope(dev);
1218 b43legacy_radio_interference_mitigation_disable(struct b43legacy_wldev *dev,
1221 struct b43legacy_phy *phy = &dev->phy;
1228 b43legacy_phy_write(dev, 0x042B,
1229 b43legacy_phy_read(dev, 0x042B)
1231 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
1232 b43legacy_phy_read(dev,
1237 b43legacy_calc_nrssi_threshold(dev);
1239 b43legacy_phy_write(dev, 0x042B,
1240 b43legacy_phy_read(dev, 0x042B) & ~0x0800);
1241 if (!dev->bad_frames_preempt)
1242 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
1243 b43legacy_phy_read(dev,
1246 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
1247 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS)
1262 if (!(b43legacy_phy_read(dev, 0x0033) & 0x0800))
1300 tmp32 = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
1304 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1308 b43legacy_calc_nrssi_slope(dev);
1322 int b43legacy_radio_set_interference_mitigation(struct b43legacy_wldev *dev,
1325 struct b43legacy_phy *phy = &dev->phy;
1353 b43legacy_radio_interference_mitigation_disable(dev,
1360 b43legacy_radio_interference_mitigation_enable(dev, mode);
1366 u16 b43legacy_radio_calibrationvalue(struct b43legacy_wldev *dev)
1372 reg = b43legacy_radio_read16(dev, 0x0060);
1382 static u16 b43legacy_get_812_value(struct b43legacy_wldev *dev, u8 lpd)
1384 struct b43legacy_phy *phy = &dev->phy;
1393 if (phy->rev < 7 || !(dev->dev->bus->sprom.boardflags_lo
1446 if (phy->rev >= 7 && dev->dev->bus->sprom.boardflags_lo
1479 u16 b43legacy_radio_init2050(struct b43legacy_wldev *dev)
1481 struct b43legacy_phy *phy = &dev->phy;
1489 backup[0] = b43legacy_radio_read16(dev, 0x0043);
1490 backup[14] = b43legacy_radio_read16(dev, 0x0051);
1491 backup[15] = b43legacy_radio_read16(dev, 0x0052);
1492 backup[1] = b43legacy_phy_read(dev, 0x0015);
1493 backup[16] = b43legacy_phy_read(dev, 0x005A);
1494 backup[17] = b43legacy_phy_read(dev, 0x0059);
1495 backup[18] = b43legacy_phy_read(dev, 0x0058);
1497 backup[2] = b43legacy_phy_read(dev, 0x0030);
1498 backup[3] = b43legacy_read16(dev, 0x03EC);
1499 b43legacy_phy_write(dev, 0x0030, 0x00FF);
1500 b43legacy_write16(dev, 0x03EC, 0x3F3F);
1503 backup[4] = b43legacy_phy_read(dev, 0x0811);
1504 backup[5] = b43legacy_phy_read(dev, 0x0812);
1505 backup[6] = b43legacy_phy_read(dev, 0x0814);
1506 backup[7] = b43legacy_phy_read(dev, 0x0815);
1507 backup[8] = b43legacy_phy_read(dev,
1509 backup[9] = b43legacy_phy_read(dev, 0x0802);
1510 b43legacy_phy_write(dev, 0x0814,
1511 (b43legacy_phy_read(dev, 0x0814)
1513 b43legacy_phy_write(dev, 0x0815,
1514 (b43legacy_phy_read(dev, 0x0815)
1516 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
1517 (b43legacy_phy_read(dev,
1519 b43legacy_phy_write(dev, 0x0802,
1520 (b43legacy_phy_read(dev, 0x0802)
1523 backup[19] = b43legacy_phy_read(dev, 0x080F);
1524 backup[20] = b43legacy_phy_read(dev, 0x0810);
1526 b43legacy_phy_write(dev, 0x080F,
1529 b43legacy_phy_write(dev, 0x080F,
1531 b43legacy_phy_write(dev, 0x0810, 0x0000);
1533 b43legacy_phy_write(dev, 0x0812,
1534 b43legacy_get_812_value(dev,
1537 !(dev->dev->bus->sprom.boardflags_lo
1539 b43legacy_phy_write(dev, 0x0811, 0x01B3);
1541 b43legacy_phy_write(dev, 0x0811, 0x09B3);
1544 b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO,
1545 (b43legacy_read16(dev, B43legacy_MMIO_PHY_RADIO)
1547 backup[10] = b43legacy_phy_read(dev, 0x0035);
1548 b43legacy_phy_write(dev, 0x0035,
1549 (b43legacy_phy_read(dev, 0x0035) & 0xFF7F));
1550 backup[11] = b43legacy_read16(dev, 0x03E6);
1551 backup[12] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
1555 b43legacy_write16(dev, 0x03E6, 0x0122);
1558 b43legacy_phy_write(dev, 0x0003,
1559 (b43legacy_phy_read(dev, 0x0003)
1561 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT,
1562 (b43legacy_read16(dev,
1566 ret = b43legacy_radio_calibrationvalue(dev);
1569 b43legacy_radio_write16(dev, 0x0078, 0x0026);
1572 b43legacy_phy_write(dev, 0x0812,
1573 b43legacy_get_812_value(dev,
1575 b43legacy_phy_write(dev, 0x0015, 0xBFAF);
1576 b43legacy_phy_write(dev, 0x002B, 0x1403);
1578 b43legacy_phy_write(dev, 0x0812,
1579 b43legacy_get_812_value(dev,
1581 b43legacy_phy_write(dev, 0x0015, 0xBFA0);
1582 b43legacy_radio_write16(dev, 0x0051,
1583 (b43legacy_radio_read16(dev, 0x0051)
1586 b43legacy_radio_write16(dev, 0x0043, 0x001F);
1588 b43legacy_radio_write16(dev, 0x0052, 0x0000);
1589 b43legacy_radio_write16(dev, 0x0043,
1590 (b43legacy_radio_read16(dev, 0x0043)
1593 b43legacy_phy_write(dev, 0x0058, 0x0000);
1596 b43legacy_phy_write(dev, 0x005A, 0x0480);
1597 b43legacy_phy_write(dev, 0x0059, 0xC810);
1598 b43legacy_phy_write(dev, 0x0058, 0x000D);
1600 b43legacy_phy_write(dev, 0x0812,
1601 b43legacy_get_812_value(dev,
1603 b43legacy_phy_write(dev, 0x0015, 0xAFB0);
1606 b43legacy_phy_write(dev, 0x0812,
1607 b43legacy_get_812_value(dev,
1609 b43legacy_phy_write(dev, 0x0015, 0xEFB0);
1612 b43legacy_phy_write(dev, 0x0812,
1613 b43legacy_get_812_value(dev,
1615 b43legacy_phy_write(dev, 0x0015, 0xFFF0);
1617 tmp1 += b43legacy_phy_read(dev, 0x002D);
1618 b43legacy_phy_write(dev, 0x0058, 0x0000);
1620 b43legacy_phy_write(dev, 0x0812,
1621 b43legacy_get_812_value(dev,
1623 b43legacy_phy_write(dev, 0x0015, 0xAFB0);
1629 b43legacy_phy_write(dev, 0x0058, 0x0000);
1632 b43legacy_radio_write16(dev, 0x0078, (flip_4bit(i) << 1)
1634 backup[13] = b43legacy_radio_read16(dev, 0x0078);
1637 b43legacy_phy_write(dev, 0x005A, 0x0D80);
1638 b43legacy_phy_write(dev, 0x0059, 0xC810);
1639 b43legacy_phy_write(dev, 0x0058, 0x000D);
1641 b43legacy_phy_write(dev, 0x0812,
1642 b43legacy_get_812_value(dev,
1644 b43legacy_phy_write(dev, 0x0015, 0xAFB0);
1647 b43legacy_phy_write(dev, 0x0812,
1648 b43legacy_get_812_value(dev,
1650 b43legacy_phy_write(dev, 0x0015, 0xEFB0);
1653 b43legacy_phy_write(dev, 0x0812,
1654 b43legacy_get_812_value(dev,
1656 b43legacy_phy_write(dev, 0x0015, 0xFFF0);
1658 tmp2 += b43legacy_phy_read(dev, 0x002D);
1659 b43legacy_phy_write(dev, 0x0058, 0x0000);
1661 b43legacy_phy_write(dev, 0x0812,
1662 b43legacy_get_812_value(dev,
1664 b43legacy_phy_write(dev, 0x0015, 0xAFB0);
1673 b43legacy_phy_write(dev, 0x0015, backup[1]);
1674 b43legacy_radio_write16(dev, 0x0051, backup[14]);
1675 b43legacy_radio_write16(dev, 0x0052, backup[15]);
1676 b43legacy_radio_write16(dev, 0x0043, backup[0]);
1677 b43legacy_phy_write(dev, 0x005A, backup[16]);
1678 b43legacy_phy_write(dev, 0x0059, backup[17]);
1679 b43legacy_phy_write(dev, 0x0058, backup[18]);
1680 b43legacy_write16(dev, 0x03E6, backup[11]);
1682 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, backup[12]);
1683 b43legacy_phy_write(dev, 0x0035, backup[10]);
1684 b43legacy_radio_selectchannel(dev, phy->channel, 1);
1686 b43legacy_phy_write(dev, 0x0030, backup[2]);
1687 b43legacy_write16(dev, 0x03EC, backup[3]);
1690 b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO,
1691 (b43legacy_read16(dev,
1693 b43legacy_phy_write(dev, 0x0811, backup[4]);
1694 b43legacy_phy_write(dev, 0x0812, backup[5]);
1695 b43legacy_phy_write(dev, 0x0814, backup[6]);
1696 b43legacy_phy_write(dev, 0x0815, backup[7]);
1697 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
1699 b43legacy_phy_write(dev, 0x0802, backup[9]);
1701 b43legacy_phy_write(dev, 0x080F, backup[19]);
1702 b43legacy_phy_write(dev, 0x0810, backup[20]);
1712 int b43legacy_radio_selectchannel(struct b43legacy_wldev *dev,
1716 struct b43legacy_phy *phy = &dev->phy;
1731 b43legacy_synth_pu_workaround(dev, channel);
1733 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL,
1737 if (dev->dev->bus->sprom.country_code == 5) /* JAPAN) */
1738 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1740 b43legacy_shm_read32(dev,
1745 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1747 b43legacy_shm_read32(dev,
1751 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT,
1752 b43legacy_read16(dev,
1755 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT,
1756 b43legacy_read16(dev,
1767 void b43legacy_radio_set_txantenna(struct b43legacy_wldev *dev, u32 val)
1772 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0022) & 0xFCFF;
1773 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0022, tmp | val);
1774 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x03A8) & 0xFCFF;
1775 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x03A8, tmp | val);
1776 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0054) & 0xFCFF;
1777 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0054, tmp | val);
1847 void b43legacy_radio_set_txpower_a(struct b43legacy_wldev *dev, u16 txpower)
1849 struct b43legacy_phy *phy = &dev->phy;
1860 b43legacy_phy_write(dev, 0x0019, pamp);
1864 b43legacy_phy_write(dev, 0x0017, base | 0x0020);
1866 ilt = b43legacy_ilt_read(dev, 0x3001);
1873 b43legacy_ilt_write(dev, 0x3001, dac);
1880 void b43legacy_radio_set_txpower_bg(struct b43legacy_wldev *dev,
1885 struct b43legacy_phy *phy = &dev->phy;
1904 b43legacy_phy_set_baseband_attenuation(dev, baseband_attenuation);
1905 b43legacy_radio_write16(dev, 0x0043, radio_attenuation);
1906 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0064,
1909 b43legacy_radio_write16(dev, 0x0052,
1910 (b43legacy_radio_read16(dev, 0x0052)
1914 b43legacy_phy_lo_adjust(dev, 0);
1917 u16 b43legacy_default_baseband_attenuation(struct b43legacy_wldev *dev)
1919 struct b43legacy_phy *phy = &dev->phy;
1926 u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev *dev)
1928 struct b43legacy_phy *phy = &dev->phy;
1946 if (is_bcm_board_vendor(dev) &&
1947 dev->dev->bus->boardinfo.type == 0x421 &&
1948 dev->dev->bus->sprom.board_rev >= 30)
1950 else if (is_bcm_board_vendor(dev) &&
1951 dev->dev->bus->boardinfo.type == 0x416)
1956 if (is_bcm_board_vendor(dev) &&
1957 dev->dev->bus->boardinfo.type == 0x421 &&
1958 dev->dev->bus->sprom.board_rev >= 30)
1966 if (is_bcm_board_vendor(dev) &&
1967 dev->dev->bus->boardinfo.type == 0x421 &&
1968 dev->dev->bus->sprom.board_rev >= 30)
1970 else if (is_bcm_board_vendor(dev) &&
1971 dev->dev->bus->boardinfo.type ==
1974 else if (dev->dev->bus->chip_id == 0x4320)
2000 if (is_bcm_board_vendor(dev) &&
2001 dev->dev->bus->boardinfo.type == 0x421) {
2002 if (dev->dev->bus->sprom.board_rev < 0x43)
2004 else if (dev->dev->bus->sprom.board_rev < 0x51)
2013 u16 b43legacy_default_txctl1(struct b43legacy_wldev *dev)
2015 struct b43legacy_phy *phy = &dev->phy;
2028 void b43legacy_radio_turn_on(struct b43legacy_wldev *dev)
2030 struct b43legacy_phy *phy = &dev->phy;
2042 b43legacy_phy_write(dev, 0x0015, 0x8000);
2043 b43legacy_phy_write(dev, 0x0015, 0xCC00);
2044 b43legacy_phy_write(dev, 0x0015,
2048 b43legacy_phy_write(dev, B43legacy_PHY_RFOVER,
2050 b43legacy_phy_write(dev, B43legacy_PHY_RFOVERVAL,
2055 err = b43legacy_radio_selectchannel(dev,
2057 err |= b43legacy_radio_selectchannel(dev, channel, 0);
2066 void b43legacy_radio_turn_off(struct b43legacy_wldev *dev, bool force)
2068 struct b43legacy_phy *phy = &dev->phy;
2073 if (phy->type == B43legacy_PHYTYPE_G && dev->dev->id.revision >= 5) {
2076 rfover = b43legacy_phy_read(dev, B43legacy_PHY_RFOVER);
2077 rfoverval = b43legacy_phy_read(dev, B43legacy_PHY_RFOVERVAL);
2083 b43legacy_phy_write(dev, B43legacy_PHY_RFOVER, rfover | 0x008C);
2084 b43legacy_phy_write(dev, B43legacy_PHY_RFOVERVAL,
2087 b43legacy_phy_write(dev, 0x0015, 0xAA00);
2089 b43legacydbg(dev->wl, "Radio initialized\n");
2092 void b43legacy_radio_clear_tssi(struct b43legacy_wldev *dev)
2094 struct b43legacy_phy *phy = &dev->phy;
2099 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0058,
2101 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x005a,
2103 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0070,
2105 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0072,