Lines Matching refs:dev
70 static void b43legacy_phy_initg(struct b43legacy_wldev *dev);
74 void b43legacy_phy_lock(struct b43legacy_wldev *dev)
77 B43legacy_WARN_ON(dev->phy.phy_locked);
78 dev->phy.phy_locked = 1;
81 if (dev->dev->id.revision < 3) {
82 b43legacy_mac_suspend(dev);
84 if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP))
85 b43legacy_power_saving_ctl_bits(dev, -1, 1);
89 void b43legacy_phy_unlock(struct b43legacy_wldev *dev)
92 B43legacy_WARN_ON(!dev->phy.phy_locked);
93 dev->phy.phy_locked = 0;
96 if (dev->dev->id.revision < 3) {
97 b43legacy_mac_enable(dev);
99 if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP))
100 b43legacy_power_saving_ctl_bits(dev, -1, -1);
104 u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset)
106 b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
107 return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA);
110 void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val)
112 b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
113 b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val);
116 void b43legacy_phy_calibrate(struct b43legacy_wldev *dev)
118 struct b43legacy_phy *phy = &dev->phy;
120 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); /* Dummy read. */
124 b43legacy_wireless_core_reset(dev, 0);
125 b43legacy_phy_initg(dev);
126 b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE);
134 static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev)
136 struct b43legacy_phy *phy = &dev->phy;
144 if (is_bcm_board_vendor(dev) &&
145 (dev->dev->bus->boardinfo.type == 0x0416))
148 b43legacy_phy_write(dev, 0x0028, 0x8018);
149 b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF);
154 b43legacy_phy_write(dev, 0x047A, 0xC111);
166 b43legacy_radio_write16(dev, 0x0076,
167 b43legacy_radio_read16(dev, 0x0076)
175 b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0);
177 b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0);
180 b43legacy_dummy_transmission(dev);
182 phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL);
185 b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt,
188 b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev,
190 b43legacy_radio_clear_tssi(dev);
193 static void b43legacy_phy_agcsetup(struct b43legacy_wldev *dev)
195 struct b43legacy_phy *phy = &dev->phy;
201 b43legacy_ilt_write(dev, offset, 0x00FE);
202 b43legacy_ilt_write(dev, offset + 1, 0x000D);
203 b43legacy_ilt_write(dev, offset + 2, 0x0013);
204 b43legacy_ilt_write(dev, offset + 3, 0x0019);
207 b43legacy_ilt_write(dev, 0x1800, 0x2710);
208 b43legacy_ilt_write(dev, 0x1801, 0x9B83);
209 b43legacy_ilt_write(dev, 0x1802, 0x9B83);
210 b43legacy_ilt_write(dev, 0x1803, 0x0F8D);
211 b43legacy_phy_write(dev, 0x0455, 0x0004);
214 b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5)
216 b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
218 b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
220 b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C)
223 b43legacy_radio_write16(dev, 0x007A,
224 b43legacy_radio_read16(dev, 0x007A)
227 b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
229 b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1)
231 b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2)
233 b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
237 b43legacy_phy_write(dev, 0x04A2,
238 (b43legacy_phy_read(dev, 0x04A2)
241 b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
243 b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
245 b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
247 b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
249 b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
251 b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482)
253 b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
255 b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
257 b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
261 b43legacy_phy_write(dev, 0x0430, 0x092B);
262 b43legacy_phy_write(dev, 0x041B,
263 (b43legacy_phy_read(dev, 0x041B)
266 b43legacy_phy_write(dev, 0x041B,
267 b43legacy_phy_read(dev, 0x041B) & 0xFFE1);
268 b43legacy_phy_write(dev, 0x041F, 0x287A);
269 b43legacy_phy_write(dev, 0x0420,
270 (b43legacy_phy_read(dev, 0x0420)
275 b43legacy_phy_write(dev, 0x0422, 0x287A);
276 b43legacy_phy_write(dev, 0x0420,
277 (b43legacy_phy_read(dev, 0x0420)
281 b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8)
283 b43legacy_phy_write(dev, 0x048E, 0x1C00);
286 b43legacy_phy_write(dev, 0x04AB,
287 (b43legacy_phy_read(dev, 0x04AB)
289 b43legacy_phy_write(dev, 0x048B, 0x005E);
290 b43legacy_phy_write(dev, 0x048C,
291 (b43legacy_phy_read(dev, 0x048C) & 0xFF00)
293 b43legacy_phy_write(dev, 0x048D, 0x0002);
296 b43legacy_ilt_write(dev, offset + 0x0800, 0);
297 b43legacy_ilt_write(dev, offset + 0x0801, 7);
298 b43legacy_ilt_write(dev, offset + 0x0802, 16);
299 b43legacy_ilt_write(dev, offset + 0x0803, 28);
302 b43legacy_phy_write(dev, 0x0426,
303 (b43legacy_phy_read(dev, 0x0426) & 0xFFFC));
304 b43legacy_phy_write(dev, 0x0426,
305 (b43legacy_phy_read(dev, 0x0426) & 0xEFFF));
309 static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)
311 struct b43legacy_phy *phy = &dev->phy;
316 b43legacy_phy_write(dev, 0x0406, 0x4F19);
317 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
318 (b43legacy_phy_read(dev,
320 b43legacy_phy_write(dev, 0x042C, 0x005A);
321 b43legacy_phy_write(dev, 0x0427, 0x001A);
324 b43legacy_ilt_write(dev, 0x5800 + i,
327 b43legacy_ilt_write(dev, 0x1800 + i,
330 b43legacy_ilt_write32(dev, 0x2000 + i,
334 b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654);
337 b43legacy_phy_write(dev, 0x04C0, 0x1861);
338 b43legacy_phy_write(dev, 0x04C1, 0x0271);
340 b43legacy_phy_write(dev, 0x04C0, 0x0098);
341 b43legacy_phy_write(dev, 0x04C1, 0x0070);
342 b43legacy_phy_write(dev, 0x04C9, 0x0080);
344 b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev,
348 b43legacy_ilt_write(dev, 0x4000 + i, i);
350 b43legacy_ilt_write(dev, 0x1800 + i,
356 b43legacy_ilt_write(dev, 0x1400 + i,
358 else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200))
360 b43legacy_ilt_write(dev, 0x1400 + i,
364 b43legacy_ilt_write(dev, 0x1400 + i,
369 b43legacy_ilt_write(dev, 0x5000 + i,
373 b43legacy_ilt_write(dev, 0x5000 + i,
378 b43legacy_ilt_write32(dev, 0x2400 + i,
381 b43legacy_ilt_write(dev, 0x5400 + i, 0x0020);
382 b43legacy_phy_agcsetup(dev);
384 if (is_bcm_board_vendor(dev) &&
385 (dev->dev->bus->boardinfo.type == 0x0416) &&
386 (dev->dev->bus->sprom.board_rev == 0x0017))
389 b43legacy_ilt_write(dev, 0x5001, 0x0002);
390 b43legacy_ilt_write(dev, 0x5002, 0x0001);
393 b43legacy_ilt_write(dev, 0x1000 + i, 0x0820);
394 b43legacy_phy_agcsetup(dev);
395 b43legacy_phy_read(dev, 0x0400); /* dummy read */
396 b43legacy_phy_write(dev, 0x0403, 0x1000);
397 b43legacy_ilt_write(dev, 0x3C02, 0x000F);
398 b43legacy_ilt_write(dev, 0x3C03, 0x0014);
400 if (is_bcm_board_vendor(dev) &&
401 (dev->dev->bus->boardinfo.type == 0x0416) &&
402 (dev->dev->bus->sprom.board_rev == 0x0017))
405 b43legacy_ilt_write(dev, 0x0401, 0x0002);
406 b43legacy_ilt_write(dev, 0x0402, 0x0001);
411 static void b43legacy_phy_inita(struct b43legacy_wldev *dev)
416 b43legacy_phy_setupg(dev);
417 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL)
418 b43legacy_phy_write(dev, 0x046E, 0x03CF);
421 static void b43legacy_phy_initb2(struct b43legacy_wldev *dev)
423 struct b43legacy_phy *phy = &dev->phy;
427 b43legacy_write16(dev, 0x03EC, 0x3F22);
428 b43legacy_phy_write(dev, 0x0020, 0x301C);
429 b43legacy_phy_write(dev, 0x0026, 0x0000);
430 b43legacy_phy_write(dev, 0x0030, 0x00C6);
431 b43legacy_phy_write(dev, 0x0088, 0x3E00);
434 b43legacy_phy_write(dev, offset, val);
437 b43legacy_phy_write(dev, 0x03E4, 0x3000);
438 b43legacy_radio_selectchannel(dev, phy->channel, 0);
440 b43legacy_radio_write16(dev, 0x0075, 0x0080);
441 b43legacy_radio_write16(dev, 0x0079, 0x0081);
443 b43legacy_radio_write16(dev, 0x0050, 0x0020);
444 b43legacy_radio_write16(dev, 0x0050, 0x0023);
446 b43legacy_radio_write16(dev, 0x0050, 0x0020);
447 b43legacy_radio_write16(dev, 0x005A, 0x0070);
448 b43legacy_radio_write16(dev, 0x005B, 0x007B);
449 b43legacy_radio_write16(dev, 0x005C, 0x00B0);
450 b43legacy_radio_write16(dev, 0x007A, 0x000F);
451 b43legacy_phy_write(dev, 0x0038, 0x0677);
452 b43legacy_radio_init2050(dev);
454 b43legacy_phy_write(dev, 0x0014, 0x0080);
455 b43legacy_phy_write(dev, 0x0032, 0x00CA);
456 b43legacy_phy_write(dev, 0x0032, 0x00CC);
457 b43legacy_phy_write(dev, 0x0035, 0x07C2);
458 b43legacy_phy_lo_b_measure(dev);
459 b43legacy_phy_write(dev, 0x0026, 0xCC00);
461 b43legacy_phy_write(dev, 0x0026, 0xCE00);
462 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1000);
463 b43legacy_phy_write(dev, 0x002A, 0x88A3);
465 b43legacy_phy_write(dev, 0x002A, 0x88C2);
466 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
467 b43legacy_phy_init_pctl(dev);
470 static void b43legacy_phy_initb4(struct b43legacy_wldev *dev)
472 struct b43legacy_phy *phy = &dev->phy;
476 b43legacy_write16(dev, 0x03EC, 0x3F22);
477 b43legacy_phy_write(dev, 0x0020, 0x301C);
478 b43legacy_phy_write(dev, 0x0026, 0x0000);
479 b43legacy_phy_write(dev, 0x0030, 0x00C6);
480 b43legacy_phy_write(dev, 0x0088, 0x3E00);
483 b43legacy_phy_write(dev, offset, val);
486 b43legacy_phy_write(dev, 0x03E4, 0x3000);
487 b43legacy_radio_selectchannel(dev, phy->channel, 0);
489 b43legacy_radio_write16(dev, 0x0075, 0x0080);
490 b43legacy_radio_write16(dev, 0x0079, 0x0081);
492 b43legacy_radio_write16(dev, 0x0050, 0x0020);
493 b43legacy_radio_write16(dev, 0x0050, 0x0023);
495 b43legacy_radio_write16(dev, 0x0050, 0x0020);
496 b43legacy_radio_write16(dev, 0x005A, 0x0070);
497 b43legacy_radio_write16(dev, 0x005B, 0x007B);
498 b43legacy_radio_write16(dev, 0x005C, 0x00B0);
499 b43legacy_radio_write16(dev, 0x007A, 0x000F);
500 b43legacy_phy_write(dev, 0x0038, 0x0677);
501 b43legacy_radio_init2050(dev);
503 b43legacy_phy_write(dev, 0x0014, 0x0080);
504 b43legacy_phy_write(dev, 0x0032, 0x00CA);
506 b43legacy_phy_write(dev, 0x0032, 0x00E0);
507 b43legacy_phy_write(dev, 0x0035, 0x07C2);
509 b43legacy_phy_lo_b_measure(dev);
511 b43legacy_phy_write(dev, 0x0026, 0xCC00);
513 b43legacy_phy_write(dev, 0x0026, 0xCE00);
514 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1100);
515 b43legacy_phy_write(dev, 0x002A, 0x88A3);
517 b43legacy_phy_write(dev, 0x002A, 0x88C2);
518 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
519 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
520 b43legacy_calc_nrssi_slope(dev);
521 b43legacy_calc_nrssi_threshold(dev);
523 b43legacy_phy_init_pctl(dev);
526 static void b43legacy_phy_initb5(struct b43legacy_wldev *dev)
528 struct b43legacy_phy *phy = &dev->phy;
534 b43legacy_radio_write16(dev, 0x007A,
535 b43legacy_radio_read16(dev, 0x007A)
537 if (!is_bcm_board_vendor(dev) &&
538 (dev->dev->bus->boardinfo.type != 0x0416)) {
541 b43legacy_phy_write(dev, offset, value);
545 b43legacy_phy_write(dev, 0x0035,
546 (b43legacy_phy_read(dev, 0x0035) & 0xF0FF)
549 b43legacy_phy_write(dev, 0x0038, 0x0667);
553 b43legacy_radio_write16(dev, 0x007A,
554 b43legacy_radio_read16(dev, 0x007A)
556 b43legacy_radio_write16(dev, 0x0051,
557 b43legacy_radio_read16(dev, 0x0051)
560 b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, 0x0000);
562 b43legacy_phy_write(dev, 0x0802, b43legacy_phy_read(dev, 0x0802)
564 b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, 0x042B)
567 b43legacy_phy_write(dev, 0x001C, 0x186A);
569 b43legacy_phy_write(dev, 0x0013, (b43legacy_phy_read(dev,
571 b43legacy_phy_write(dev, 0x0035, (b43legacy_phy_read(dev,
573 b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
575 b43legacy_phy_write(dev, 0x5B, 0x0000);
576 b43legacy_phy_write(dev, 0x5C, 0x0000);
579 if (dev->bad_frames_preempt)
580 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
581 b43legacy_phy_read(dev,
585 b43legacy_phy_write(dev, 0x0026, 0xCE00);
586 b43legacy_phy_write(dev, 0x0021, 0x3763);
587 b43legacy_phy_write(dev, 0x0022, 0x1BC3);
588 b43legacy_phy_write(dev, 0x0023, 0x06F9);
589 b43legacy_phy_write(dev, 0x0024, 0x037E);
591 b43legacy_phy_write(dev, 0x0026, 0xCC00);
592 b43legacy_phy_write(dev, 0x0030, 0x00C6);
593 b43legacy_write16(dev, 0x03EC, 0x3F22);
596 b43legacy_phy_write(dev, 0x0020, 0x3E1C);
598 b43legacy_phy_write(dev, 0x0020, 0x301C);
601 b43legacy_write16(dev, 0x03E4, 0x3000);
605 b43legacy_radio_selectchannel(dev, 7, 0);
608 b43legacy_radio_write16(dev, 0x0075, 0x0080);
609 b43legacy_radio_write16(dev, 0x0079, 0x0081);
612 b43legacy_radio_write16(dev, 0x0050, 0x0020);
613 b43legacy_radio_write16(dev, 0x0050, 0x0023);
616 b43legacy_radio_write16(dev, 0x0050, 0x0020);
617 b43legacy_radio_write16(dev, 0x005A, 0x0070);
620 b43legacy_radio_write16(dev, 0x005B, 0x007B);
621 b43legacy_radio_write16(dev, 0x005C, 0x00B0);
623 b43legacy_radio_write16(dev, 0x007A, b43legacy_radio_read16(dev,
626 b43legacy_radio_selectchannel(dev, old_channel, 0);
628 b43legacy_phy_write(dev, 0x0014, 0x0080);
629 b43legacy_phy_write(dev, 0x0032, 0x00CA);
630 b43legacy_phy_write(dev, 0x002A, 0x88A3);
632 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
635 b43legacy_radio_write16(dev, 0x005D, 0x000D);
637 b43legacy_write16(dev, 0x03E4, (b43legacy_read16(dev, 0x03E4) &
641 static void b43legacy_phy_initb6(struct b43legacy_wldev *dev)
643 struct b43legacy_phy *phy = &dev->phy;
648 b43legacy_phy_write(dev, 0x003E, 0x817A);
649 b43legacy_radio_write16(dev, 0x007A,
650 (b43legacy_radio_read16(dev, 0x007A) | 0x0058));
653 b43legacy_radio_write16(dev, 0x0051, 0x0037);
654 b43legacy_radio_write16(dev, 0x0052, 0x0070);
655 b43legacy_radio_write16(dev, 0x0053, 0x00B3);
656 b43legacy_radio_write16(dev, 0x0054, 0x009B);
657 b43legacy_radio_write16(dev, 0x005A, 0x0088);
658 b43legacy_radio_write16(dev, 0x005B, 0x0088);
659 b43legacy_radio_write16(dev, 0x005D, 0x0088);
660 b43legacy_radio_write16(dev, 0x005E, 0x0088);
661 b43legacy_radio_write16(dev, 0x007D, 0x0088);
662 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
664 (b43legacy_shm_read32(dev,
670 b43legacy_radio_write16(dev, 0x0051, 0x0000);
671 b43legacy_radio_write16(dev, 0x0052, 0x0040);
672 b43legacy_radio_write16(dev, 0x0053, 0x00B7);
673 b43legacy_radio_write16(dev, 0x0054, 0x0098);
674 b43legacy_radio_write16(dev, 0x005A, 0x0088);
675 b43legacy_radio_write16(dev, 0x005B, 0x006B);
676 b43legacy_radio_write16(dev, 0x005C, 0x000F);
677 if (dev->dev->bus->sprom.boardflags_lo & 0x8000) {
678 b43legacy_radio_write16(dev, 0x005D, 0x00FA);
679 b43legacy_radio_write16(dev, 0x005E, 0x00D8);
681 b43legacy_radio_write16(dev, 0x005D, 0x00F5);
682 b43legacy_radio_write16(dev, 0x005E, 0x00B8);
684 b43legacy_radio_write16(dev, 0x0073, 0x0003);
685 b43legacy_radio_write16(dev, 0x007D, 0x00A8);
686 b43legacy_radio_write16(dev, 0x007C, 0x0001);
687 b43legacy_radio_write16(dev, 0x007E, 0x0008);
691 b43legacy_phy_write(dev, offset, val);
696 b43legacy_phy_write(dev, offset, val);
701 b43legacy_phy_write(dev, offset, (val & 0x3F3F));
705 b43legacy_radio_write16(dev, 0x007A,
706 b43legacy_radio_read16(dev, 0x007A) |
708 b43legacy_radio_write16(dev, 0x0051,
709 b43legacy_radio_read16(dev, 0x0051) |
711 b43legacy_phy_write(dev, 0x0802,
712 b43legacy_phy_read(dev, 0x0802) | 0x0100);
713 b43legacy_phy_write(dev, 0x042B,
714 b43legacy_phy_read(dev, 0x042B) | 0x2000);
715 b43legacy_phy_write(dev, 0x5B, 0x0000);
716 b43legacy_phy_write(dev, 0x5C, 0x0000);
721 b43legacy_radio_selectchannel(dev, 1, 0);
723 b43legacy_radio_selectchannel(dev, 13, 0);
725 b43legacy_radio_write16(dev, 0x0050, 0x0020);
726 b43legacy_radio_write16(dev, 0x0050, 0x0023);
729 b43legacy_radio_write16(dev, 0x007C,
730 (b43legacy_radio_read16(dev, 0x007C)
732 b43legacy_radio_write16(dev, 0x0050, 0x0020);
735 b43legacy_radio_write16(dev, 0x0050, 0x0020);
736 b43legacy_radio_write16(dev, 0x005A, 0x0070);
737 b43legacy_radio_write16(dev, 0x005B, 0x007B);
738 b43legacy_radio_write16(dev, 0x005C, 0x00B0);
740 b43legacy_radio_write16(dev, 0x007A,
741 (b43legacy_radio_read16(dev,
744 b43legacy_radio_selectchannel(dev, old_channel, 0);
746 b43legacy_phy_write(dev, 0x0014, 0x0200);
748 b43legacy_phy_write(dev, 0x002A, 0x88C2);
750 b43legacy_phy_write(dev, 0x002A, 0x8AC0);
751 b43legacy_phy_write(dev, 0x0038, 0x0668);
752 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
754 b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
757 b43legacy_radio_write16(dev, 0x005D, 0x000D);
760 b43legacy_write16(dev, 0x03E4, 0x0009);
761 b43legacy_phy_write(dev, 0x61, b43legacy_phy_read(dev, 0x61)
764 b43legacy_phy_write(dev, 0x0002, (b43legacy_phy_read(dev,
767 b43legacy_write16(dev, 0x03E6, 0x0);
769 b43legacy_write16(dev, 0x03E6, 0x8140);
770 b43legacy_phy_write(dev, 0x0016, 0x0410);
771 b43legacy_phy_write(dev, 0x0017, 0x0820);
772 b43legacy_phy_write(dev, 0x0062, 0x0007);
773 b43legacy_radio_init2050(dev);
774 b43legacy_phy_lo_g_measure(dev);
775 if (dev->dev->bus->sprom.boardflags_lo &
777 b43legacy_calc_nrssi_slope(dev);
778 b43legacy_calc_nrssi_threshold(dev);
780 b43legacy_phy_init_pctl(dev);
784 static void b43legacy_calc_loopback_gain(struct b43legacy_wldev *dev)
786 struct b43legacy_phy *phy = &dev->phy;
796 backup_phy[0] = b43legacy_phy_read(dev, 0x0429);
797 backup_phy[1] = b43legacy_phy_read(dev, 0x0001);
798 backup_phy[2] = b43legacy_phy_read(dev, 0x0811);
799 backup_phy[3] = b43legacy_phy_read(dev, 0x0812);
801 backup_phy[4] = b43legacy_phy_read(dev, 0x0814);
802 backup_phy[5] = b43legacy_phy_read(dev, 0x0815);
804 backup_phy[6] = b43legacy_phy_read(dev, 0x005A);
805 backup_phy[7] = b43legacy_phy_read(dev, 0x0059);
806 backup_phy[8] = b43legacy_phy_read(dev, 0x0058);
807 backup_phy[9] = b43legacy_phy_read(dev, 0x000A);
808 backup_phy[10] = b43legacy_phy_read(dev, 0x0003);
809 backup_phy[11] = b43legacy_phy_read(dev, 0x080F);
810 backup_phy[12] = b43legacy_phy_read(dev, 0x0810);
811 backup_phy[13] = b43legacy_phy_read(dev, 0x002B);
812 backup_phy[14] = b43legacy_phy_read(dev, 0x0015);
813 b43legacy_phy_read(dev, 0x002D); /* dummy read */
815 backup_radio[0] = b43legacy_radio_read16(dev, 0x0052);
816 backup_radio[1] = b43legacy_radio_read16(dev, 0x0043);
817 backup_radio[2] = b43legacy_radio_read16(dev, 0x007A);
819 b43legacy_phy_write(dev, 0x0429,
820 b43legacy_phy_read(dev, 0x0429) & 0x3FFF);
821 b43legacy_phy_write(dev, 0x0001,
822 b43legacy_phy_read(dev, 0x0001) & 0x8000);
823 b43legacy_phy_write(dev, 0x0811,
824 b43legacy_phy_read(dev, 0x0811) | 0x0002);
825 b43legacy_phy_write(dev, 0x0812,
826 b43legacy_phy_read(dev, 0x0812) & 0xFFFD);
827 b43legacy_phy_write(dev, 0x0811,
828 b43legacy_phy_read(dev, 0x0811) | 0x0001);
829 b43legacy_phy_write(dev, 0x0812,
830 b43legacy_phy_read(dev, 0x0812) & 0xFFFE);
832 b43legacy_phy_write(dev, 0x0814,
833 b43legacy_phy_read(dev, 0x0814) | 0x0001);
834 b43legacy_phy_write(dev, 0x0815,
835 b43legacy_phy_read(dev, 0x0815) & 0xFFFE);
836 b43legacy_phy_write(dev, 0x0814,
837 b43legacy_phy_read(dev, 0x0814) | 0x0002);
838 b43legacy_phy_write(dev, 0x0815,
839 b43legacy_phy_read(dev, 0x0815) & 0xFFFD);
841 b43legacy_phy_write(dev, 0x0811, b43legacy_phy_read(dev, 0x0811) |
843 b43legacy_phy_write(dev, 0x0812, b43legacy_phy_read(dev, 0x0812) |
846 b43legacy_phy_write(dev, 0x0811, (b43legacy_phy_read(dev, 0x0811)
848 b43legacy_phy_write(dev, 0x0812, (b43legacy_phy_read(dev, 0x0812)
851 b43legacy_phy_write(dev, 0x005A, 0x0780);
852 b43legacy_phy_write(dev, 0x0059, 0xC810);
853 b43legacy_phy_write(dev, 0x0058, 0x000D);
855 b43legacy_phy_write(dev, 0x0003, 0x0122);
857 b43legacy_phy_write(dev, 0x000A,
858 b43legacy_phy_read(dev, 0x000A)
861 b43legacy_phy_write(dev, 0x0814,
862 b43legacy_phy_read(dev, 0x0814) | 0x0004);
863 b43legacy_phy_write(dev, 0x0815,
864 b43legacy_phy_read(dev, 0x0815) & 0xFFFB);
866 b43legacy_phy_write(dev, 0x0003,
867 (b43legacy_phy_read(dev, 0x0003)
870 b43legacy_radio_write16(dev, 0x0052, 0x0000);
871 b43legacy_radio_write16(dev, 0x0043,
872 (b43legacy_radio_read16(dev, 0x0043)
876 b43legacy_radio_write16(dev, 0x0043, 0x000F);
881 b43legacy_phy_set_baseband_attenuation(dev, 11);
884 b43legacy_phy_write(dev, 0x080F, 0xC020);
886 b43legacy_phy_write(dev, 0x080F, 0x8020);
887 b43legacy_phy_write(dev, 0x0810, 0x0000);
889 b43legacy_phy_write(dev, 0x002B,
890 (b43legacy_phy_read(dev, 0x002B)
892 b43legacy_phy_write(dev, 0x002B,
893 (b43legacy_phy_read(dev, 0x002B)
895 b43legacy_phy_write(dev, 0x0811,
896 b43legacy_phy_read(dev, 0x0811) | 0x0100);
897 b43legacy_phy_write(dev, 0x0812,
898 b43legacy_phy_read(dev, 0x0812) & 0xCFFF);
899 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_EXTLNA) {
901 b43legacy_phy_write(dev, 0x0811,
902 b43legacy_phy_read(dev, 0x0811)
904 b43legacy_phy_write(dev, 0x0812,
905 b43legacy_phy_read(dev, 0x0812)
909 b43legacy_radio_write16(dev, 0x007A,
910 b43legacy_radio_read16(dev, 0x007A)
914 b43legacy_radio_write16(dev, 0x0043, loop1_cnt);
915 b43legacy_phy_write(dev, 0x0812,
916 (b43legacy_phy_read(dev, 0x0812)
918 b43legacy_phy_write(dev, 0x0015,
919 (b43legacy_phy_read(dev, 0x0015)
921 b43legacy_phy_write(dev, 0x0015,
922 (b43legacy_phy_read(dev, 0x0015)
925 if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
933 b43legacy_phy_write(dev, 0x0812,
934 b43legacy_phy_read(dev, 0x0812)
937 b43legacy_phy_write(dev, 0x0812,
938 (b43legacy_phy_read(dev, 0x0812)
940 b43legacy_phy_write(dev, 0x0015,
941 (b43legacy_phy_read(dev, 0x0015)
943 b43legacy_phy_write(dev, 0x0015,
944 (b43legacy_phy_read(dev, 0x0015)
947 if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
953 b43legacy_phy_write(dev, 0x0814, backup_phy[4]);
954 b43legacy_phy_write(dev, 0x0815, backup_phy[5]);
956 b43legacy_phy_write(dev, 0x005A, backup_phy[6]);
957 b43legacy_phy_write(dev, 0x0059, backup_phy[7]);
958 b43legacy_phy_write(dev, 0x0058, backup_phy[8]);
959 b43legacy_phy_write(dev, 0x000A, backup_phy[9]);
960 b43legacy_phy_write(dev, 0x0003, backup_phy[10]);
961 b43legacy_phy_write(dev, 0x080F, backup_phy[11]);
962 b43legacy_phy_write(dev, 0x0810, backup_phy[12]);
963 b43legacy_phy_write(dev, 0x002B, backup_phy[13]);
964 b43legacy_phy_write(dev, 0x0015, backup_phy[14]);
966 b43legacy_phy_set_baseband_attenuation(dev, backup_bband);
968 b43legacy_radio_write16(dev, 0x0052, backup_radio[0]);
969 b43legacy_radio_write16(dev, 0x0043, backup_radio[1]);
970 b43legacy_radio_write16(dev, 0x007A, backup_radio[2]);
972 b43legacy_phy_write(dev, 0x0811, backup_phy[2] | 0x0003);
974 b43legacy_phy_write(dev, 0x0811, backup_phy[2]);
975 b43legacy_phy_write(dev, 0x0812, backup_phy[3]);
976 b43legacy_phy_write(dev, 0x0429, backup_phy[0]);
977 b43legacy_phy_write(dev, 0x0001, backup_phy[1]);
983 static void b43legacy_phy_initg(struct b43legacy_wldev *dev)
985 struct b43legacy_phy *phy = &dev->phy;
989 b43legacy_phy_initb5(dev);
991 b43legacy_phy_initb6(dev);
993 b43legacy_phy_inita(dev);
996 b43legacy_phy_write(dev, 0x0814, 0x0000);
997 b43legacy_phy_write(dev, 0x0815, 0x0000);
1000 b43legacy_phy_write(dev, 0x0811, 0x0000);
1001 b43legacy_phy_write(dev, 0x0015, 0x00C0);
1004 b43legacy_phy_write(dev, 0x0811, 0x0400);
1005 b43legacy_phy_write(dev, 0x0015, 0x00C0);
1008 tmp = b43legacy_phy_read(dev, 0x0400) & 0xFF;
1010 b43legacy_phy_write(dev, 0x04C2, 0x1816);
1011 b43legacy_phy_write(dev, 0x04C3, 0x8606);
1014 b43legacy_phy_write(dev, 0x04C2, 0x1816);
1015 b43legacy_phy_write(dev, 0x04C3, 0x8006);
1016 b43legacy_phy_write(dev, 0x04CC,
1017 (b43legacy_phy_read(dev,
1022 b43legacy_phy_write(dev, 0x047E, 0x0078);
1025 b43legacy_phy_write(dev, 0x0801, b43legacy_phy_read(dev, 0x0801)
1027 b43legacy_phy_write(dev, 0x043E, b43legacy_phy_read(dev, 0x043E)
1031 b43legacy_calc_loopback_gain(dev);
1034 phy->initval = b43legacy_radio_init2050(dev);
1036 b43legacy_radio_write16(dev, 0x0078, phy->initval);
1039 b43legacy_phy_lo_g_measure(dev);
1042 b43legacy_radio_write16(dev, 0x0052,
1046 b43legacy_radio_write16(dev, 0x0052,
1047 (b43legacy_radio_read16(dev,
1051 b43legacy_phy_write(dev, 0x0036,
1052 (b43legacy_phy_read(dev, 0x0036)
1054 if (dev->dev->bus->sprom.boardflags_lo &
1056 b43legacy_phy_write(dev, 0x002E, 0x8075);
1058 b43legacy_phy_write(dev, 0x002E, 0x807F);
1060 b43legacy_phy_write(dev, 0x002F, 0x0101);
1062 b43legacy_phy_write(dev, 0x002F, 0x0202);
1065 b43legacy_phy_lo_adjust(dev, 0);
1066 b43legacy_phy_write(dev, 0x080F, 0x8078);
1069 if (!(dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI)) {
1076 b43legacy_nrssi_hw_update(dev, 0xFFFF);
1077 b43legacy_calc_nrssi_threshold(dev);
1081 b43legacy_calc_nrssi_slope(dev);
1084 b43legacy_calc_nrssi_threshold(dev);
1088 b43legacy_phy_write(dev, 0x0805, 0x3230);
1089 b43legacy_phy_init_pctl(dev);
1090 if (dev->dev->bus->chip_id == 0x4306
1091 && dev->dev->bus->chip_package == 2) {
1092 b43legacy_phy_write(dev, 0x0429,
1093 b43legacy_phy_read(dev, 0x0429) & 0xBFFF);
1094 b43legacy_phy_write(dev, 0x04C3,
1095 b43legacy_phy_read(dev, 0x04C3) & 0x7FFF);
1099 static u16 b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev *dev)
1107 b43legacy_phy_write(dev, 0x0015, 0xAFA0);
1109 b43legacy_phy_write(dev, 0x0015, 0xEFA0);
1111 b43legacy_phy_write(dev, 0x0015, 0xFFA0);
1113 ret += b43legacy_phy_read(dev, 0x002C);
1121 void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev)
1123 struct b43legacy_phy *phy = &dev->phy;
1130 regstack[0] = b43legacy_phy_read(dev, 0x0015);
1131 regstack[1] = b43legacy_radio_read16(dev, 0x0052) & 0xFFF0;
1134 regstack[2] = b43legacy_phy_read(dev, 0x000A);
1135 regstack[3] = b43legacy_phy_read(dev, 0x002A);
1136 regstack[4] = b43legacy_phy_read(dev, 0x0035);
1137 regstack[5] = b43legacy_phy_read(dev, 0x0003);
1138 regstack[6] = b43legacy_phy_read(dev, 0x0001);
1139 regstack[7] = b43legacy_phy_read(dev, 0x0030);
1141 regstack[8] = b43legacy_radio_read16(dev, 0x0043);
1142 regstack[9] = b43legacy_radio_read16(dev, 0x007A);
1143 regstack[10] = b43legacy_read16(dev, 0x03EC);
1144 regstack[11] = b43legacy_radio_read16(dev, 0x0052) & 0x00F0;
1146 b43legacy_phy_write(dev, 0x0030, 0x00FF);
1147 b43legacy_write16(dev, 0x03EC, 0x3F3F);
1148 b43legacy_phy_write(dev, 0x0035, regstack[4] & 0xFF7F);
1149 b43legacy_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0);
1151 b43legacy_phy_write(dev, 0x0015, 0xB000);
1152 b43legacy_phy_write(dev, 0x002B, 0x0004);
1155 b43legacy_phy_write(dev, 0x002B, 0x0203);
1156 b43legacy_phy_write(dev, 0x002A, 0x08A3);
1162 b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
1163 b43legacy_phy_lo_b_r15_loop(dev);
1166 b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
1167 mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
1173 b43legacy_radio_write16(dev, 0x0052, regstack[1]
1184 b43legacy_phy_write(dev, 0x002F, fval);
1185 mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
1194 b43legacy_phy_write(dev, 0x002F, phy->minlowsigpos[1]);
1196 b43legacy_phy_write(dev, 0x000A, regstack[2]);
1197 b43legacy_phy_write(dev, 0x002A, regstack[3]);
1198 b43legacy_phy_write(dev, 0x0035, regstack[4]);
1199 b43legacy_phy_write(dev, 0x0003, regstack[5]);
1200 b43legacy_phy_write(dev, 0x0001, regstack[6]);
1201 b43legacy_phy_write(dev, 0x0030, regstack[7]);
1203 b43legacy_radio_write16(dev, 0x0043, regstack[8]);
1204 b43legacy_radio_write16(dev, 0x007A, regstack[9]);
1206 b43legacy_radio_write16(dev, 0x0052,
1207 (b43legacy_radio_read16(dev, 0x0052)
1210 b43legacy_write16(dev, 0x03EC, regstack[10]);
1212 b43legacy_phy_write(dev, 0x0015, regstack[0]);
1216 u16 b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev *dev,
1219 struct b43legacy_phy *phy = &dev->phy;
1225 b43legacy_phy_write(dev, 0x15, 0xE300);
1227 b43legacy_phy_write(dev, 0x0812, control | 0x00B0);
1229 b43legacy_phy_write(dev, 0x0812, control | 0x00B2);
1231 b43legacy_phy_write(dev, 0x0812, control | 0x00B3);
1233 b43legacy_phy_write(dev, 0x0015, 0xF300);
1236 b43legacy_phy_write(dev, 0x0015, control | 0xEFA0);
1238 b43legacy_phy_write(dev, 0x0015, control | 0xEFE0);
1240 b43legacy_phy_write(dev, 0x0015, control | 0xFFE0);
1243 ret = b43legacy_phy_read(dev, 0x002D);
1250 static u32 b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev *dev,
1257 ret += b43legacy_phy_lo_g_deviation_subval(dev, control);
1264 void b43legacy_lo_write(struct b43legacy_wldev *dev,
1276 b43legacydbg(dev->wl,
1284 b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, value);
1288 struct b43legacy_lopair *b43legacy_find_lopair(struct b43legacy_wldev *dev,
1294 struct b43legacy_phy *phy = &dev->phy;
1306 struct b43legacy_lopair *b43legacy_current_lopair(struct b43legacy_wldev *dev)
1308 struct b43legacy_phy *phy = &dev->phy;
1310 return b43legacy_find_lopair(dev, phy->bbatt,
1315 void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed)
1321 pair = b43legacy_find_lopair(dev, 2, 3, 0);
1323 pair = b43legacy_current_lopair(dev);
1324 b43legacy_lo_write(dev, pair);
1327 static void b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev *dev)
1329 struct b43legacy_phy *phy = &dev->phy;
1335 b43legacy_radio_write16(dev, 0x0052, 0x0000);
1337 smallest = b43legacy_phy_lo_g_singledeviation(dev, 0);
1339 b43legacy_radio_write16(dev, 0x0052, i);
1341 tmp = b43legacy_phy_lo_g_singledeviation(dev, 0);
1351 void b43legacy_phy_lo_g_state(struct b43legacy_wldev *dev,
1384 b43legacy_lo_write(dev, &lowest_transition);
1385 lowest_deviation = b43legacy_phy_lo_g_singledeviation(dev, r27);
1414 b43legacy_lo_write(dev, &transition);
1415 tmp = b43legacy_phy_lo_g_singledeviation(dev,
1441 void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev,
1444 struct b43legacy_phy *phy = &dev->phy;
1448 value = (b43legacy_read16(dev, 0x03E6) & 0xFFF0);
1450 b43legacy_write16(dev, 0x03E6, value);
1455 value = b43legacy_phy_read(dev, 0x0060) & 0xFFC3;
1458 value = b43legacy_phy_read(dev, 0x0060) & 0xFF87;
1461 b43legacy_phy_write(dev, 0x0060, value);
1465 void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev)
1468 const int is_initializing = (b43legacy_status(dev)
1470 struct b43legacy_phy *phy = &dev->phy;
1488 regstack[0] = b43legacy_phy_read(dev, B43legacy_PHY_G_CRS);
1489 regstack[1] = b43legacy_phy_read(dev, 0x0802);
1490 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
1492 b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
1494 regstack[3] = b43legacy_read16(dev, 0x03E2);
1495 b43legacy_write16(dev, 0x03E2, regstack[3] | 0x8000);
1496 regstack[4] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
1497 regstack[5] = b43legacy_phy_read(dev, 0x15);
1498 regstack[6] = b43legacy_phy_read(dev, 0x2A);
1499 regstack[7] = b43legacy_phy_read(dev, 0x35);
1500 regstack[8] = b43legacy_phy_read(dev, 0x60);
1501 regstack[9] = b43legacy_radio_read16(dev, 0x43);
1502 regstack[10] = b43legacy_radio_read16(dev, 0x7A);
1503 regstack[11] = b43legacy_radio_read16(dev, 0x52);
1505 regstack[12] = b43legacy_phy_read(dev, 0x0811);
1506 regstack[13] = b43legacy_phy_read(dev, 0x0812);
1507 regstack[14] = b43legacy_phy_read(dev, 0x0814);
1508 regstack[15] = b43legacy_phy_read(dev, 0x0815);
1510 b43legacy_radio_selectchannel(dev, 6, 0);
1512 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
1514 b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
1515 b43legacy_dummy_transmission(dev);
1517 b43legacy_radio_write16(dev, 0x0043, 0x0006);
1519 b43legacy_phy_set_baseband_attenuation(dev, 2);
1521 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x0000);
1522 b43legacy_phy_write(dev, 0x002E, 0x007F);
1523 b43legacy_phy_write(dev, 0x080F, 0x0078);
1524 b43legacy_phy_write(dev, 0x0035, regstack[7] & ~(1 << 7));
1525 b43legacy_radio_write16(dev, 0x007A, regstack[10] & 0xFFF0);
1526 b43legacy_phy_write(dev, 0x002B, 0x0203);
1527 b43legacy_phy_write(dev, 0x002A, 0x08A3);
1529 b43legacy_phy_write(dev, 0x0814, regstack[14] | 0x0003);
1530 b43legacy_phy_write(dev, 0x0815, regstack[15] & 0xFFFC);
1531 b43legacy_phy_write(dev, 0x0811, 0x01B3);
1532 b43legacy_phy_write(dev, 0x0812, 0x00B2);
1535 b43legacy_phy_lo_g_measure_txctl2(dev);
1536 b43legacy_phy_write(dev, 0x080F, 0x8078);
1580 b43legacy_radio_write16(dev, 0x43, i);
1581 b43legacy_radio_write16(dev, 0x52, phy->txctl2);
1585 b43legacy_phy_set_baseband_attenuation(dev, j * 2);
1590 b43legacy_radio_write16(dev, 0x007A, tmp);
1593 b43legacy_phy_lo_g_state(dev, &control, tmp_control,
1627 b43legacy_radio_write16(dev, 0x43, i - 9);
1630 b43legacy_radio_write16(dev, 0x52,
1636 b43legacy_phy_set_baseband_attenuation(dev, j * 2);
1641 b43legacy_radio_write16(dev, 0x7A, tmp);
1644 b43legacy_phy_lo_g_state(dev, &control, tmp_control,
1651 b43legacy_phy_write(dev, 0x0015, 0xE300);
1652 b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA0);
1654 b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA2);
1656 b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA3);
1659 b43legacy_phy_write(dev, 0x0015, r27 | 0xEFA0);
1660 b43legacy_phy_lo_adjust(dev, is_initializing);
1661 b43legacy_phy_write(dev, 0x002E, 0x807F);
1663 b43legacy_phy_write(dev, 0x002F, 0x0202);
1665 b43legacy_phy_write(dev, 0x002F, 0x0101);
1666 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, regstack[4]);
1667 b43legacy_phy_write(dev, 0x0015, regstack[5]);
1668 b43legacy_phy_write(dev, 0x002A, regstack[6]);
1669 b43legacy_phy_write(dev, 0x0035, regstack[7]);
1670 b43legacy_phy_write(dev, 0x0060, regstack[8]);
1671 b43legacy_radio_write16(dev, 0x0043, regstack[9]);
1672 b43legacy_radio_write16(dev, 0x007A, regstack[10]);
1674 regstack[11] |= (b43legacy_radio_read16(dev, 0x52) & 0x000F);
1675 b43legacy_radio_write16(dev, 0x52, regstack[11]);
1676 b43legacy_write16(dev, 0x03E2, regstack[3]);
1678 b43legacy_phy_write(dev, 0x0811, regstack[12]);
1679 b43legacy_phy_write(dev, 0x0812, regstack[13]);
1680 b43legacy_phy_write(dev, 0x0814, regstack[14]);
1681 b43legacy_phy_write(dev, 0x0815, regstack[15]);
1682 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]);
1683 b43legacy_phy_write(dev, 0x0802, regstack[1]);
1685 b43legacy_radio_selectchannel(dev, oldchannel, 1);
1694 b43legacywarn(dev->wl,
1704 void b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev *dev)
1708 pair = b43legacy_current_lopair(dev);
1712 void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev)
1714 struct b43legacy_phy *phy = &dev->phy;
1727 static s8 b43legacy_phy_estimate_power_out(struct b43legacy_wldev *dev, s8 tssi)
1729 struct b43legacy_phy *phy = &dev->phy;
1751 void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev)
1753 struct b43legacy_phy *phy = &dev->phy;
1772 if ((dev->dev->bus->boardinfo.type == 0x0416) &&
1773 is_bcm_board_vendor(dev))
1782 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0058);
1785 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005A);
1791 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1795 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1807 b43legacy_radio_clear_tssi(dev);
1811 if (tmp && (b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005E)
1815 estimated_pwr = b43legacy_phy_estimate_power_out(dev, average);
1817 max_pwr = dev->dev->bus->sprom.maxpwr_bg;
1819 if ((dev->dev->bus->sprom.boardflags_lo
1824 b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM."
1827 dev->dev->bus->sprom.maxpwr_bg = max_pwr;
1838 - dev->dev->bus->sprom.antenna_gain.a0
1844 if (b43legacy_debug(dev, B43legacy_DBG_XMITPOWER))
1845 b43legacydbg(dev->wl, "Current TX power output: " Q52_FMT
1859 b43legacy_phy_lo_mark_current_used(dev);
1898 } else if (dev->dev->bus->sprom.boardflags_lo
1923 b43legacy_phy_lock(dev);
1924 b43legacy_radio_lock(dev);
1925 b43legacy_radio_set_txpower_bg(dev, baseband_attenuation,
1927 b43legacy_phy_lo_mark_current_used(dev);
1928 b43legacy_radio_unlock(dev);
1929 b43legacy_phy_unlock(dev);
1969 int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev)
1971 struct b43legacy_phy *phy = &dev->phy;
1980 pab0 = (s16)(dev->dev->bus->sprom.pa0b0);
1981 pab1 = (s16)(dev->dev->bus->sprom.pa0b1);
1982 pab2 = (s16)(dev->dev->bus->sprom.pa0b2);
1984 if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {
1993 if ((s8)dev->dev->bus->sprom.itssi_bg != 0 &&
1994 (s8)dev->dev->bus->sprom.itssi_bg != -1)
1995 phy->idle_tssi = (s8)(dev->dev->bus->sprom.
2001 b43legacyerr(dev->wl, "Could not allocate memory "
2009 b43legacyerr(dev->wl, "Could not generate "
2033 int b43legacy_phy_init(struct b43legacy_wldev *dev)
2035 struct b43legacy_phy *phy = &dev->phy;
2042 b43legacy_phy_initb2(dev);
2046 b43legacy_phy_initb4(dev);
2050 b43legacy_phy_initb5(dev);
2054 b43legacy_phy_initb6(dev);
2060 b43legacy_phy_initg(dev);
2065 b43legacyerr(dev->wl, "Unknown PHYTYPE found\n");
2070 void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev)
2072 struct b43legacy_phy *phy = &dev->phy;
2084 ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
2086 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
2098 b43legacy_phy_write(dev, offset + 1,
2099 (b43legacy_phy_read(dev, offset + 1)
2107 b43legacy_phy_write(dev, offset + 0x2B,
2108 (b43legacy_phy_read(dev,
2115 b43legacy_phy_write(dev, 0x048C,
2116 b43legacy_phy_read(dev,
2119 b43legacy_phy_write(dev, 0x048C,
2120 b43legacy_phy_read(dev,
2123 b43legacy_phy_write(dev, 0x0461,
2124 b43legacy_phy_read(dev,
2126 b43legacy_phy_write(dev, 0x04AD,
2127 (b43legacy_phy_read(dev,
2131 b43legacy_phy_write(dev, 0x0427,
2134 b43legacy_phy_write(dev, 0x0427,
2135 (b43legacy_phy_read(dev, 0x0427)
2138 b43legacy_phy_write(dev, 0x049B, 0x00DC);
2141 b43legacy_phy_write(dev, 0x002B,
2142 (b43legacy_phy_read(dev,
2146 b43legacy_phy_write(dev, 0x0061,
2147 b43legacy_phy_read(dev,
2150 b43legacy_phy_write(dev, 0x0093,
2152 b43legacy_phy_write(dev, 0x0027,
2155 b43legacy_phy_write(dev, 0x0093,
2157 b43legacy_phy_write(dev, 0x0027,
2158 (b43legacy_phy_read(dev, 0x0027)
2165 if (dev->dev->id.revision == 2)
2169 b43legacy_phy_write(dev, 0x03E2,
2170 (b43legacy_phy_read(dev, 0x03E2)
2178 ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
2180 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
2194 void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev,
2215 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2224 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
2225 if (bit26 && dev->dev->id.revision >= 5) {
2227 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,