Lines Matching defs:ah

40 static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah,
46 limit = &ah->nf_2g;
48 limit = &ah->nf_5g;
53 static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
57 s16 calib_nf = ath9k_hw_get_nf_limits(ah, chan)->cal[chain];
62 return ath9k_hw_get_nf_limits(ah, chan)->nominal;
65 s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan,
72 ath9k_hw_get_default_nf(ah, chan, 0);
80 static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
84 struct ath_common *common = ath9k_hw_common(ah);
88 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
92 limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
96 ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan)))
146 static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
152 *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
155 *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
165 void ath9k_hw_reset_calibration(struct ath_hw *ah,
170 ath9k_hw_setup_calibration(ah, currCal);
172 ah->cal_start_time = jiffies;
176 ah->meas0.sign[i] = 0;
177 ah->meas1.sign[i] = 0;
178 ah->meas2.sign[i] = 0;
179 ah->meas3.sign[i] = 0;
182 ah->cal_samples = 0;
186 bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ath9k_cal_list *currCal = ah->cal_list_curr;
191 if (!ah->caldata)
194 if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
206 currCal = ah->cal_list;
210 ah->curchan->chan->center_freq);
212 ah->caldata->CalValid &= ~currCal->calData->calType;
216 } while (currCal != ah->cal_list);
222 void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
224 if (ah->caldata)
225 set_bit(NFCAL_PENDING, &ah->caldata->cal_flags);
227 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
231 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
234 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
237 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
240 int ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
244 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
245 struct ath_common *common = ath9k_hw_common(ah);
246 s16 default_nf = ath9k_hw_get_nf_limits(ah, chan)->nominal;
247 u32 bb_agc_ctl = REG_READ(ah, AR_PHY_AGC_CONTROL(ah));
249 if (ah->caldata)
250 h = ah->caldata->nfCalHist;
252 ENABLE_REG_RMW_BUFFER(ah);
260 if (ah->nf_override)
261 nfval = ah->nf_override;
267 ath9k_hw_get_nf_limits(ah, chan)->cal[i];
272 REG_RMW(ah, ah->nf_regs[i],
282 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
283 REG_RMW_BUFFER_FLUSH(ah);
284 ENABLE_REG_RMW_BUFFER(ah);
291 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
293 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
295 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
296 REG_RMW_BUFFER_FLUSH(ah);
305 if ((REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) &
315 ENABLE_REG_RMW_BUFFER(ah);
317 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
320 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
322 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
323 REG_RMW_BUFFER_FLUSH(ah);
338 REG_READ(ah, AR_PHY_AGC_CONTROL(ah)));
347 ENABLE_REG_RMW_BUFFER(ah);
353 REG_RMW(ah, ah->nf_regs[i],
357 REG_RMW_BUFFER_FLUSH(ah);
364 static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
366 struct ath_common *common = ath9k_hw_common(ah);
370 if (IS_CHAN_2GHZ(ah->curchan))
371 limit = &ah->nf_2g;
373 limit = &ah->nf_5g;
397 bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
399 struct ath_common *common = ath9k_hw_common(ah);
404 struct ath9k_hw_cal_data *caldata = ah->caldata;
406 if (REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF) {
412 ath9k_hw_do_getnf(ah, nfarray);
413 ath9k_hw_nf_sanitize(ah, nfarray);
415 if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
429 ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
431 ah->noise = ath9k_hw_getchan_noise(ah, chan, chan->noisefloor);
436 void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah,
442 ah->caldata->channel = chan->channel;
443 ah->caldata->channelFlags = chan->channelFlags;
444 h = ah->caldata->nfCalHist;
447 h[i].privNF = ath9k_hw_get_default_nf(ah, chan, k);
457 void ath9k_hw_bstuck_nfcal(struct ath_hw *ah)
459 struct ath9k_hw_cal_data *caldata = ah->caldata;
473 ath9k_hw_start_nfcal(ah, true);
474 else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF))
475 ath9k_hw_getnf(ah, ah->curchan);