Lines Matching refs:ADM8211_CSR_READ
77 u32 reg = ADM8211_CSR_READ(SPR);
100 ADM8211_CSR_READ(SPR); /* eeprom_delay */
115 if (ADM8211_CSR_READ(CSR_TEST0) & ADM8211_CSR_TEST0_EPTYP) {
248 ADM8211_CSR_READ(WEPCTL);
252 ADM8211_CSR_READ(WESK);
261 u32 reg = ADM8211_CSR_READ(WEPCTL);
283 u32 reg = ADM8211_CSR_READ(WEPCTL);
467 u32 stsr = ADM8211_CSR_READ(STSR);
515 ADM8211_CSR_READ(SYNRF); \
517 ADM8211_CSR_READ(SYNRF); \
521 ADM8211_CSR_READ(SYNRF); \
531 ADM8211_CSR_READ(SYNRF); \
534 ADM8211_CSR_READ(SYNRF); \
536 ADM8211_CSR_READ(SYNRF); \
541 ADM8211_CSR_READ(SYNRF); \
545 ADM8211_CSR_READ(SYNRF); \
549 ADM8211_CSR_READ(SYNRF); \
567 reg = ADM8211_CSR_READ(BBPCTL);
600 reg = ADM8211_CSR_READ(BBPCTL);
608 ADM8211_CSR_WRITE(BBPCTL, ADM8211_CSR_READ(BBPCTL) &
691 reg = ADM8211_CSR_READ(GPIO);
712 reg = ADM8211_CSR_READ(PLCPHD);
720 ADM8211_CSR_READ(SYNRF);
743 reg = ADM8211_CSR_READ(CAP0);
862 reg = ADM8211_CSR_READ(BBPCTL);
881 reg = ADM8211_CSR_READ(MMIRD1);
903 ADM8211_CSR_READ(SYNRF);
1042 reg = ADM8211_CSR_READ(SYNCTL);
1074 reg = ADM8211_CSR_READ(PLCPHD) & 0x00FFFFFF; /* keep bits 0-23 */
1093 reg = ADM8211_CSR_READ(PAR);
1119 reg = ADM8211_CSR_READ(CSR_TEST1);
1130 reg = ADM8211_CSR_READ(CMDR);
1157 ADM8211_CSR_READ(SYNRF);
1160 ADM8211_CSR_READ(SYNRF);
1164 reg = ADM8211_CSR_READ(CFPP);
1196 ADM8211_CSR_WRITE(STSR, ADM8211_CSR_READ(STSR));
1199 reg = ADM8211_CSR_READ(MACTEST);
1203 reg = ADM8211_CSR_READ(WEPCTL);
1209 ADM8211_CSR_READ(LPC);
1223 tmp = ADM8211_CSR_READ(PAR);
1226 while ((ADM8211_CSR_READ(PAR) & ADM8211_PAR_SWR) && timeout--)
1237 reg = ADM8211_CSR_READ(CSR_TEST1);
1241 reg = ADM8211_CSR_READ(CSR_TEST1);
1248 reg = ADM8211_CSR_READ(CSR_TEST0);
1264 tsftl = ADM8211_CSR_READ(TSFTL);
1265 tsft = ADM8211_CSR_READ(TSFTH);
1290 reg = ADM8211_CSR_READ(ABDA1);
1374 ADM8211_CSR_READ(NAR);
1561 ADM8211_CSR_READ(NAR);
1870 *(__le32 *)perm_addr = cpu_to_le32(ADM8211_CSR_READ(PAR0));
1872 cpu_to_le16(ADM8211_CSR_READ(PAR1) & 0xFFFF);
1900 ADM8211_CSR_READ(FRCTL);
1902 ADM8211_CSR_READ(FRCTL);