Lines Matching refs:val
20 int val; in genphy_c45_baset1_able() local
23 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able()
24 if (val < 0) in genphy_c45_baset1_able()
27 phydev->pma_extable = val; in genphy_c45_baset1_able()
400 int val; in genphy_c45_aneg_done() local
405 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done()
407 return val < 0 ? val : val & MDIO_AN_STAT1_COMPLETE ? 1 : 0; in genphy_c45_aneg_done()
422 int val, devad; in genphy_c45_read_link() local
426 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link()
427 if (val < 0) in genphy_c45_read_link()
428 return val; in genphy_c45_read_link()
433 if (val & MDIO_AN_CTRL1_RESTART) { in genphy_c45_read_link()
449 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
450 if (val < 0) in genphy_c45_read_link()
451 return val; in genphy_c45_read_link()
452 else if (val & MDIO_STAT1_LSTATUS) in genphy_c45_read_link()
456 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
457 if (val < 0) in genphy_c45_read_link()
458 return val; in genphy_c45_read_link()
460 if (!(val & MDIO_STAT1_LSTATUS)) in genphy_c45_read_link()
477 int val; in genphy_c45_baset1_read_lpa() local
479 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_baset1_read_lpa()
480 if (val < 0) in genphy_c45_baset1_read_lpa()
481 return val; in genphy_c45_baset1_read_lpa()
483 if (!(val & MDIO_AN_STAT1_COMPLETE)) { in genphy_c45_baset1_read_lpa()
496 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_L); in genphy_c45_baset1_read_lpa()
497 if (val < 0) in genphy_c45_baset1_read_lpa()
498 return val; in genphy_c45_baset1_read_lpa()
500 mii_t1_adv_l_mod_linkmode_t(phydev->lp_advertising, val); in genphy_c45_baset1_read_lpa()
501 phydev->pause = val & MDIO_AN_T1_ADV_L_PAUSE_CAP ? 1 : 0; in genphy_c45_baset1_read_lpa()
502 phydev->asym_pause = val & MDIO_AN_T1_ADV_L_PAUSE_ASYM ? 1 : 0; in genphy_c45_baset1_read_lpa()
504 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_M); in genphy_c45_baset1_read_lpa()
505 if (val < 0) in genphy_c45_baset1_read_lpa()
506 return val; in genphy_c45_baset1_read_lpa()
508 mii_t1_adv_m_mod_linkmode_t(phydev->lp_advertising, val); in genphy_c45_baset1_read_lpa()
525 int val; in genphy_c45_read_lpa() local
530 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa()
531 if (val < 0) in genphy_c45_read_lpa()
532 return val; in genphy_c45_read_lpa()
534 if (!(val & MDIO_AN_STAT1_COMPLETE)) { in genphy_c45_read_lpa()
546 val & MDIO_AN_STAT1_LPABLE); in genphy_c45_read_lpa()
549 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); in genphy_c45_read_lpa()
550 if (val < 0) in genphy_c45_read_lpa()
551 return val; in genphy_c45_read_lpa()
553 mii_adv_mod_linkmode_adv_t(phydev->lp_advertising, val); in genphy_c45_read_lpa()
554 phydev->pause = val & LPA_PAUSE_CAP ? 1 : 0; in genphy_c45_read_lpa()
555 phydev->asym_pause = val & LPA_PAUSE_ASYM ? 1 : 0; in genphy_c45_read_lpa()
558 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in genphy_c45_read_lpa()
559 if (val < 0) in genphy_c45_read_lpa()
560 return val; in genphy_c45_read_lpa()
562 mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, val); in genphy_c45_read_lpa()
575 int val; in genphy_c45_pma_baset1_read_master_slave() local
580 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1_CTRL); in genphy_c45_pma_baset1_read_master_slave()
581 if (val < 0) in genphy_c45_pma_baset1_read_master_slave()
582 return val; in genphy_c45_pma_baset1_read_master_slave()
584 if (val & MDIO_PMA_PMD_BT1_CTRL_CFG_MST) { in genphy_c45_pma_baset1_read_master_slave()
602 int val; in genphy_c45_read_pma() local
606 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_read_pma()
607 if (val < 0) in genphy_c45_read_pma()
608 return val; in genphy_c45_read_pma()
610 switch (val & MDIO_CTRL1_SPEEDSEL) { in genphy_c45_read_pma()
637 val = genphy_c45_pma_baset1_read_master_slave(phydev); in genphy_c45_read_pma()
638 if (val < 0) in genphy_c45_read_pma()
639 return val; in genphy_c45_read_pma()
652 int val; in genphy_c45_read_mdix() local
655 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_read_mdix()
657 if (val < 0) in genphy_c45_read_mdix()
658 return val; in genphy_c45_read_mdix()
660 switch (val) { in genphy_c45_read_mdix()
687 int val, changed = 0; in genphy_c45_write_eee_adv() local
690 val = linkmode_to_mii_eee_cap1_t(adv); in genphy_c45_write_eee_adv()
695 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
700 val); in genphy_c45_write_eee_adv()
701 if (val < 0) in genphy_c45_write_eee_adv()
702 return val; in genphy_c45_write_eee_adv()
703 if (val > 0) in genphy_c45_write_eee_adv()
708 val = linkmode_to_mii_eee_cap2_t(adv); in genphy_c45_write_eee_adv()
713 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
716 val); in genphy_c45_write_eee_adv()
717 if (val < 0) in genphy_c45_write_eee_adv()
718 return val; in genphy_c45_write_eee_adv()
719 if (val > 0) in genphy_c45_write_eee_adv()
725 val = linkmode_adv_to_mii_10base_t1_t(adv); in genphy_c45_write_eee_adv()
729 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
732 val); in genphy_c45_write_eee_adv()
733 if (val < 0) in genphy_c45_write_eee_adv()
734 return val; in genphy_c45_write_eee_adv()
735 if (val > 0) in genphy_c45_write_eee_adv()
749 int val; in genphy_c45_read_eee_adv() local
755 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in genphy_c45_read_eee_adv()
756 if (val < 0) in genphy_c45_read_eee_adv()
757 return val; in genphy_c45_read_eee_adv()
759 mii_eee_cap1_mod_linkmode_t(adv, val); in genphy_c45_read_eee_adv()
766 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV2); in genphy_c45_read_eee_adv()
767 if (val < 0) in genphy_c45_read_eee_adv()
768 return val; in genphy_c45_read_eee_adv()
770 mii_eee_cap2_mod_linkmode_adv_t(adv, val); in genphy_c45_read_eee_adv()
778 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10BT1_AN_CTRL); in genphy_c45_read_eee_adv()
779 if (val < 0) in genphy_c45_read_eee_adv()
780 return val; in genphy_c45_read_eee_adv()
782 mii_10base_t1_adv_mod_linkmode_t(adv, val); in genphy_c45_read_eee_adv()
796 int val; in genphy_c45_read_eee_lpa() local
802 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in genphy_c45_read_eee_lpa()
803 if (val < 0) in genphy_c45_read_eee_lpa()
804 return val; in genphy_c45_read_eee_lpa()
806 mii_eee_cap1_mod_linkmode_t(lpa, val); in genphy_c45_read_eee_lpa()
813 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2); in genphy_c45_read_eee_lpa()
814 if (val < 0) in genphy_c45_read_eee_lpa()
815 return val; in genphy_c45_read_eee_lpa()
817 mii_eee_cap2_mod_linkmode_adv_t(lpa, val); in genphy_c45_read_eee_lpa()
825 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10BT1_AN_STAT); in genphy_c45_read_eee_lpa()
826 if (val < 0) in genphy_c45_read_eee_lpa()
827 return val; in genphy_c45_read_eee_lpa()
829 mii_10base_t1_adv_mod_linkmode_t(lpa, val); in genphy_c45_read_eee_lpa()
841 int val; in genphy_c45_read_eee_cap1() local
846 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in genphy_c45_read_eee_cap1()
847 if (val < 0) in genphy_c45_read_eee_cap1()
848 return val; in genphy_c45_read_eee_cap1()
855 if (val == 0xffff) in genphy_c45_read_eee_cap1()
858 mii_eee_cap1_mod_linkmode_t(phydev->supported_eee, val); in genphy_c45_read_eee_cap1()
875 int val; in genphy_c45_read_eee_cap2() local
880 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE2); in genphy_c45_read_eee_cap2()
881 if (val < 0) in genphy_c45_read_eee_cap2()
882 return val; in genphy_c45_read_eee_cap2()
885 if (val == 0xffff) in genphy_c45_read_eee_cap2()
888 mii_eee_cap2_mod_linkmode_sup_t(phydev->supported_eee, val); in genphy_c45_read_eee_cap2()
899 int val; in genphy_c45_read_eee_abilities() local
906 val = genphy_c45_read_eee_cap1(phydev); in genphy_c45_read_eee_abilities()
907 if (val) in genphy_c45_read_eee_abilities()
908 return val; in genphy_c45_read_eee_abilities()
913 val = genphy_c45_read_eee_cap2(phydev); in genphy_c45_read_eee_abilities()
914 if (val) in genphy_c45_read_eee_abilities()
915 return val; in genphy_c45_read_eee_abilities()
923 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in genphy_c45_read_eee_abilities()
924 if (val < 0) in genphy_c45_read_eee_abilities()
925 return val; in genphy_c45_read_eee_abilities()
929 val & MDIO_PMA_10T1L_STAT_EEE); in genphy_c45_read_eee_abilities()
960 int val; in genphy_c45_pma_baset1_read_abilities() local
962 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1); in genphy_c45_pma_baset1_read_abilities()
963 if (val < 0) in genphy_c45_pma_baset1_read_abilities()
964 return val; in genphy_c45_pma_baset1_read_abilities()
968 val & MDIO_PMA_PMD_BT1_B10L_ABLE); in genphy_c45_pma_baset1_read_abilities()
972 val & MDIO_PMA_PMD_BT1_B100_ABLE); in genphy_c45_pma_baset1_read_abilities()
976 val & MDIO_PMA_PMD_BT1_B1000_ABLE); in genphy_c45_pma_baset1_read_abilities()
978 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_pma_baset1_read_abilities()
979 if (val < 0) in genphy_c45_pma_baset1_read_abilities()
980 return val; in genphy_c45_pma_baset1_read_abilities()
984 val & MDIO_AN_STAT1_ABLE); in genphy_c45_pma_baset1_read_abilities()
999 int val; in genphy_c45_pma_read_ext_abilities() local
1001 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_pma_read_ext_abilities()
1002 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1003 return val; in genphy_c45_pma_read_ext_abilities()
1007 val & MDIO_PMA_EXTABLE_10GBLRM); in genphy_c45_pma_read_ext_abilities()
1010 val & MDIO_PMA_EXTABLE_10GBT); in genphy_c45_pma_read_ext_abilities()
1013 val & MDIO_PMA_EXTABLE_10GBKX4); in genphy_c45_pma_read_ext_abilities()
1016 val & MDIO_PMA_EXTABLE_10GBKR); in genphy_c45_pma_read_ext_abilities()
1019 val & MDIO_PMA_EXTABLE_1000BT); in genphy_c45_pma_read_ext_abilities()
1022 val & MDIO_PMA_EXTABLE_1000BKX); in genphy_c45_pma_read_ext_abilities()
1026 val & MDIO_PMA_EXTABLE_100BTX); in genphy_c45_pma_read_ext_abilities()
1029 val & MDIO_PMA_EXTABLE_100BTX); in genphy_c45_pma_read_ext_abilities()
1033 val & MDIO_PMA_EXTABLE_10BT); in genphy_c45_pma_read_ext_abilities()
1036 val & MDIO_PMA_EXTABLE_10BT); in genphy_c45_pma_read_ext_abilities()
1038 if (val & MDIO_PMA_EXTABLE_NBT) { in genphy_c45_pma_read_ext_abilities()
1039 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_pma_read_ext_abilities()
1041 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1042 return val; in genphy_c45_pma_read_ext_abilities()
1046 val & MDIO_PMA_NG_EXTABLE_2_5GBT); in genphy_c45_pma_read_ext_abilities()
1050 val & MDIO_PMA_NG_EXTABLE_5GBT); in genphy_c45_pma_read_ext_abilities()
1053 if (val & MDIO_PMA_EXTABLE_BT1) { in genphy_c45_pma_read_ext_abilities()
1054 val = genphy_c45_pma_baset1_read_abilities(phydev); in genphy_c45_pma_read_ext_abilities()
1055 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1056 return val; in genphy_c45_pma_read_ext_abilities()
1076 int val; in genphy_c45_pma_read_abilities() local
1080 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_pma_read_abilities()
1081 if (val < 0) in genphy_c45_pma_read_abilities()
1082 return val; in genphy_c45_pma_read_abilities()
1084 if (val & MDIO_AN_STAT1_ABLE) in genphy_c45_pma_read_abilities()
1089 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT2); in genphy_c45_pma_read_abilities()
1090 if (val < 0) in genphy_c45_pma_read_abilities()
1091 return val; in genphy_c45_pma_read_abilities()
1095 val & MDIO_PMA_STAT2_10GBSR); in genphy_c45_pma_read_abilities()
1099 val & MDIO_PMA_STAT2_10GBLR); in genphy_c45_pma_read_abilities()
1103 val & MDIO_PMA_STAT2_10GBER); in genphy_c45_pma_read_abilities()
1105 if (val & MDIO_PMA_STAT2_EXTABLE) { in genphy_c45_pma_read_abilities()
1106 val = genphy_c45_pma_read_ext_abilities(phydev); in genphy_c45_pma_read_abilities()
1107 if (val < 0) in genphy_c45_pma_read_abilities()
1108 return val; in genphy_c45_pma_read_abilities()
1343 u16 val = 0; in genphy_c45_plca_set_cfg() local
1373 val = ret; in genphy_c45_plca_set_cfg()
1377 val = (val & ~MDIO_OATC14_PLCA_NCNT) | in genphy_c45_plca_set_cfg()
1381 val = (val & ~MDIO_OATC14_PLCA_ID) | in genphy_c45_plca_set_cfg()
1385 MDIO_OATC14_PLCA_CTRL1, val); in genphy_c45_plca_set_cfg()
1413 val = ret; in genphy_c45_plca_set_cfg()
1417 val = (val & ~MDIO_OATC14_PLCA_MAXBC) | in genphy_c45_plca_set_cfg()
1421 val = (val & ~MDIO_OATC14_PLCA_BTMR) | in genphy_c45_plca_set_cfg()
1425 MDIO_OATC14_PLCA_BURST, val); in genphy_c45_plca_set_cfg()