Lines Matching defs:lp
301 static int adf7242_soft_reset(struct adf7242_local *lp, int line);
303 static int adf7242_status(struct adf7242_local *lp, u8 *stat)
307 mutex_lock(&lp->bmux);
308 status = spi_sync(lp->spi, &lp->stat_msg);
309 *stat = lp->buf_stat_rx;
310 mutex_unlock(&lp->bmux);
315 static int adf7242_wait_status(struct adf7242_local *lp, unsigned int status,
322 adf7242_status(lp, &stat);
330 adf7242_soft_reset(lp, line);
331 adf7242_status(lp, &stat);
338 dev_warn(&lp->spi->dev,
343 dev_vdbg(&lp->spi->dev, "%s : loops=%d line %d\n", __func__, cnt, line);
348 static int adf7242_wait_rc_ready(struct adf7242_local *lp, int line)
350 return adf7242_wait_status(lp, STAT_RC_READY | STAT_SPI_READY,
354 static int adf7242_wait_spi_ready(struct adf7242_local *lp, int line)
356 return adf7242_wait_status(lp, STAT_SPI_READY,
360 static int adf7242_write_fbuf(struct adf7242_local *lp, u8 *data, u8 len)
362 u8 *buf = lp->buf;
379 adf7242_wait_spi_ready(lp, __LINE__);
381 mutex_lock(&lp->bmux);
385 status = spi_sync(lp->spi, &msg);
386 mutex_unlock(&lp->bmux);
391 static int adf7242_read_fbuf(struct adf7242_local *lp,
394 u8 *buf = lp->buf;
411 adf7242_wait_spi_ready(lp, __LINE__);
413 mutex_lock(&lp->bmux);
424 status = spi_sync(lp->spi, &msg);
426 mutex_unlock(&lp->bmux);
431 static int adf7242_read_reg(struct adf7242_local *lp, u16 addr, u8 *data)
438 .tx_buf = lp->buf_read_tx,
439 .rx_buf = lp->buf_read_rx,
442 adf7242_wait_spi_ready(lp, __LINE__);
444 mutex_lock(&lp->bmux);
445 lp->buf_read_tx[0] = CMD_SPI_MEM_RD(addr);
446 lp->buf_read_tx[1] = addr;
447 lp->buf_read_tx[2] = CMD_SPI_NOP;
448 lp->buf_read_tx[3] = CMD_SPI_NOP;
453 status = spi_sync(lp->spi, &msg);
458 *data = lp->buf_read_rx[3];
460 mutex_unlock(&lp->bmux);
462 dev_vdbg(&lp->spi->dev, "%s : REG 0x%X, VAL 0x%X\n", __func__,
468 static int adf7242_write_reg(struct adf7242_local *lp, u16 addr, u8 data)
472 adf7242_wait_spi_ready(lp, __LINE__);
474 mutex_lock(&lp->bmux);
475 lp->buf_reg_tx[0] = CMD_SPI_MEM_WR(addr);
476 lp->buf_reg_tx[1] = addr;
477 lp->buf_reg_tx[2] = data;
478 status = spi_write(lp->spi, lp->buf_reg_tx, 3);
479 mutex_unlock(&lp->bmux);
481 dev_vdbg(&lp->spi->dev, "%s : REG 0x%X, VAL 0x%X\n",
487 static int adf7242_cmd(struct adf7242_local *lp, unsigned int cmd)
491 dev_vdbg(&lp->spi->dev, "%s : CMD=0x%X\n", __func__, cmd);
494 adf7242_wait_rc_ready(lp, __LINE__);
496 mutex_lock(&lp->bmux);
497 lp->buf_cmd = cmd;
498 status = spi_write(lp->spi, &lp->buf_cmd, 1);
499 mutex_unlock(&lp->bmux);
504 static int adf7242_upload_firmware(struct adf7242_local *lp, u8 *data, u16 len)
509 u8 *buf = lp->buf;
524 adf7242_write_reg(lp, REG_PRAMPG, page);
529 mutex_lock(&lp->bmux);
530 status = spi_sync(lp->spi, &msg);
531 mutex_unlock(&lp->bmux);
538 static int adf7242_verify_firmware(struct adf7242_local *lp,
552 adf7242_write_reg(lp, REG_PRAMPG, page);
553 adf7242_read_fbuf(lp, buf, nb, false);
567 static void adf7242_clear_irqstat(struct adf7242_local *lp)
569 adf7242_write_reg(lp, REG_IRQ1_SRC1, IRQ_CCA_COMPLETE | IRQ_SFD_RX |
574 static int adf7242_cmd_rx(struct adf7242_local *lp)
577 adf7242_wait_status(lp, RC_STATUS_PHY_RDY, RC_STATUS_MASK, __LINE__);
578 adf7242_clear_irqstat(lp);
579 mod_delayed_work(lp->wqueue, &lp->work, msecs_to_jiffies(400));
581 return adf7242_cmd(lp, CMD_RC_RX);
586 struct adf7242_local *lp =
593 if (!test_bit(FLAG_XMIT, &lp->flags)) {
594 adf7242_cmd(lp, CMD_RC_PHY_RDY);
595 adf7242_cmd_rx(lp);
601 struct adf7242_local *lp = hw->priv;
605 dev_vdbg(&lp->spi->dev, "%s : Power %d dB\n", __func__, db);
622 adf7242_read_reg(lp, REG_PA_CFG, &tmp);
625 adf7242_write_reg(lp, REG_PA_CFG, tmp);
627 adf7242_read_reg(lp, REG_PA_BIAS, &tmp);
630 adf7242_write_reg(lp, REG_PA_BIAS, tmp);
632 adf7242_read_reg(lp, REG_EXTPA_MSC, &tmp);
636 return adf7242_write_reg(lp, REG_EXTPA_MSC, tmp);
642 struct adf7242_local *lp = hw->priv;
645 dev_vdbg(&lp->spi->dev, "%s : min_be=%d max_be=%d retries=%d\n",
651 ret = adf7242_write_reg(lp, REG_AUTO_TX1,
652 MAX_FRAME_RETRIES(lp->max_frame_retries) |
657 lp->max_cca_retries = retries;
658 lp->max_be = max_be;
659 lp->min_be = min_be;
661 return adf7242_write_reg(lp, REG_AUTO_TX2, CSMA_MAX_BE(max_be) |
667 struct adf7242_local *lp = hw->priv;
670 dev_vdbg(&lp->spi->dev, "%s : Retries = %d\n", __func__, retries);
676 ret = adf7242_write_reg(lp, REG_AUTO_TX1,
678 MAX_CCA_RETRIES(lp->max_cca_retries));
680 lp->max_frame_retries = retries;
687 struct adf7242_local *lp = hw->priv;
689 *level = lp->rssi;
691 dev_vdbg(&lp->spi->dev, "%s :Exit level=%d\n",
699 struct adf7242_local *lp = hw->priv;
701 adf7242_cmd(lp, CMD_RC_PHY_RDY);
702 adf7242_clear_irqstat(lp);
703 enable_irq(lp->spi->irq);
704 set_bit(FLAG_START, &lp->flags);
706 return adf7242_cmd_rx(lp);
711 struct adf7242_local *lp = hw->priv;
713 disable_irq(lp->spi->irq);
714 cancel_delayed_work_sync(&lp->work);
715 adf7242_cmd(lp, CMD_RC_IDLE);
716 clear_bit(FLAG_START, &lp->flags);
717 adf7242_clear_irqstat(lp);
722 struct adf7242_local *lp = hw->priv;
725 dev_dbg(&lp->spi->dev, "%s :Channel=%d\n", __func__, channel);
734 adf7242_cmd(lp, CMD_RC_PHY_RDY);
736 adf7242_write_reg(lp, REG_CH_FREQ0, freq);
737 adf7242_write_reg(lp, REG_CH_FREQ1, freq >> 8);
738 adf7242_write_reg(lp, REG_CH_FREQ2, freq >> 16);
740 if (test_bit(FLAG_START, &lp->flags))
741 return adf7242_cmd_rx(lp);
743 return adf7242_cmd(lp, CMD_RC_PHY_RDY);
750 struct adf7242_local *lp = hw->priv;
753 dev_dbg(&lp->spi->dev, "%s :Changed=0x%lX\n", __func__, changed);
763 adf7242_write_reg(lp, REG_IEEE_ADDR_0 + i, addr[i]);
769 adf7242_write_reg(lp, REG_SHORT_ADDR_0, saddr);
770 adf7242_write_reg(lp, REG_SHORT_ADDR_1, saddr >> 8);
776 adf7242_write_reg(lp, REG_PAN_ID0, pan_id);
777 adf7242_write_reg(lp, REG_PAN_ID1, pan_id >> 8);
781 adf7242_read_reg(lp, REG_AUTO_CFG, ®);
786 adf7242_write_reg(lp, REG_AUTO_CFG, reg);
794 struct adf7242_local *lp = hw->priv;
796 dev_dbg(&lp->spi->dev, "%s : mode %d\n", __func__, on);
798 lp->promiscuous = on;
801 adf7242_write_reg(lp, REG_AUTO_CFG, 0);
802 return adf7242_write_reg(lp, REG_FFILT_CFG,
810 adf7242_write_reg(lp, REG_FFILT_CFG,
816 return adf7242_write_reg(lp, REG_AUTO_CFG, RX_AUTO_ACK_EN);
822 struct adf7242_local *lp = hw->priv;
825 dev_dbg(&lp->spi->dev, "%s : level %d\n", __func__, level);
827 return adf7242_write_reg(lp, REG_CCA1, level);
832 struct adf7242_local *lp = hw->priv;
836 disable_irq(lp->spi->irq);
837 set_bit(FLAG_XMIT, &lp->flags);
838 cancel_delayed_work_sync(&lp->work);
839 reinit_completion(&lp->tx_complete);
840 adf7242_cmd(lp, CMD_RC_PHY_RDY);
841 adf7242_clear_irqstat(lp);
843 ret = adf7242_write_fbuf(lp, skb->data, skb->len);
847 ret = adf7242_cmd(lp, CMD_RC_CSMACA);
850 enable_irq(lp->spi->irq);
852 ret = wait_for_completion_interruptible_timeout(&lp->tx_complete,
857 dev_dbg(&lp->spi->dev, "Timeout waiting for TX interrupt\n");
862 if (lp->tx_stat != SUCCESS) {
863 dev_dbg(&lp->spi->dev,
865 lp->tx_stat);
872 clear_bit(FLAG_XMIT, &lp->flags);
873 adf7242_cmd_rx(lp);
878 static int adf7242_rx(struct adf7242_local *lp)
885 ret = adf7242_read_reg(lp, 0, &len_u8);
892 dev_dbg(&lp->spi->dev,
899 adf7242_cmd_rx(lp);
904 ret = adf7242_read_fbuf(lp, data, len, true);
907 adf7242_cmd_rx(lp);
912 lp->rssi = data[len - 1];
914 ret = adf7242_cmd_rx(lp);
918 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
920 dev_dbg(&lp->spi->dev, "%s: ret=%d len=%d lqi=%d rssi=%d\n",
921 __func__, ret, (int)len, (int)lqi, lp->rssi);
941 static void adf7242_debug(struct adf7242_local *lp, u8 irq1)
946 adf7242_status(lp, &stat);
948 dev_dbg(&lp->spi->dev, "%s IRQ1 = %X:\n%s%s%s%s%s%s%s%s\n",
959 dev_dbg(&lp->spi->dev, "%s STATUS = %X:\n%s\n%s\n%s\n%s\n%s%s%s%s%s\n",
975 struct adf7242_local *lp = data;
979 mod_delayed_work(lp->wqueue, &lp->work, msecs_to_jiffies(400));
980 adf7242_read_reg(lp, REG_IRQ1_SRC1, &irq1);
983 dev_err(&lp->spi->dev, "%s :ERROR IRQ1 = 0x%X\n",
986 adf7242_debug(lp, irq1);
988 xmit = test_bit(FLAG_XMIT, &lp->flags);
991 adf7242_wait_status(lp, RC_STATUS_PHY_RDY,
997 adf7242_read_reg(lp, REG_AUTO_STATUS, &astat);
1000 dev_dbg(&lp->spi->dev, "AUTO_STATUS = %X:\n%s%s%s%s\n",
1009 lp->tx_stat = astat;
1011 lp->tx_stat = SUCCESS;
1013 complete(&lp->tx_complete);
1014 adf7242_clear_irqstat(lp);
1017 adf7242_rx(lp);
1018 } else if (!xmit && test_bit(FLAG_START, &lp->flags)) {
1020 dev_dbg(&lp->spi->dev, "%s:%d : ERROR IRQ1 = 0x%X\n",
1022 adf7242_cmd(lp, CMD_RC_PHY_RDY);
1023 adf7242_cmd_rx(lp);
1030 dev_dbg(&lp->spi->dev, "%s:%d : ERROR IRQ1 = 0x%X, xmit %d\n",
1032 adf7242_wait_status(lp, RC_STATUS_PHY_RDY,
1034 complete(&lp->tx_complete);
1035 adf7242_clear_irqstat(lp);
1041 static int adf7242_soft_reset(struct adf7242_local *lp, int line)
1043 dev_warn(&lp->spi->dev, "%s (line %d)\n", __func__, line);
1045 if (test_bit(FLAG_START, &lp->flags))
1046 disable_irq_nosync(lp->spi->irq);
1048 adf7242_cmd(lp, CMD_RC_PC_RESET_NO_WAIT);
1050 adf7242_write_reg(lp, REG_PKT_CFG, ADDON_EN | BIT(2));
1051 adf7242_cmd(lp, CMD_RC_PHY_RDY);
1052 adf7242_set_promiscuous_mode(lp->hw, lp->promiscuous);
1053 adf7242_set_csma_params(lp->hw, lp->min_be, lp->max_be,
1054 lp->max_cca_retries);
1055 adf7242_clear_irqstat(lp);
1057 if (test_bit(FLAG_START, &lp->flags)) {
1058 enable_irq(lp->spi->irq);
1059 return adf7242_cmd(lp, CMD_RC_RX);
1065 static int adf7242_hw_init(struct adf7242_local *lp)
1070 adf7242_cmd(lp, CMD_RC_RESET);
1071 adf7242_cmd(lp, CMD_RC_IDLE);
1078 ret = request_firmware(&fw, FIRMWARE, &lp->spi->dev);
1080 dev_err(&lp->spi->dev,
1085 ret = adf7242_upload_firmware(lp, (u8 *)fw->data, fw->size);
1087 dev_err(&lp->spi->dev,
1093 ret = adf7242_verify_firmware(lp, (u8 *)fw->data, fw->size);
1095 dev_err(&lp->spi->dev,
1101 adf7242_cmd(lp, CMD_RC_PC_RESET);
1105 adf7242_write_reg(lp, REG_FFILT_CFG,
1111 adf7242_write_reg(lp, REG_AUTO_CFG, RX_AUTO_ACK_EN);
1113 adf7242_write_reg(lp, REG_PKT_CFG, ADDON_EN | BIT(2));
1115 adf7242_write_reg(lp, REG_EXTPA_MSC, 0xF1);
1116 adf7242_write_reg(lp, REG_RXFE_CFG, 0x1D);
1118 adf7242_write_reg(lp, REG_IRQ1_EN0, 0);
1119 adf7242_write_reg(lp, REG_IRQ1_EN1, IRQ_RX_PKT_RCVD | IRQ_CSMA_CA);
1121 adf7242_clear_irqstat(lp);
1122 adf7242_write_reg(lp, REG_IRQ1_SRC0, 0xFF);
1124 adf7242_cmd(lp, CMD_RC_IDLE);
1131 struct adf7242_local *lp = spi_get_drvdata(file->private);
1134 adf7242_status(lp, &stat);
1135 adf7242_read_reg(lp, REG_IRQ1_SRC1, &irq1);
1158 seq_printf(file, "RSSI = %d\n", lp->rssi);
1163 static void adf7242_debugfs_init(struct adf7242_local *lp)
1168 "adf7242-%s", dev_name(&lp->spi->dev));
1170 lp->debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
1172 debugfs_create_devm_seqfile(&lp->spi->dev, "status", lp->debugfs_root,
1194 struct adf7242_local *lp;
1202 hw = ieee802154_alloc_hw(sizeof(*lp), &adf7242_ops);
1206 lp = hw->priv;
1207 lp->hw = hw;
1208 lp->spi = spi;
1210 hw->priv = lp;
1250 mutex_init(&lp->bmux);
1251 init_completion(&lp->tx_complete);
1254 lp->stat_xfer.len = 1;
1255 lp->stat_xfer.tx_buf = &lp->buf_stat_tx;
1256 lp->stat_xfer.rx_buf = &lp->buf_stat_rx;
1257 lp->buf_stat_tx = CMD_SPI_NOP;
1259 spi_message_init(&lp->stat_msg);
1260 spi_message_add_tail(&lp->stat_xfer, &lp->stat_msg);
1262 spi_set_drvdata(spi, lp);
1263 INIT_DELAYED_WORK(&lp->work, adf7242_rx_cal_work);
1264 lp->wqueue = alloc_ordered_workqueue(dev_name(&spi->dev),
1266 if (unlikely(!lp->wqueue)) {
1271 ret = adf7242_hw_init(lp);
1281 dev_name(&spi->dev), lp);
1287 ret = ieee802154_register_hw(lp->hw);
1291 dev_set_drvdata(&spi->dev, lp);
1293 adf7242_debugfs_init(lp);
1300 destroy_workqueue(lp->wqueue);
1302 mutex_destroy(&lp->bmux);
1303 ieee802154_free_hw(lp->hw);
1310 struct adf7242_local *lp = spi_get_drvdata(spi);
1312 debugfs_remove_recursive(lp->debugfs_root);
1314 ieee802154_unregister_hw(lp->hw);
1316 cancel_delayed_work_sync(&lp->work);
1317 destroy_workqueue(lp->wqueue);
1319 mutex_destroy(&lp->bmux);
1320 ieee802154_free_hw(lp->hw);