Lines Matching defs:lp
195 #define SMC_ENABLE_INT(lp, x) do { \
198 spin_lock_irqsave(&lp->lock, smc_enable_flags); \
199 mask = SMC_GET_INT_MASK(lp); \
201 SMC_SET_INT_MASK(lp, mask); \
202 spin_unlock_irqrestore(&lp->lock, smc_enable_flags); \
206 #define SMC_DISABLE_INT(lp, x) do { \
209 spin_lock_irqsave(&lp->lock, smc_disable_flags); \
210 mask = SMC_GET_INT_MASK(lp); \
212 SMC_SET_INT_MASK(lp, mask); \
213 spin_unlock_irqrestore(&lp->lock, smc_disable_flags); \
221 #define SMC_WAIT_MMU_BUSY(lp) do { \
222 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
224 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
241 struct smc_local *lp = netdev_priv(dev);
242 void __iomem *ioaddr = lp->base;
249 spin_lock_irq(&lp->lock);
250 SMC_SELECT_BANK(lp, 2);
251 SMC_SET_INT_MASK(lp, 0);
252 pending_skb = lp->pending_tx_skb;
253 lp->pending_tx_skb = NULL;
254 spin_unlock_irq(&lp->lock);
267 SMC_SELECT_BANK(lp, 0);
268 SMC_SET_RCR(lp, RCR_SOFTRST);
275 SMC_SELECT_BANK(lp, 1);
284 if (lp->cfg.flags & SMC91X_NOWAIT)
293 SMC_SET_CONFIG(lp, cfg);
306 SMC_SELECT_BANK(lp, 0);
307 SMC_SET_RCR(lp, RCR_CLEAR);
308 SMC_SET_TCR(lp, TCR_CLEAR);
310 SMC_SELECT_BANK(lp, 1);
311 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
322 SMC_SET_CTL(lp, ctl);
325 SMC_SELECT_BANK(lp, 2);
326 SMC_SET_MMU_CMD(lp, MC_RESET);
327 SMC_WAIT_MMU_BUSY(lp);
335 struct smc_local *lp = netdev_priv(dev);
336 void __iomem *ioaddr = lp->base;
342 SMC_SELECT_BANK(lp, 0);
343 SMC_SET_TCR(lp, lp->tcr_cur_mode);
344 SMC_SET_RCR(lp, lp->rcr_cur_mode);
346 SMC_SELECT_BANK(lp, 1);
347 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
351 if (lp->version >= (CHIP_91100 << 4))
353 SMC_SELECT_BANK(lp, 2);
354 SMC_SET_INT_MASK(lp, mask);
369 struct smc_local *lp = netdev_priv(dev);
370 void __iomem *ioaddr = lp->base;
376 spin_lock_irq(&lp->lock);
377 SMC_SELECT_BANK(lp, 2);
378 SMC_SET_INT_MASK(lp, 0);
379 pending_skb = lp->pending_tx_skb;
380 lp->pending_tx_skb = NULL;
381 spin_unlock_irq(&lp->lock);
385 SMC_SELECT_BANK(lp, 0);
386 SMC_SET_RCR(lp, RCR_CLEAR);
387 SMC_SET_TCR(lp, TCR_CLEAR);
391 SMC_SELECT_BANK(lp, 1);
392 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
401 struct smc_local *lp = netdev_priv(dev);
402 void __iomem *ioaddr = lp->base;
407 packet_number = SMC_GET_RXFIFO(lp);
414 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
417 SMC_GET_PKT_HDR(lp, status, packet_len);
435 SMC_WAIT_MMU_BUSY(lp);
436 SMC_SET_MMU_CMD(lp, MC_RELEASE);
463 SMC_WAIT_MMU_BUSY(lp);
464 SMC_SET_MMU_CMD(lp, MC_RELEASE);
473 if (lp->version == 0x90)
483 SMC_PULL_DATA(lp, data, packet_len - 4);
485 SMC_WAIT_MMU_BUSY(lp);
486 SMC_SET_MMU_CMD(lp, MC_RELEASE);
541 struct smc_local *lp = from_tasklet(lp, t, tx_task);
542 struct net_device *dev = lp->dev;
543 void __iomem *ioaddr = lp->base;
551 if (!smc_special_trylock(&lp->lock, flags)) {
553 tasklet_schedule(&lp->tx_task);
557 skb = lp->pending_tx_skb;
559 smc_special_unlock(&lp->lock, flags);
562 lp->pending_tx_skb = NULL;
564 packet_no = SMC_GET_AR(lp);
569 smc_special_unlock(&lp->lock, flags);
574 SMC_SET_PN(lp, packet_no);
575 SMC_SET_PTR(lp, PTR_AUTOINC);
587 SMC_PUT_PKT_HDR(lp, 0, len + 6);
590 SMC_PUSH_DATA(lp, buf, len & ~1);
593 SMC_outw(lp, ((len & 1) ? (0x2000 | buf[len - 1]) : 0), ioaddr,
594 DATA_REG(lp));
608 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
609 smc_special_unlock(&lp->lock, flags);
615 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
632 struct smc_local *lp = netdev_priv(dev);
633 void __iomem *ioaddr = lp->base;
639 BUG_ON(lp->pending_tx_skb != NULL);
661 smc_special_lock(&lp->lock, flags);
664 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
672 status = SMC_GET_INT(lp);
674 SMC_ACK_INT(lp, IM_ALLOC_INT);
679 smc_special_unlock(&lp->lock, flags);
681 lp->pending_tx_skb = skb;
686 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
692 smc_hardware_send_pkt(&lp->tx_task);
705 struct smc_local *lp = netdev_priv(dev);
706 void __iomem *ioaddr = lp->base;
713 packet_no = SMC_GET_TXFIFO(lp);
720 saved_packet = SMC_GET_PN(lp);
721 SMC_SET_PN(lp, packet_no);
724 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
725 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
746 SMC_WAIT_MMU_BUSY(lp);
747 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
750 SMC_WAIT_MMU_BUSY(lp);
751 SMC_SET_PN(lp, saved_packet);
754 SMC_SELECT_BANK(lp, 0);
755 SMC_SET_TCR(lp, lp->tcr_cur_mode);
756 SMC_SELECT_BANK(lp, 2);
764 struct smc_local *lp = netdev_priv(dev);
765 void __iomem *ioaddr = lp->base;
768 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
777 SMC_SET_MII(lp, mii_reg);
779 SMC_SET_MII(lp, mii_reg | MII_MCLK);
786 struct smc_local *lp = netdev_priv(dev);
787 void __iomem *ioaddr = lp->base;
790 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
791 SMC_SET_MII(lp, mii_reg);
794 if (SMC_GET_MII(lp) & MII_MDI)
797 SMC_SET_MII(lp, mii_reg);
799 SMC_SET_MII(lp, mii_reg | MII_MCLK);
811 struct smc_local *lp = netdev_priv(dev);
812 void __iomem *ioaddr = lp->base;
815 SMC_SELECT_BANK(lp, 3);
827 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
832 SMC_SELECT_BANK(lp, 2);
842 struct smc_local *lp = netdev_priv(dev);
843 void __iomem *ioaddr = lp->base;
845 SMC_SELECT_BANK(lp, 3);
854 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
859 SMC_SELECT_BANK(lp, 2);
867 struct smc_local *lp = netdev_priv(dev);
872 lp->phy_type = 0;
892 lp->mii.phy_id = phyaddr & 31;
893 lp->phy_type = id1 << 16 | id2;
904 struct smc_local *lp = netdev_priv(dev);
905 void __iomem *ioaddr = lp->base;
906 int phyaddr = lp->mii.phy_id;
922 if (lp->ctl_rfduplx)
925 if (lp->ctl_rspeed == 100)
932 SMC_SELECT_BANK(lp, 0);
933 SMC_SET_RPC(lp, lp->rpc_cur_mode);
934 SMC_SELECT_BANK(lp, 2);
950 * Must be called with lp->lock locked.
954 struct smc_local *lp = netdev_priv(dev);
961 spin_unlock_irq(&lp->lock);
963 spin_lock_irq(&lp->lock);
981 struct smc_local *lp = netdev_priv(dev);
983 int phy = lp->mii.phy_id;
985 if (lp->phy_type == 0)
991 cancel_work_sync(&lp->phy_configure);
1007 struct smc_local *lp = netdev_priv(dev);
1008 void __iomem *ioaddr = lp->base;
1010 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1012 if (lp->mii.full_duplex) {
1013 lp->tcr_cur_mode |= TCR_SWFDUP;
1015 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1018 SMC_SELECT_BANK(lp, 0);
1019 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1034 struct smc_local *lp =
1036 struct net_device *dev = lp->dev;
1037 void __iomem *ioaddr = lp->base;
1038 int phyaddr = lp->mii.phy_id;
1044 spin_lock_irq(&lp->lock);
1049 if (lp->phy_type == 0)
1067 SMC_SELECT_BANK(lp, 0);
1068 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1071 if (lp->mii.force_media) {
1099 if (lp->ctl_rspeed != 100)
1102 if (!lp->ctl_rfduplx)
1107 lp->mii.advertising = my_ad_caps;
1125 SMC_SELECT_BANK(lp, 2);
1126 spin_unlock_irq(&lp->lock);
1137 struct smc_local *lp = netdev_priv(dev);
1138 int phyaddr = lp->mii.phy_id;
1143 if (lp->phy_type == 0)
1160 struct smc_local *lp = netdev_priv(dev);
1161 void __iomem *ioaddr = lp->base;
1166 SMC_SELECT_BANK(lp, 0);
1167 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1168 SMC_SELECT_BANK(lp, 2);
1176 if (netif_msg_link(lp))
1184 struct smc_local *lp = netdev_priv(dev);
1185 void __iomem *ioaddr = lp->base;
1190 SMC_SELECT_BANK(lp, 1);
1191 ctl = SMC_GET_CTL(lp);
1192 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1193 SMC_SET_CTL(lp, ctl);
1194 SMC_SELECT_BANK(lp, 2);
1204 struct smc_local *lp = netdev_priv(dev);
1205 void __iomem *ioaddr = lp->base;
1211 spin_lock(&lp->lock);
1218 saved_pointer = SMC_GET_PTR(lp);
1219 mask = SMC_GET_INT_MASK(lp);
1220 SMC_SET_INT_MASK(lp, 0);
1226 status = SMC_GET_INT(lp);
1230 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1231 meminfo = SMC_GET_MIR(lp);
1232 SMC_SELECT_BANK(lp, 2); meminfo; }),
1233 SMC_GET_FIFO(lp));
1243 SMC_ACK_INT(lp, IM_TX_INT);
1251 tasklet_hi_schedule(&lp->tx_task);
1258 SMC_SELECT_BANK(lp, 0);
1259 card_stats = SMC_GET_COUNTER(lp);
1260 SMC_SELECT_BANK(lp, 2);
1270 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1271 eph_st = SMC_GET_EPH_STATUS(lp);
1272 SMC_SELECT_BANK(lp, 2); eph_st; }));
1273 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1279 SMC_ACK_INT(lp, IM_MDINT);
1282 SMC_ACK_INT(lp, IM_ERCV_INT);
1288 SMC_SET_PTR(lp, saved_pointer);
1289 SMC_SET_INT_MASK(lp, mask);
1290 spin_unlock(&lp->lock);
1327 struct smc_local *lp = netdev_priv(dev);
1328 void __iomem *ioaddr = lp->base;
1333 spin_lock_irq(&lp->lock);
1334 status = SMC_GET_INT(lp);
1335 mask = SMC_GET_INT_MASK(lp);
1336 fifo = SMC_GET_FIFO(lp);
1337 SMC_SELECT_BANK(lp, 0);
1338 eph_st = SMC_GET_EPH_STATUS(lp);
1339 meminfo = SMC_GET_MIR(lp);
1340 SMC_SELECT_BANK(lp, 2);
1341 spin_unlock_irq(&lp->lock);
1353 if (lp->phy_type != 0)
1354 schedule_work(&lp->phy_configure);
1369 struct smc_local *lp = netdev_priv(dev);
1370 void __iomem *ioaddr = lp->base;
1378 lp->rcr_cur_mode |= RCR_PRMS;
1393 lp->rcr_cur_mode |= RCR_ALMUL;
1429 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1435 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1445 spin_lock_irq(&lp->lock);
1446 SMC_SELECT_BANK(lp, 0);
1447 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1449 SMC_SELECT_BANK(lp, 3);
1450 SMC_SET_MCAST(lp, multicast_table);
1452 SMC_SELECT_BANK(lp, 2);
1453 spin_unlock_irq(&lp->lock);
1465 struct smc_local *lp = netdev_priv(dev);
1470 lp->tcr_cur_mode = TCR_DEFAULT;
1471 lp->rcr_cur_mode = RCR_DEFAULT;
1472 lp->rpc_cur_mode = RPC_DEFAULT |
1473 lp->cfg.leda << RPC_LSXA_SHFT |
1474 lp->cfg.ledb << RPC_LSXB_SHFT;
1480 if (lp->phy_type == 0)
1481 lp->tcr_cur_mode |= TCR_MON_CSN;
1488 if (lp->phy_type != 0)
1489 smc_phy_configure(&lp->phy_configure);
1491 spin_lock_irq(&lp->lock);
1493 spin_unlock_irq(&lp->lock);
1509 struct smc_local *lp = netdev_priv(dev);
1518 tasklet_kill(&lp->tx_task);
1530 struct smc_local *lp = netdev_priv(dev);
1532 if (lp->phy_type != 0) {
1533 spin_lock_irq(&lp->lock);
1534 mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1535 spin_unlock_irq(&lp->lock);
1541 if (lp->ctl_rspeed == 10)
1543 else if (lp->ctl_rspeed == 100)
1548 cmd->base.duplex = lp->tcr_cur_mode & TCR_SWFDUP ?
1562 struct smc_local *lp = netdev_priv(dev);
1565 if (lp->phy_type != 0) {
1566 spin_lock_irq(&lp->lock);
1567 ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1568 spin_unlock_irq(&lp->lock);
1577 lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1596 struct smc_local *lp = netdev_priv(dev);
1599 if (lp->phy_type != 0) {
1600 spin_lock_irq(&lp->lock);
1601 ret = mii_nway_restart(&lp->mii);
1602 spin_unlock_irq(&lp->lock);
1610 struct smc_local *lp = netdev_priv(dev);
1611 return lp->msg_enable;
1616 struct smc_local *lp = netdev_priv(dev);
1617 lp->msg_enable = level;
1623 struct smc_local *lp = netdev_priv(dev);
1624 void __iomem *ioaddr = lp->base;
1626 spin_lock_irq(&lp->lock);
1628 SMC_SELECT_BANK(lp, 1);
1629 SMC_SET_GP(lp, word);
1631 SMC_SELECT_BANK(lp, 2);
1632 SMC_SET_PTR(lp, addr);
1634 SMC_SELECT_BANK(lp, 1);
1635 ctl = SMC_GET_CTL(lp);
1636 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1640 } while (SMC_GET_CTL(lp) & CTL_STORE);
1642 SMC_SET_CTL(lp, ctl);
1643 SMC_SELECT_BANK(lp, 2);
1644 spin_unlock_irq(&lp->lock);
1651 struct smc_local *lp = netdev_priv(dev);
1652 void __iomem *ioaddr = lp->base;
1654 spin_lock_irq(&lp->lock);
1656 SMC_SELECT_BANK(lp, 2);
1657 SMC_SET_PTR(lp, addr | PTR_READ);
1659 SMC_SELECT_BANK(lp, 1);
1660 SMC_SET_GP(lp, 0xffff); /* init to known */
1661 ctl = SMC_GET_CTL(lp);
1662 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1666 } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1668 *word = SMC_GET_GP(lp);
1670 SMC_SET_CTL(lp, ctl);
1671 SMC_SELECT_BANK(lp, 2);
1672 spin_unlock_irq(&lp->lock);
1770 static int smc_findirq(struct smc_local *lp)
1772 void __iomem *ioaddr = lp->base;
1776 DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1786 SMC_SELECT_BANK(lp, 2);
1787 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1793 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1801 int_status = SMC_GET_INT(lp);
1814 SMC_SET_INT_MASK(lp, 0);
1847 struct smc_local *lp = netdev_priv(dev);
1856 val = SMC_CURRENT_BANK(lp);
1873 SMC_SELECT_BANK(lp, 0);
1874 val = SMC_CURRENT_BANK(lp);
1886 SMC_SELECT_BANK(lp, 1);
1887 val = SMC_GET_BASE(lp);
1899 SMC_SELECT_BANK(lp, 3);
1900 revision_register = SMC_GET_REV(lp);
1917 lp->base = ioaddr;
1918 lp->version = revision_register & 0xff;
1919 spin_lock_init(&lp->lock);
1922 SMC_SELECT_BANK(lp, 1);
1923 SMC_GET_MAC_ADDR(lp, addr);
1949 dev->irq = smc_findirq(lp);
1967 tasklet_setup(&lp->tx_task, smc_hardware_send_pkt);
1968 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1969 lp->dev = dev;
1970 lp->mii.phy_id_mask = 0x1f;
1971 lp->mii.reg_num_mask = 0x1f;
1972 lp->mii.force_media = 0;
1973 lp->mii.full_duplex = 0;
1974 lp->mii.dev = dev;
1975 lp->mii.mdio_read = smc_phy_read;
1976 lp->mii.mdio_write = smc_phy_write;
1981 if (lp->version >= (CHIP_91100 << 4))
1989 lp->msg_enable = NETIF_MSG_LINK;
1990 lp->ctl_rfduplx = 0;
1991 lp->ctl_rspeed = 10;
1993 if (lp->version >= (CHIP_91100 << 4)) {
1994 lp->ctl_rfduplx = 1;
1995 lp->ctl_rspeed = 100;
2005 lp->cfg.flags |= SMC91X_USE_DMA;
2007 if (lp->cfg.flags & SMC91X_USE_DMA) {
2012 lp->dma_chan = dma_request_channel(mask, NULL, NULL);
2021 lp->base, dev->irq);
2023 if (lp->dma_chan)
2024 pr_cont(" DMA %p", lp->dma_chan);
2027 lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2038 if (lp->phy_type == 0) {
2040 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2042 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2049 if (retval && lp->dma_chan)
2050 dma_release_channel(lp->dma_chan);
2058 struct smc_local *lp = netdev_priv(ndev);
2101 if (!SMC_16BIT(lp))
2122 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2137 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2147 struct smc_local *lp = netdev_priv(ndev);
2158 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2165 struct smc_local *lp = netdev_priv(ndev);
2168 if (lp->datacs)
2169 iounmap(lp->datacs);
2171 lp->datacs = NULL;
2239 struct smc_local *lp;
2258 lp = netdev_priv(ndev);
2259 lp->cfg.flags = 0;
2262 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2263 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2265 if (!SMC_8BIT(lp) && !SMC_16BIT(lp)) {
2279 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2288 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2297 if (lp->reset_gpio)
2304 lp->cfg.flags |= SMC91X_USE_8BIT;
2306 lp->cfg.flags |= SMC91X_USE_16BIT;
2308 lp->cfg.flags |= SMC91X_USE_32BIT;
2310 lp->cfg.flags |= SMC91X_USE_16BIT;
2314 lp->io_shift = val;
2315 lp->cfg.pxa_u16_align4 =
2321 lp->cfg.flags |= (SMC_CAN_USE_8BIT) ? SMC91X_USE_8BIT : 0;
2322 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2323 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2324 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2327 if (!lp->cfg.leda && !lp->cfg.ledb) {
2328 lp->cfg.leda = RPC_LSA_DEFAULT;
2329 lp->cfg.ledb = RPC_LSB_DEFAULT;
2382 struct smc_local *lp = netdev_priv(ndev);
2383 lp->device = &pdev->dev;
2384 lp->physaddr = res->start;
2414 struct smc_local *lp = netdev_priv(ndev);
2422 if (lp->dma_chan)
2423 dma_release_channel(lp->dma_chan);
2425 iounmap(lp->base);
2458 struct smc_local *lp = netdev_priv(ndev);
2463 if (lp->phy_type != 0)
2464 smc_phy_configure(&lp->phy_configure);