microchip/sparx5/sparx5_vlan.c

10 static int sparx5_vlant_set_mask(struct sparx5 *sparx5, u16 vid)
15 	bitmap_to_arr32(mask, sparx5->vlan_mask[vid], SPX5_PORTS);
18 	spx5_wr(mask[0], sparx5, ANA_L3_VLAN_MASK_CFG(vid));
19 	if (is_sparx5(sparx5)) {
20 		spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid));
21 		spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid));
27 void sparx5_vlan_init(struct sparx5 *sparx5)
33 		 sparx5,
40 			 sparx5,
44 void sparx5_vlan_port_setup(struct sparx5 *sparx5, int portno)
46 	struct sparx5_port *port = sparx5->ports[portno];
53 		 sparx5,
60 	struct sparx5 *sparx5 = port->sparx5;
75 	set_bit(port->portno, sparx5->vlan_mask[vid]);
76 	ret = sparx5_vlant_set_mask(sparx5, vid);
84 	sparx5_vlan_port_apply(sparx5, port);
91 	struct sparx5 *sparx5 = port->sparx5;
102 	clear_bit(port->portno, sparx5->vlan_mask[vid]);
103 	ret = sparx5_vlant_set_mask(sparx5, vid);
115 	sparx5_vlan_port_apply(sparx5, port);
122 	struct sparx5 *sparx5 = port->sparx5;
129 		spx5_rmw(val, mask, sparx5, ANA_AC_PGID_CFG(pgid));
133 		spx5_rmw(val, mask, sparx5, ANA_AC_PGID_CFG1(pgid));
137 		spx5_rmw(val, mask, sparx5, ANA_AC_PGID_CFG2(pgid));
143 void sparx5_pgid_clear(struct sparx5 *spx5, int pgid)
152 void sparx5_pgid_read_mask(struct sparx5 *spx5, int pgid, u32 portmask[3])
161 void sparx5_update_fwd(struct sparx5 *sparx5)
168 	bitmap_to_arr32(mask, sparx5->bridge_fwd_mask, SPX5_PORTS);
171 	for (port = sparx5_get_pgid(sparx5, PGID_UC_FLOOD);
172 	     port <= sparx5_get_pgid(sparx5, PGID_BCAST); port++) {
173 		spx5_wr(mask[0], sparx5, ANA_AC_PGID_CFG(port));
174 		if (is_sparx5(sparx5)) {
175 			spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port));
176 			spx5_wr(mask[2], sparx5, ANA_AC_PGID_CFG2(port));
181 	for (port = 0; port < sparx5->data->consts->n_ports; port++) {
182 		if (test_bit(port, sparx5->bridge_fwd_mask)) {
184 			bitmap_copy(workmask, sparx5->bridge_fwd_mask, SPX5_PORTS);
187 			spx5_wr(mask[0], sparx5, ANA_AC_SRC_CFG(port));
188 			if (is_sparx5(sparx5)) {
189 				spx5_wr(mask[1], sparx5, ANA_AC_SRC_CFG1(port));
190 				spx5_wr(mask[2], sparx5, ANA_AC_SRC_CFG2(port));
193 			spx5_wr(0, sparx5, ANA_AC_SRC_CFG(port));
194 			if (is_sparx5(sparx5)) {
195 				spx5_wr(0, sparx5, ANA_AC_SRC_CFG1(port));
196 				spx5_wr(0, sparx5, ANA_AC_SRC_CFG2(port));
202 	bitmap_and(workmask, sparx5->bridge_fwd_mask,
203 		   sparx5->bridge_lrn_mask, SPX5_PORTS);
207 	spx5_wr(mask[0], sparx5, ANA_L2_AUTO_LRN_CFG);
208 	if (is_sparx5(sparx5)) {
209 		spx5_wr(mask[1], sparx5, ANA_L2_AUTO_LRN_CFG1);
210 		spx5_wr(mask[2], sparx5, ANA_L2_AUTO_LRN_CFG2);
214 void sparx5_vlan_port_apply(struct sparx5 *sparx5,
224 	spx5_wr(val, sparx5, ANA_CL_VLAN_CTRL(port->portno));
234 	spx5_wr(val, sparx5,
246 	spx5_wr(val, sparx5, REW_TAG_CTRL(port->portno));
251 		 sparx5,