microchip/sparx5/sparx5_vcap_impl.c

152 static void sparx5_vcap_type_err(struct sparx5 *sparx5,
161 static void sparx5_vcap_wait_super_update(struct sparx5 *sparx5)
167 			  false, sparx5, VCAP_SUPER_CTRL);
171 static void sparx5_vcap_wait_es0_update(struct sparx5 *sparx5)
177 			  false, sparx5, VCAP_ES0_CTRL);
181 static void sparx5_vcap_wait_es2_update(struct sparx5 *sparx5)
187 			  false, sparx5, VCAP_ES2_CTRL);
191 static void _sparx5_vcap_range_init(struct sparx5 *sparx5,
202 			sparx5, VCAP_SUPER_CFG);
210 			sparx5, VCAP_SUPER_CTRL);
211 		sparx5_vcap_wait_super_update(sparx5);
216 			sparx5, VCAP_ES0_CFG);
224 			sparx5, VCAP_ES0_CTRL);
225 		sparx5_vcap_wait_es0_update(sparx5);
230 			sparx5, VCAP_ES2_CFG);
238 			sparx5, VCAP_ES2_CTRL);
239 		sparx5_vcap_wait_es2_update(sparx5);
242 		sparx5_vcap_type_err(sparx5, admin, __func__);
248 static void sparx5_vcap_block_init(struct sparx5 *sparx5,
251 	_sparx5_vcap_range_init(sparx5, admin, admin->first_valid_addr,
256 /* Get the keyset name from the sparx5 VCAP model */
262 	return vcap_keyset_name(port->sparx5->vcap_ctrl, keyset);
411 	struct sparx5 *sparx5 = port->sparx5;
415 	value = spx5_rd(sparx5, ANA_CL_ADV_CL_CFG(portno, lookup));
465 	struct sparx5 *sparx5 = port->sparx5;
469 	value = spx5_rd(sparx5, ANA_ACL_VCAP_S2_KEY_SEL(portno, lookup));
594 	struct sparx5 *sparx5 = port->sparx5;
598 	value = spx5_rd(sparx5, REW_RTAG_ETAG_CTRL(portno));
619 	struct sparx5 *sparx5 = port->sparx5;
623 	value = spx5_rd(sparx5, EACL_VCAP_ES2_KEY_SEL(portno, lookup));
706 		sparx5_vcap_type_err(port->sparx5, admin, __func__);
783 		sparx5_vcap_type_err(port->sparx5, admin, __func__);
888 		sparx5_vcap_type_err(port->sparx5, admin, __func__);
902 static void sparx5_vcap_is0_cache_write(struct sparx5 *sparx5,
919 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,
921 			spx5_wr(~mskstr[idx], sparx5,
927 			spx5_wr(actstr[idx], sparx5,
939 		spx5_wr(admin->cache.counter, sparx5,
943 static void sparx5_vcap_is2_cache_write(struct sparx5 *sparx5,
960 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,
962 			spx5_wr(~mskstr[idx], sparx5,
968 			spx5_wr(actstr[idx], sparx5,
981 			spx5_wr(admin->cache.counter, sparx5,
984 			spx5_wr(admin->cache.counter, sparx5,
986 		spx5_wr(admin->cache.sticky, sparx5,
992 static void sparx5_es0_write_esdx_counter(struct sparx5 *sparx5,
995 	mutex_lock(&sparx5->queue_stats_lock);
996 	spx5_wr(XQS_STAT_CFG_STAT_VIEW_SET(id), sparx5, XQS_STAT_CFG);
997 	spx5_wr(admin->cache.counter, sparx5,
999 	spx5_wr(0, sparx5, XQS_CNT(SPARX5_STAT_ESDX_YEL_PKTS));
1000 	mutex_unlock(&sparx5->queue_stats_lock);
1003 static void sparx5_vcap_es0_cache_write(struct sparx5 *sparx5,
1020 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,
1022 			spx5_wr(~mskstr[idx], sparx5,
1028 			spx5_wr(actstr[idx], sparx5,
1039 		spx5_wr(admin->cache.counter, sparx5, VCAP_ES0_VCAP_CNT_DAT(0));
1040 		sparx5_es0_write_esdx_counter(sparx5, admin, start);
1044 static void sparx5_vcap_es2_cache_write(struct sparx5 *sparx5,
1061 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,
1063 			spx5_wr(~mskstr[idx], sparx5,
1069 			spx5_wr(actstr[idx], sparx5,
1081 		spx5_wr(admin->cache.counter, sparx5, EACL_ES2_CNT(start));
1082 		spx5_wr(admin->cache.sticky, sparx5, VCAP_ES2_VCAP_CNT_DAT(0));
1094 	struct sparx5 *sparx5 = port->sparx5;
1098 		sparx5_vcap_is0_cache_write(sparx5, admin, sel, start, count);
1101 		sparx5_vcap_is2_cache_write(sparx5, admin, sel, start, count);
1104 		sparx5_vcap_es0_cache_write(sparx5, admin, sel, start, count);
1107 		sparx5_vcap_es2_cache_write(sparx5, admin, sel, start, count);
1110 		sparx5_vcap_type_err(sparx5, admin, __func__);
1115 static void sparx5_vcap_is0_cache_read(struct sparx5 *sparx5,
1130 			keystr[idx] = spx5_rd(sparx5,
1132 			mskstr[idx] = ~spx5_rd(sparx5,
1139 			actstr[idx] = spx5_rd(sparx5,
1144 			spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));
1146 			spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));
1150 static void sparx5_vcap_is2_cache_read(struct sparx5 *sparx5,
1165 			keystr[idx] = spx5_rd(sparx5,
1167 			mskstr[idx] = ~spx5_rd(sparx5,
1174 			actstr[idx] = spx5_rd(sparx5,
1181 				spx5_rd(sparx5, ANA_ACL_CNT_A(start));
1184 				spx5_rd(sparx5, ANA_ACL_CNT_B(start));
1186 			spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));
1191 static void sparx5_es0_read_esdx_counter(struct sparx5 *sparx5,
1196 	mutex_lock(&sparx5->queue_stats_lock);
1197 	spx5_wr(XQS_STAT_CFG_STAT_VIEW_SET(id), sparx5, XQS_STAT_CFG);
1198 	counter = spx5_rd(sparx5, XQS_CNT(SPARX5_STAT_ESDX_GRN_PKTS)) +
1199 		spx5_rd(sparx5, XQS_CNT(SPARX5_STAT_ESDX_YEL_PKTS));
1200 	mutex_unlock(&sparx5->queue_stats_lock);
1205 static void sparx5_vcap_es0_cache_read(struct sparx5 *sparx5,
1221 				spx5_rd(sparx5, VCAP_ES0_VCAP_ENTRY_DAT(idx));
1223 				~spx5_rd(sparx5, VCAP_ES0_VCAP_MASK_DAT(idx));
1230 				spx5_rd(sparx5, VCAP_ES0_VCAP_ACTION_DAT(idx));
1234 			spx5_rd(sparx5, VCAP_ES0_VCAP_CNT_DAT(0));
1236 		sparx5_es0_read_esdx_counter(sparx5, admin, start);
1240 static void sparx5_vcap_es2_cache_read(struct sparx5 *sparx5,
1256 				spx5_rd(sparx5, VCAP_ES2_VCAP_ENTRY_DAT(idx));
1258 				~spx5_rd(sparx5, VCAP_ES2_VCAP_MASK_DAT(idx));
1265 				spx5_rd(sparx5, VCAP_ES2_VCAP_ACTION_DAT(idx));
1270 			spx5_rd(sparx5, EACL_ES2_CNT(start));
1272 			spx5_rd(sparx5, VCAP_ES2_VCAP_CNT_DAT(0));
1284 	struct sparx5 *sparx5 = port->sparx5;
1288 		sparx5_vcap_is0_cache_read(sparx5, admin, sel, start, count);
1291 		sparx5_vcap_is2_cache_read(sparx5, admin, sel, start, count);
1294 		sparx5_vcap_es0_cache_read(sparx5, admin, sel, start, count);
1297 		sparx5_vcap_es2_cache_read(sparx5, admin, sel, start, count);
1300 		sparx5_vcap_type_err(sparx5, admin, __func__);
1311 	struct sparx5 *sparx5 = port->sparx5;
1313 	_sparx5_vcap_range_init(sparx5, admin, addr, count);
1316 static void sparx5_vcap_super_update(struct sparx5 *sparx5,
1323 		VCAP_SUPER_CFG_MV_SIZE_SET(0), sparx5, VCAP_SUPER_CFG);
1331 		sparx5, VCAP_SUPER_CTRL);
1332 	sparx5_vcap_wait_super_update(sparx5);
1335 static void sparx5_vcap_es0_update(struct sparx5 *sparx5,
1342 		VCAP_ES0_CFG_MV_SIZE_SET(0), sparx5, VCAP_ES0_CFG);
1350 		sparx5, VCAP_ES0_CTRL);
1351 	sparx5_vcap_wait_es0_update(sparx5);
1354 static void sparx5_vcap_es2_update(struct sparx5 *sparx5,
1361 		VCAP_ES2_CFG_MV_SIZE_SET(0), sparx5, VCAP_ES2_CFG);
1369 		sparx5, VCAP_ES2_CTRL);
1370 	sparx5_vcap_wait_es2_update(sparx5);
1379 	struct sparx5 *sparx5 = port->sparx5;
1384 		sparx5_vcap_super_update(sparx5, cmd, sel, addr);
1387 		sparx5_vcap_es0_update(sparx5, cmd, sel, addr);
1390 		sparx5_vcap_es2_update(sparx5, cmd, sel, addr);
1393 		sparx5_vcap_type_err(sparx5, admin, __func__);
1398 static void sparx5_vcap_super_move(struct sparx5 *sparx5,
1406 		sparx5, VCAP_SUPER_CFG);
1414 		sparx5, VCAP_SUPER_CTRL);
1415 	sparx5_vcap_wait_super_update(sparx5);
1418 static void sparx5_vcap_es0_move(struct sparx5 *sparx5,
1426 		sparx5, VCAP_ES0_CFG);
1434 		sparx5, VCAP_ES0_CTRL);
1435 	sparx5_vcap_wait_es0_update(sparx5);
1438 static void sparx5_vcap_es2_move(struct sparx5 *sparx5,
1446 		sparx5, VCAP_ES2_CFG);
1454 		sparx5, VCAP_ES2_CTRL);
1455 	sparx5_vcap_wait_es2_update(sparx5);
1463 	struct sparx5 *sparx5 = port->sparx5;
1480 		sparx5_vcap_super_move(sparx5, addr, cmd, mv_num_pos, mv_size);
1483 		sparx5_vcap_es0_move(sparx5, addr, cmd, mv_num_pos, mv_size);
1486 		sparx5_vcap_es2_move(sparx5, addr, cmd, mv_num_pos, mv_size);
1489 		sparx5_vcap_type_err(sparx5, admin, __func__);
1523 	struct sparx5 *sparx5 = port->sparx5;
1532 			 sparx5,
1539 			 sparx5,
1546 			 sparx5,
1612 	struct sparx5 *sparx5 = port->sparx5;
1621 			 sparx5,
1628 			 sparx5,
1632 			 sparx5,
1639 			 sparx5,
1644 			 sparx5,
1651 			 sparx5,
1705 	struct sparx5 *sparx5 = port->sparx5;
1714 			 sparx5,
1721 			 sparx5,
1728 			 sparx5,
1771 		sparx5_vcap_type_err(port->sparx5, admin, __func__);
1777 static void sparx5_vcap_is0_port_key_selection(struct sparx5 *sparx5,
1780 	const struct sparx5_consts *consts = sparx5->data->consts;
1793 			spx5_wr(keysel, sparx5,
1797 				 sparx5,
1804 static void sparx5_vcap_is2_port_key_selection(struct sparx5 *sparx5,
1807 	const struct sparx5_consts *consts = sparx5->data->consts;
1819 			spx5_wr(keysel, sparx5,
1827 			 sparx5,
1832 static void sparx5_vcap_es0_port_key_selection(struct sparx5 *sparx5,
1835 	const struct sparx5_consts *consts = sparx5->data->consts;
1842 			 sparx5, REW_RTAG_ETAG_CTRL(portno));
1845 		 sparx5, REW_ES0_CTRL);
1849 static void sparx5_vcap_es2_port_key_selection(struct sparx5 *sparx5,
1852 	const struct sparx5_consts *consts = sparx5->data->consts;
1861 			spx5_wr(keysel, sparx5,
1866 static void sparx5_vcap_port_key_selection(struct sparx5 *sparx5,
1871 		sparx5_vcap_is0_port_key_selection(sparx5, admin);
1874 		sparx5_vcap_is2_port_key_selection(sparx5, admin);
1877 		sparx5_vcap_es0_port_key_selection(sparx5, admin);
1880 		sparx5_vcap_es2_port_key_selection(sparx5, admin);
1883 		sparx5_vcap_type_err(sparx5, admin, __func__);
1889 static void sparx5_vcap_port_key_deselection(struct sparx5 *sparx5,
1892 	const struct sparx5_consts *consts = sparx5->data->consts;
1901 					 sparx5,
1908 				 sparx5,
1913 			 REW_ES0_CTRL_ES0_LU_ENA, sparx5, REW_ES0_CTRL);
1920 					 sparx5,
1924 		sparx5_vcap_type_err(sparx5, admin, __func__);
1942 sparx5_vcap_admin_alloc(struct sparx5 *sparx5, struct vcap_control *ctrl,
1976 static void sparx5_vcap_block_alloc(struct sparx5 *sparx5,
1991 			spx5_wr(VCAP_SUPER_IDX_CORE_IDX_SET(idx), sparx5,
1994 				sparx5, VCAP_SUPER_MAP);
2005 		cores = spx5_rd(sparx5, VCAP_ES0_CORE_CNT);
2007 			spx5_wr(VCAP_ES0_IDX_CORE_IDX_SET(idx), sparx5,
2009 			spx5_wr(VCAP_ES0_MAP_CORE_MAP_SET(1), sparx5,
2017 		cores = spx5_rd(sparx5, VCAP_ES2_CORE_CNT);
2019 			spx5_wr(VCAP_ES2_IDX_CORE_IDX_SET(idx), sparx5,
2021 			spx5_wr(VCAP_ES2_MAP_CORE_MAP_SET(1), sparx5,
2026 		sparx5_vcap_type_err(sparx5, admin, __func__);
2032 int sparx5_vcap_init(struct sparx5 *sparx5)
2034 	const struct sparx5_consts *consts = sparx5->data->consts;
2054 	sparx5->vcap_ctrl = ctrl;
2055 	/* select the sparx5 VCAP model */
2064 		admin = sparx5_vcap_admin_alloc(sparx5, ctrl, cfg);
2071 		sparx5_vcap_block_alloc(sparx5, admin, cfg);
2072 		sparx5_vcap_block_init(sparx5, admin);
2074 			sparx5_vcap_port_key_selection(sparx5, admin);
2077 	dir = vcap_debugfs(sparx5->dev, sparx5->debugfs_root, ctrl);
2079 		if (sparx5->ports[idx])
2080 			vcap_port_debugfs(sparx5->dev, dir, ctrl,
2081 					  sparx5->ports[idx]->ndev);
2086 void sparx5_vcap_destroy(struct sparx5 *sparx5)
2088 	struct vcap_control *ctrl = sparx5->vcap_ctrl;
2095 		sparx5_vcap_port_key_deselection(sparx5, admin);