microchip/sparx5/sparx5_psfp.c

23 static int sparx5_psfp_sf_get(struct sparx5 *sparx5, u32 *id)
26 			       sparx5->data->consts->n_filters, id);
29 static int sparx5_psfp_sf_put(struct sparx5 *sparx5, u32 id)
32 			       sparx5->data->consts->n_filters, id);
35 static int sparx5_psfp_sg_get(struct sparx5 *sparx5, u32 idx, u32 *id)
38 					sparx5->data->consts->n_gates, idx, id);
41 static int sparx5_psfp_sg_put(struct sparx5 *sparx5, u32 id)
44 			       sparx5->data->consts->n_gates, id);
47 static int sparx5_psfp_fm_get(struct sparx5 *sparx5, u32 idx, u32 *id)
50 					sparx5->data->consts->n_sdlbs, idx, id);
53 static int sparx5_psfp_fm_put(struct sparx5 *sparx5, u32 id)
56 			       sparx5->data->consts->n_sdlbs, id);
59 u32 sparx5_psfp_isdx_get_sf(struct sparx5 *sparx5, u32 isdx)
61 	return ANA_L2_TSN_CFG_TSN_SFID_GET(spx5_rd(sparx5,
65 u32 sparx5_psfp_isdx_get_fm(struct sparx5 *sparx5, u32 isdx)
67 	return ANA_L2_DLB_CFG_DLB_IDX_GET(spx5_rd(sparx5,
71 u32 sparx5_psfp_sf_get_sg(struct sparx5 *sparx5, u32 sfid)
73 	return ANA_AC_TSN_SF_CFG_TSN_SGID_GET(spx5_rd(sparx5,
77 void sparx5_isdx_conf_set(struct sparx5 *sparx5, u32 isdx, u32 sfid, u32 fmid)
80 		 sparx5, ANA_L2_TSN_CFG(isdx));
83 		 sparx5, ANA_L2_DLB_CFG(isdx));
92 static int sparx5_psfp_sgid_get_status(struct sparx5 *sparx5)
94 	return spx5_rd(sparx5, ANA_AC_SG_ACCESS_CTRL);
97 static int sparx5_psfp_sgid_wait_for_completion(struct sparx5 *sparx5)
101 	return readx_poll_timeout(sparx5_psfp_sgid_get_status, sparx5, val,
107 static void sparx5_psfp_sg_config_change(struct sparx5 *sparx5, u32 id)
109 	spx5_wr(ANA_AC_SG_ACCESS_CTRL_SGID_SET(id), sparx5,
114 		sparx5, ANA_AC_SG_ACCESS_CTRL);
116 	if (sparx5_psfp_sgid_wait_for_completion(sparx5) < 0)
121 static void sparx5_psfp_sf_set(struct sparx5 *sparx5, u32 id,
132 		sparx5, ANA_AC_TSN_SF_CFG(id));
135 static int sparx5_psfp_sg_set(struct sparx5 *sparx5, u32 id,
147 	spx5_wr(ANA_AC_SG_ACCESS_CTRL_SGID_SET(id), sparx5,
151 	spx5_wr(sg->basetime.tv_nsec, sparx5, ANA_AC_SG_CONFIG_REG_1);
152 	spx5_wr(base_lsb, sparx5, ANA_AC_SG_CONFIG_REG_2);
164 		sparx5, ANA_AC_SG_CONFIG_REG_3);
166 	spx5_wr(sg->cycletime, sparx5, ANA_AC_SG_CONFIG_REG_4);
167 	spx5_wr(sg->cycletimeext, sparx5, ANA_AC_SG_CONFIG_REG_5);
178 			sparx5, ANA_AC_SG_GCL_GS_CONFIG(i));
181 		spx5_wr(accum_time_interval, sparx5,
185 		spx5_wr(gce->maxoctets, sparx5, ANA_AC_SG_GCL_OCT_CONFIG(i));
191 static int sparx5_sdlb_conf_set(struct sparx5 *sparx5,
194 	int (*sparx5_sdlb_group_action)(struct sparx5 *sparx5, u32 group,
202 	sparx5_policer_conf_set(sparx5, &fm->pol);
204 	return sparx5_sdlb_group_action(sparx5, fm->pol.group, fm->pol.idx);
207 int sparx5_psfp_sf_add(struct sparx5 *sparx5, const struct sparx5_psfp_sf *sf,
212 	ret = sparx5_psfp_sf_get(sparx5, id);
216 	sparx5_psfp_sf_set(sparx5, *id, sf);
221 int sparx5_psfp_sf_del(struct sparx5 *sparx5, u32 id)
225 	sparx5_psfp_sf_set(sparx5, id, &sf);
227 	return sparx5_psfp_sf_put(sparx5, id);
230 int sparx5_psfp_sg_add(struct sparx5 *sparx5, u32 uidx,
236 	ret = sparx5_psfp_sg_get(sparx5, uidx, id);
244 	sparx5_new_base_time(sparx5, sg->cycletime, 0, &basetime);
247 	sparx5_psfp_sg_set(sparx5, *id, sg);
250 	sparx5_psfp_sg_config_change(sparx5, *id);
255 int sparx5_psfp_sg_del(struct sparx5 *sparx5, u32 id)
260 	ret = sparx5_psfp_sg_put(sparx5, id);
267 	return sparx5_psfp_sg_set(sparx5, id, &sg);
270 int sparx5_psfp_fm_add(struct sparx5 *sparx5, u32 uidx,
277 	ret = sparx5_psfp_fm_get(sparx5, uidx, &fm->pol.idx);
284 	ret = sparx5_sdlb_group_get_by_rate(sparx5, pol->rate, pol->burst);
290 	ret = sparx5_sdlb_conf_set(sparx5, fm);
299 int sparx5_psfp_fm_del(struct sparx5 *sparx5, u32 id)
306 	ret = sparx5_sdlb_group_get_by_index(sparx5, id, &fm.pol.group);
310 	ret = sparx5_psfp_fm_put(sparx5, id);
317 	return sparx5_sdlb_conf_set(sparx5, &fm);
320 void sparx5_psfp_init(struct sparx5 *sparx5)
322 	const struct sparx5_ops *ops = sparx5->data->ops;
326 	for (i = 0; i < sparx5->data->consts->n_lb_groups; i++) {
328 		sparx5_sdlb_group_init(sparx5, group->max_rate,
333 		sparx5, ANA_AC_SG_CYCLETIME_UPDATE_PERIOD);
336 		 ANA_L2_FWD_CFG_ISDX_LOOKUP_ENA, sparx5, ANA_L2_FWD_CFG);