Lines Matching refs:sparx5
44 static int sparx5_mact_get_status(struct sparx5 *sparx5)
46 return spx5_rd(sparx5, LRN_COMMON_ACCESS_CTRL);
49 static int sparx5_mact_wait_for_completion(struct sparx5 *sparx5)
54 sparx5, val,
59 static void sparx5_mact_select(struct sparx5 *sparx5,
76 spx5_wr(mach, sparx5, LRN_MAC_ACCESS_CFG_0);
77 spx5_wr(macl, sparx5, LRN_MAC_ACCESS_CFG_1);
80 int sparx5_mact_learn(struct sparx5 *sparx5, int pgid,
83 const struct sparx5_consts *consts = sparx5->data->consts;
95 mutex_lock(&sparx5->lock);
97 sparx5_mact_select(sparx5, mac, vid);
104 sparx5, LRN_MAC_ACCESS_CFG_2);
105 spx5_wr(0, sparx5, LRN_MAC_ACCESS_CFG_3);
110 sparx5, LRN_COMMON_ACCESS_CTRL);
112 ret = sparx5_mact_wait_for_completion(sparx5);
114 mutex_unlock(&sparx5->lock);
122 struct sparx5 *sparx5 = port->sparx5;
124 return sparx5_mact_forget(sparx5, addr, port->pvid);
130 struct sparx5 *sparx5 = port->sparx5;
132 return sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU),
136 static int sparx5_mact_get(struct sparx5 *sparx5,
143 cfg2 = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_2);
145 mach = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_0);
146 macl = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_1);
161 bool sparx5_mact_getnext(struct sparx5 *sparx5,
167 mutex_lock(&sparx5->lock);
169 sparx5_mact_select(sparx5, mac, *vid);
173 sparx5, LRN_SCAN_NEXT_CFG);
177 sparx5, LRN_COMMON_ACCESS_CTRL);
179 ret = sparx5_mact_wait_for_completion(sparx5);
181 ret = sparx5_mact_get(sparx5, mac, vid, &cfg2);
186 mutex_unlock(&sparx5->lock);
191 int sparx5_mact_find(struct sparx5 *sparx5,
197 mutex_lock(&sparx5->lock);
199 sparx5_mact_select(sparx5, mac, vid);
204 sparx5, LRN_COMMON_ACCESS_CTRL);
206 ret = sparx5_mact_wait_for_completion(sparx5);
208 cfg2 = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_2);
215 mutex_unlock(&sparx5->lock);
220 int sparx5_mact_forget(struct sparx5 *sparx5,
225 mutex_lock(&sparx5->lock);
227 sparx5_mact_select(sparx5, mac, vid);
232 sparx5, LRN_COMMON_ACCESS_CTRL);
234 ret = sparx5_mact_wait_for_completion(sparx5);
236 mutex_unlock(&sparx5->lock);
241 static struct sparx5_mact_entry *alloc_mact_entry(struct sparx5 *sparx5,
247 mact_entry = devm_kzalloc(sparx5->dev,
258 static struct sparx5_mact_entry *find_mact_entry(struct sparx5 *sparx5,
265 mutex_lock(&sparx5->mact_lock);
266 list_for_each_entry(mact_entry, &sparx5->mact_entries, list) {
274 mutex_unlock(&sparx5->mact_lock);
291 int sparx5_add_mact_entry(struct sparx5 *sparx5,
300 ret = sparx5_mact_find(sparx5, addr, vid, &cfg2);
310 mact_entry = find_mact_entry(sparx5, addr, vid, portno);
317 mact_entry = alloc_mact_entry(sparx5, addr, vid, portno);
321 mutex_lock(&sparx5->mact_lock);
322 list_add_tail(&mact_entry->list, &sparx5->mact_entries);
323 mutex_unlock(&sparx5->mact_lock);
326 ret = sparx5_mact_learn(sparx5, portno, addr, vid);
338 int sparx5_del_mact_entry(struct sparx5 *sparx5,
347 mutex_lock(&sparx5->mact_lock);
348 list_for_each_entry_safe(mact_entry, tmp, &sparx5->mact_entries,
352 sparx5_mact_forget(sparx5, addr, mact_entry->vid);
355 devm_kfree(sparx5->dev, mact_entry);
358 mutex_unlock(&sparx5->mact_lock);
363 static void sparx5_mact_handle_entry(struct sparx5 *sparx5,
376 if (port >= sparx5->data->consts->n_ports)
379 if (!test_bit(port, sparx5->bridge_mask))
382 mutex_lock(&sparx5->mact_lock);
383 list_for_each_entry(mact_entry, &sparx5->mact_entries, list) {
389 dev_warn(sparx5->dev, "Entry move: %d -> %d\n",
398 mutex_unlock(&sparx5->mact_lock);
406 mact_entry = alloc_mact_entry(sparx5, mac, vid, port);
411 mutex_lock(&sparx5->mact_lock);
412 list_add_tail(&mact_entry->list, &sparx5->mact_entries);
413 mutex_unlock(&sparx5->mact_lock);
418 mac, vid, sparx5->ports[port]->ndev,
425 struct sparx5 *sparx5 = container_of(del_work, struct sparx5,
434 mutex_lock(&sparx5->mact_lock);
435 list_for_each_entry(mact_entry, &sparx5->mact_entries, list)
437 mutex_unlock(&sparx5->mact_lock);
443 mutex_lock(&sparx5->lock);
444 sparx5_mact_select(sparx5, mac, vid);
446 sparx5, LRN_SCAN_NEXT_CFG);
450 sparx5, LRN_COMMON_ACCESS_CTRL);
451 ret = sparx5_mact_wait_for_completion(sparx5);
453 ret = sparx5_mact_get(sparx5, mac, &vid, &cfg2);
454 mutex_unlock(&sparx5->lock);
456 sparx5_mact_handle_entry(sparx5, mac, vid, cfg2);
459 mutex_lock(&sparx5->mact_lock);
460 list_for_each_entry_safe(mact_entry, tmp, &sparx5->mact_entries,
468 sparx5->ports[mact_entry->port]->ndev,
472 devm_kfree(sparx5->dev, mact_entry);
474 mutex_unlock(&sparx5->mact_lock);
476 queue_delayed_work(sparx5->mact_queue, &sparx5->mact_work,
480 void sparx5_set_ageing(struct sparx5 *sparx5, int msecs)
488 sparx5,
492 void sparx5_mact_init(struct sparx5 *sparx5)
494 mutex_init(&sparx5->lock);
499 sparx5, LRN_COMMON_ACCESS_CTRL);
501 if (sparx5_mact_wait_for_completion(sparx5) != 0)
502 dev_warn(sparx5->dev, "MAC flush error\n");
504 sparx5_set_ageing(sparx5, BR_DEFAULT_AGEING_TIME / HZ * 1000);