meta/fbnic/fbnic_fw.c

15 static void __fbnic_mbx_wr_desc(struct fbnic_dev *fbd, int mbx_idx,
24 	fw_wr32(fbd, desc_offset + 1, upper_32_bits(desc));
25 	fw_wrfl(fbd);
26 	fw_wr32(fbd, desc_offset, lower_32_bits(desc));
29 static void __fbnic_mbx_invalidate_desc(struct fbnic_dev *fbd, int mbx_idx,
38 	fw_wr32(fbd, desc_offset, desc);
39 	fw_wrfl(fbd);
40 	fw_wr32(fbd, desc_offset + 1, 0);
43 static u64 __fbnic_mbx_rd_desc(struct fbnic_dev *fbd, int mbx_idx, int desc_idx)
48 	desc = fw_rd32(fbd, desc_offset);
49 	desc |= (u64)fw_rd32(fbd, desc_offset + 1) << 32;
54 static void fbnic_mbx_reset_desc_ring(struct fbnic_dev *fbd, int mbx_idx)
63 		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AW_CFG,
67 		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AR_CFG,
72 	wrfl(fbd);
78 	__fbnic_mbx_invalidate_desc(fbd, mbx_idx, 0, 0);
86 		__fbnic_mbx_invalidate_desc(fbd, mbx_idx, desc_idx,
91 void fbnic_mbx_init(struct fbnic_dev *fbd)
96 	spin_lock_init(&fbd->fw_tx_lock);
99 	memset(&fbd->fw_cap, 0, sizeof(fbd->fw_cap));
103 		memset(&fbd->mbx[i], 0, sizeof(struct fbnic_fw_mbx));
106 	wr32(fbd, FBNIC_INTR_SW_AC_MODE(0), ~(1u << FBNIC_FW_MSIX_ENTRY));
109 	wr32(fbd, FBNIC_INTR_CLEAR(0), 1u << FBNIC_FW_MSIX_ENTRY);
112 		fbnic_mbx_reset_desc_ring(fbd, i);
115 static int fbnic_mbx_map_msg(struct fbnic_dev *fbd, int mbx_idx,
118 	struct fbnic_fw_mbx *mbx = &fbd->mbx[mbx_idx];
123 	if (!mbx->ready || !fbnic_fw_present(fbd))
132 	addr = dma_map_single(fbd->dev, msg, PAGE_SIZE, direction);
133 	if (dma_mapping_error(fbd->dev, addr))
141 	fw_wr32(fbd, FBNIC_IPC_MBX(mbx_idx, mbx->tail), 0);
143 	__fbnic_mbx_wr_desc(fbd, mbx_idx, tail,
152 static void fbnic_mbx_unmap_and_free_msg(struct fbnic_dev *fbd, int mbx_idx,
155 	struct fbnic_fw_mbx *mbx = &fbd->mbx[mbx_idx];
163 	dma_unmap_single(fbd->dev, mbx->buf_info[desc_idx].addr,
170 static void fbnic_mbx_clean_desc_ring(struct fbnic_dev *fbd, int mbx_idx)
174 	fbnic_mbx_reset_desc_ring(fbd, mbx_idx);
177 		fbnic_mbx_unmap_and_free_msg(fbd, mbx_idx, i);
180 void fbnic_mbx_clean(struct fbnic_dev *fbd)
185 		fbnic_mbx_clean_desc_ring(fbd, i);
191 static int fbnic_mbx_alloc_rx_msgs(struct fbnic_dev *fbd)
193 	struct fbnic_fw_mbx *rx_mbx = &fbd->mbx[FBNIC_IPC_MBX_RX_IDX];
215 		err = fbnic_mbx_map_msg(fbd, FBNIC_IPC_MBX_RX_IDX, msg,
224 static int fbnic_mbx_map_tlv_msg(struct fbnic_dev *fbd,
230 	spin_lock_irqsave(&fbd->fw_tx_lock, flags);
232 	err = fbnic_mbx_map_msg(fbd, FBNIC_IPC_MBX_TX_IDX, msg,
235 	spin_unlock_irqrestore(&fbd->fw_tx_lock, flags);
240 static int fbnic_mbx_set_cmpl_slot(struct fbnic_dev *fbd,
243 	struct fbnic_fw_mbx *tx_mbx = &fbd->mbx[FBNIC_IPC_MBX_TX_IDX];
251 		if (!fbd->cmpl_data[i])
253 		else if (fbd->cmpl_data[i]->msg_type == cmpl_data->msg_type)
260 	fbd->cmpl_data[free] = cmpl_data;
265 static void fbnic_mbx_clear_cmpl_slot(struct fbnic_dev *fbd,
271 		if (fbd->cmpl_data[i] == cmpl_data) {
272 			fbd->cmpl_data[i] = NULL;
278 static void fbnic_mbx_process_tx_msgs(struct fbnic_dev *fbd)
280 	struct fbnic_fw_mbx *tx_mbx = &fbd->mbx[FBNIC_IPC_MBX_TX_IDX];
285 		desc = __fbnic_mbx_rd_desc(fbd, FBNIC_IPC_MBX_TX_IDX, head);
289 		fbnic_mbx_unmap_and_free_msg(fbd, FBNIC_IPC_MBX_TX_IDX, head);
299 int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd,
305 	spin_lock_irqsave(&fbd->fw_tx_lock, flags);
306 	err = fbnic_mbx_set_cmpl_slot(fbd, cmpl_data);
307 	spin_unlock_irqrestore(&fbd->fw_tx_lock, flags);
312 static int fbnic_mbx_map_req_w_cmpl(struct fbnic_dev *fbd,
319 	spin_lock_irqsave(&fbd->fw_tx_lock, flags);
321 		err = fbnic_mbx_set_cmpl_slot(fbd, cmpl_data);
326 	err = fbnic_mbx_map_msg(fbd, FBNIC_IPC_MBX_TX_IDX, msg,
333 		fbnic_mbx_clear_cmpl_slot(fbd, cmpl_data);
336 	spin_unlock_irqrestore(&fbd->fw_tx_lock, flags);
341 void fbnic_mbx_clear_cmpl(struct fbnic_dev *fbd,
346 	spin_lock_irqsave(&fbd->fw_tx_lock, flags);
347 	fbnic_mbx_clear_cmpl_slot(fbd, fw_cmpl);
348 	spin_unlock_irqrestore(&fbd->fw_tx_lock, flags);
361 fbnic_fw_get_cmpl_by_type(struct fbnic_dev *fbd, u32 msg_type)
367 	spin_lock_irqsave(&fbd->fw_tx_lock, flags);
369 		if (fbd->cmpl_data[i] &&
370 		    fbd->cmpl_data[i]->msg_type == msg_type) {
371 			cmpl_data = fbd->cmpl_data[i];
377 	spin_unlock_irqrestore(&fbd->fw_tx_lock, flags);
384  * @fbd: FBNIC device structure
400 static int fbnic_fw_xmit_simple_msg(struct fbnic_dev *fbd, u32 msg_type)
405 	if (!fbnic_fw_present(fbd))
412 	err = fbnic_mbx_map_tlv_msg(fbd, msg);
419 static void fbnic_mbx_init_desc_ring(struct fbnic_dev *fbd, int mbx_idx)
421 	struct fbnic_fw_mbx *mbx = &fbd->mbx[mbx_idx];
428 		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AW_CFG,
432 		fbnic_mbx_alloc_rx_msgs(fbd);
436 		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AR_CFG,
442 static bool fbnic_mbx_event(struct fbnic_dev *fbd)
448 	if (!(rd32(fbd, FBNIC_INTR_STATUS(0)) & (1u << FBNIC_FW_MSIX_ENTRY)))
451 	wr32(fbd, FBNIC_INTR_CLEAR(0), 1u << FBNIC_FW_MSIX_ENTRY);
460  * @fbd: FBNIC device structure
468 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership)
474 	if (!fbnic_fw_present(fbd))
487 	err = fbnic_mbx_map_tlv_msg(fbd, msg);
494 	fbd->last_heartbeat_response = req_time - HZ;
496 	fbd->last_heartbeat_request = req_time;
499 	fbd->fw_heartbeat_enabled = take_ownership;
567 	struct fbnic_dev *fbd = opaque;
572 	fbd->fw_cap.running.mgmt.version = version;
573 	if (!fbd->fw_cap.running.mgmt.version)
576 	if (fbd->fw_cap.running.mgmt.version < MIN_FW_VER_CODE) {
580 		fbnic_mk_fw_ver_str(fbd->fw_cap.running.mgmt.version,
583 		dev_err(fbd->dev, "Device firmware version(%s) is older than minimum required version(%s)\n",
588 		fbd->mbx[FBNIC_IPC_MBX_TX_IDX].ready = false;
593 			fbd->fw_cap.running.mgmt.commit,
595 		dev_warn(fbd->dev, "Firmware did not send mgmt commit!\n");
598 	fbd->fw_cap.stored.mgmt.version = version;
600 		    fbd->fw_cap.stored.mgmt.commit,
604 	fbd->fw_cap.running.bootloader.version = version;
606 		    fbd->fw_cap.running.bootloader.commit,
610 	fbd->fw_cap.stored.bootloader.version = version;
612 		    fbd->fw_cap.stored.bootloader.commit,
616 	fbd->fw_cap.stored.undi.version = version;
618 		    fbd->fw_cap.stored.undi.commit,
621 	fbd->fw_cap.active_slot =
623 	fbd->fw_cap.link_speed =
625 	fbd->fw_cap.link_fec =
636 		err = fbnic_fw_parse_bmc_addrs(fbd->fw_cap.bmc_mac_addr,
644 		memset(fbd->fw_cap.bmc_mac_addr, 0,
645 		       sizeof(fbd->fw_cap.bmc_mac_addr));
648 	fbd->fw_cap.bmc_present = bmc_present;
651 		fbd->fw_cap.all_multi = all_multi;
653 	fbd->fw_cap.anti_rollback_version =
666 	struct fbnic_dev *fbd = (struct fbnic_dev *)opaque;
669 	fbd->last_heartbeat_response = jiffies;
681 	struct fbnic_dev *fbd = (struct fbnic_dev *)opaque;
683 	fbd->last_heartbeat_response = jiffies;
688 static int fbnic_fw_xmit_heartbeat_message(struct fbnic_dev *fbd)
694 	if (!fbnic_fw_present(fbd))
701 	err = fbnic_mbx_map_tlv_msg(fbd, msg);
705 	fbd->last_heartbeat_request = req_time;
714 static bool fbnic_fw_heartbeat_current(struct fbnic_dev *fbd)
716 	unsigned long last_response = fbd->last_heartbeat_response;
717 	unsigned long last_request = fbd->last_heartbeat_request;
722 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll)
727 	if (!fbnic_fw_present(fbd))
733 			fbnic_mbx_poll(fbd);
735 		if (!fbnic_fw_heartbeat_current(fbd))
739 		err = fbnic_fw_xmit_heartbeat_message(fbd);
741 			dev_warn(fbd->dev,
750 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd)
752 	unsigned long last_request = fbd->last_heartbeat_request;
762 	if (!fbd->fw_heartbeat_enabled)
766 	if (!fbnic_fw_heartbeat_current(fbd)) {
767 		dev_warn(fbd->dev,
769 		fbd->fw_heartbeat_enabled = false;
773 	err = fbnic_fw_xmit_heartbeat_message(fbd);
775 		dev_warn(fbd->dev, "Failed to send heartbeat message\n");
778 int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd,
785 	if (!fbnic_fw_present(fbd))
804 	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);
824 	struct fbnic_dev *fbd = opaque;
830 	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);
844 int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd,
880 	err = fbnic_mbx_map_tlv_msg(fbd, msg);
901 	struct fbnic_dev *fbd = opaque;
908 	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);
933 	struct fbnic_dev *fbd = opaque;
939 	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);
962  * @fbd: FBNIC device structure
970 int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,
976 	if (!fbnic_fw_present(fbd))
983 	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);
1005 	struct fbnic_dev *fbd = opaque;
1010 	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd,
1080 static int fbnic_fw_parse_logs(struct fbnic_dev *fbd,
1096 			dev_warn(fbd->dev, "Received log message with missing attributes!\n");
1107 		err = fbnic_fw_log_write(fbd, index, msec, log);
1121 	struct fbnic_dev *fbd = opaque;
1147 	err = fbnic_fw_parse_logs(fbd, msec_tlv, index_tlv, log_tlv,
1155 int fbnic_fw_xmit_send_logs(struct fbnic_dev *fbd, bool enable,
1161 	if (fbd->fw_cap.running.mgmt.version < MIN_FW_VER_CODE_LOG) {
1162 		dev_warn(fbd->dev, "Firmware version is too old to support firmware logs!\n");
1189 	err = fbnic_mbx_map_tlv_msg(fbd, msg);
1225 static void fbnic_mbx_process_rx_msgs(struct fbnic_dev *fbd)
1227 	struct fbnic_fw_mbx *rx_mbx = &fbd->mbx[FBNIC_IPC_MBX_RX_IDX];
1235 		desc = __fbnic_mbx_rd_desc(fbd, FBNIC_IPC_MBX_RX_IDX, head);
1239 		dma_unmap_single(fbd->dev, rx_mbx->buf_info[head].addr,
1252 			dev_warn(fbd->dev,
1259 			dev_warn(fbd->dev, "Mailbox message length mismatch\n");
1262 		err = fbnic_tlv_msg_parse(fbd, msg, fbnic_fw_tlv_parser);
1264 			dev_warn(fbd->dev, "Unable to process message: %d\n",
1271 		dev_dbg(fbd->dev, "Parsed msg type %d\n", msg->hdr.type);
1285 	fbnic_mbx_alloc_rx_msgs(fbd);
1288 void fbnic_mbx_poll(struct fbnic_dev *fbd)
1290 	fbnic_mbx_event(fbd);
1292 	fbnic_mbx_process_tx_msgs(fbd);
1293 	fbnic_mbx_process_rx_msgs(fbd);
1296 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd)
1298 	struct fbnic_fw_mbx *tx_mbx = &fbd->mbx[FBNIC_IPC_MBX_TX_IDX];
1310 		fbnic_mbx_reset_desc_ring(fbd, FBNIC_IPC_MBX_TX_IDX);
1313 		if (!fbnic_fw_present(fbd))
1317 	} while (!fbnic_mbx_event(fbd));
1321 		fbnic_mbx_init_desc_ring(fbd, i);
1327 	err = fbnic_fw_xmit_simple_msg(fbd, FBNIC_TLV_MSG_ID_HOST_CAP_REQ);
1334 	for (fbd->fw_cap.running.mgmt.version = 1;
1335 	     fbd->fw_cap.running.mgmt.version < MIN_FW_VER_CODE;) {
1342 		fbnic_mbx_poll(fbd);
1352 	fbnic_mbx_clean(fbd);
1362 static void fbnic_mbx_evict_all_cmpl(struct fbnic_dev *fbd)
1367 		struct fbnic_fw_completion *cmpl_data = fbd->cmpl_data[i];
1373 	memset(fbd->cmpl_data, 0, sizeof(fbd->cmpl_data));
1376 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd)
1383 	tx_mbx = &fbd->mbx[FBNIC_IPC_MBX_TX_IDX];
1385 	spin_lock_irq(&fbd->fw_tx_lock);
1394 	fbnic_mbx_evict_all_cmpl(fbd);
1396 	spin_unlock_irq(&fbd->fw_tx_lock);
1409 		fbnic_mbx_process_tx_msgs(fbd);
1413 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,
1416 	struct fbnic_fw_ver *mgmt = &fbd->fw_cap.running.mgmt;