Lines Matching refs:pri_path

715 		port = (qp_ctx->pri_path.sched_queue >> 6 & 1) + 1;
717 			qp_ctx->pri_path.mgid_index =
720 			qp_ctx->pri_path.mgid_index = slave | 0x80;
724 			port = (qp_ctx->pri_path.sched_queue >> 6 & 1) + 1;
726 				qp_ctx->pri_path.mgid_index +=
728 				qp_ctx->pri_path.mgid_index &= 0x7f;
730 				qp_ctx->pri_path.mgid_index = slave & 0x7F;
759 	port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1;
793 		qpc->pri_path.vlan_control &=
797 			qpc->pri_path.vlan_control |=
810 				qpc->pri_path.vlan_control |=
816 				qpc->pri_path.vlan_control |=
822 			qpc->pri_path.vlan_control |=
827 		qpc->pri_path.fvl_rx |= MLX4_FVL_RX_FORCE_ETH_VLAN;
828 		qpc->pri_path.vlan_index = vp_oper->vlan_idx;
829 		qpc->pri_path.fl |= MLX4_FL_ETH_HIDE_CQE_VLAN;
831 			qpc->pri_path.fl |= MLX4_FL_SV;
833 			qpc->pri_path.fl |= MLX4_FL_CV;
834 		qpc->pri_path.feup |= MLX4_FEUP_FORCE_ETH_UP | MLX4_FVL_FORCE_ETH_VLAN;
835 		qpc->pri_path.sched_queue &= 0xC7;
836 		qpc->pri_path.sched_queue |= (vp_oper->state.default_qos) << 3;
840 		qpc->pri_path.feup |= MLX4_FSM_FORCE_ETH_SRC_MAC;
841 		qpc->pri_path.grh_mylmc = (0x80 & qpc->pri_path.grh_mylmc) + vp_oper->mac_idx;
1015 			qpc->pri_path.counter_index  = counter->com.res_id;
1031 		qpc->pri_path.counter_index = counter_idx;
1033 			 __func__, slave, qpc->pri_path.counter_index);
1043 	if (qpc->pri_path.counter_index != MLX4_SINK_COUNTER_INDEX(dev))
1045 					       qpc->pri_path.counter_index);
3218 					port = (qp_ctx->pri_path.sched_queue >> 6 & 1) + 1;
3223 					if (qp_ctx->pri_path.mgid_index >= num_gids)
3244 		port = (qp_ctx->pri_path.sched_queue >> 6 & 1) + 1;
3775 		   dev, slave, (qpc->pri_path.sched_queue >> 6 & 1) + 1) - 1;
3780 	pri_sched_queue = (qpc->pri_path.sched_queue & ~(1 << 6)) |
3784 	    qpc->pri_path.sched_queue || mlx4_is_eth(dev, port + 1)) {
3785 		qpc->pri_path.sched_queue = pri_sched_queue;
3813 		smac_ix = qpc->pri_path.grh_mylmc & 0x7f;
3831 	u8 orig_vlan_control = qpc->pri_path.vlan_control;
3832 	u8 orig_fvl_rx = qpc->pri_path.fvl_rx;
3833 	u8 orig_pri_path_fl = qpc->pri_path.fl;
3834 	u8 orig_vlan_index = qpc->pri_path.vlan_index;
3835 	u8 orig_feup = qpc->pri_path.feup;
3850 	orig_sched_queue = qpc->pri_path.sched_queue;
4325 		smac_index = cmd->qp_context.pri_path.grh_mylmc;
5363 				upd_context->qp_context.pri_path.vlan_control = qp->vlan_control;
5364 				upd_context->qp_context.pri_path.fvl_rx = qp->fvl_rx;
5365 				upd_context->qp_context.pri_path.vlan_index = qp->vlan_index;
5366 				upd_context->qp_context.pri_path.fl = qp->pri_path_fl;
5367 				upd_context->qp_context.pri_path.feup = qp->feup;
5368 				upd_context->qp_context.pri_path.sched_queue =
5372 				upd_context->qp_context.pri_path.vlan_control = vlan_control;
5373 				upd_context->qp_context.pri_path.vlan_index = work->vlan_ix;
5374 				upd_context->qp_context.pri_path.fvl_rx =
5376 				upd_context->qp_context.pri_path.fl =
5379 					upd_context->qp_context.pri_path.fl |= MLX4_FL_SV;
5381 					upd_context->qp_context.pri_path.fl |= MLX4_FL_CV;
5382 				upd_context->qp_context.pri_path.feup =
5384 				upd_context->qp_context.pri_path.sched_queue =
5386 				upd_context->qp_context.pri_path.sched_queue |=