intel/igb/e1000_mac.c

29 	s32 ret_val;
35 	ret_val = igb_read_pcie_cap_reg(hw,
38 	if (ret_val) {
290 	s32 ret_val = 0;
300 	ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
302 	if (ret_val) {
321 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
322 		if (ret_val) {
344 	return ret_val;
610 	s32 ret_val;
619 		ret_val = 0;
627 	ret_val = igb_phy_has_link(hw, 1, 0, &link);
628 	if (ret_val)
645 		ret_val = -E1000_ERR_CONFIG;
660 	ret_val = igb_config_fc_after_link_up(hw);
661 	if (ret_val)
665 	return ret_val;
680 	s32 ret_val = 0;
692 		ret_val = igb_set_default_fc(hw);
693 		if (ret_val)
706 	ret_val = hw->mac.ops.setup_physical_interface(hw);
707 	if (ret_val)
726 	return ret_val;
792 	s32 ret_val = 0;
809 	ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG + lan_offset,
811 	if (ret_val) {
824 	return ret_val;
840 	s32 ret_val = 0;
880 		ret_val = -E1000_ERR_CONFIG;
887 	return ret_val;
903 	s32 ret_val = 0;
914 			ret_val = igb_force_mac_fc(hw);
917 			ret_val = igb_force_mac_fc(hw);
920 	if (ret_val) {
935 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS,
937 		if (ret_val)
939 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS,
941 		if (ret_val)
955 		ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
957 		if (ret_val)
959 		ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
961 		if (ret_val)
1075 		ret_val = hw->mac.ops.get_speed_and_duplex(hw, &speed, &duplex);
1076 		if (ret_val) {
1087 		ret_val = igb_force_mac_fc(hw);
1088 		if (ret_val) {
1107 			return ret_val;
1210 		ret_val = igb_force_mac_fc(hw);
1211 		if (ret_val) {
1213 			return ret_val;
1218 	return ret_val;
1267 	s32 ret_val = 0;
1283 		ret_val = -E1000_ERR_NVM;
1303 		ret_val = -E1000_ERR_NVM;
1308 	return ret_val;
1337 	s32 ret_val = 0;
1349 		ret_val = -E1000_ERR_RESET;
1354 	return ret_val;
1367 	s32 ret_val;
1369 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
1370 	if (ret_val) {
1387 	return ret_val;
1398 	s32 ret_val;
1408 		ret_val = igb_valid_led_default_i210(hw, &data);
1410 		ret_val = igb_valid_led_default(hw, &data);
1412 	if (ret_val)
1458 	return ret_val;
1553 	s32 ret_val = 0;
1572 		ret_val = -E1000_ERR_MASTER_REQUESTS_PENDING;
1577 	return ret_val;
1589 	s32 ret_val = 0;
1598 		ret_val = -E1000_ERR_CONFIG;
1603 	return ret_val;
1621 	s32 ret_val = 0;
1636 		ret_val = -E1000_ERR_PHY;
1641 	return ret_val;
1655 	bool ret_val = false;
1672 			ret_val = true;
1678 			ret_val = true;
1684 	return ret_val;