Lines Matching refs:hw
11 * @hw: pointer to the HW structure
19 int i40e_init_nvm(struct i40e_hw *hw)
21 struct i40e_nvm_info *nvm = &hw->nvm;
29 gens = rd32(hw, I40E_GLNVM_GENS);
35 fla = rd32(hw, I40E_GLNVM_FLA);
43 i40e_debug(hw, I40E_DEBUG_NVM, "NVM init error: unsupported blank mode.\n");
51 * @hw: pointer to the HW structure
57 int i40e_acquire_nvm(struct i40e_hw *hw,
64 if (hw->nvm.blank_nvm_mode)
67 ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access,
70 gtime = rd32(hw, I40E_GLVFGEN_TIMER);
73 hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime;
76 i40e_debug(hw, I40E_DEBUG_NVM,
78 access, time_left, ret_code, hw->aq.asq_last_status);
85 gtime = rd32(hw, I40E_GLVFGEN_TIMER);
86 ret_code = i40e_aq_request_resource(hw,
91 hw->nvm.hw_semaphore_timeout =
97 hw->nvm.hw_semaphore_timeout = 0;
98 i40e_debug(hw, I40E_DEBUG_NVM,
100 time_left, ret_code, hw->aq.asq_last_status);
110 * @hw: pointer to the HW structure
114 void i40e_release_nvm(struct i40e_hw *hw)
119 if (hw->nvm.blank_nvm_mode)
122 ret_code = i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL);
128 (total_delay < hw->aq.asq_cmd_timeout)) {
130 ret_code = i40e_aq_release_resource(hw,
139 * @hw: pointer to the HW structure
143 static int i40e_poll_sr_srctl_done_bit(struct i40e_hw *hw)
150 srctl = rd32(hw, I40E_GLNVM_SRCTL);
158 i40e_debug(hw, I40E_DEBUG_NVM, "Done bit in GLNVM_SRCTL not set");
164 * @hw: pointer to the HW structure
170 static int i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset,
176 if (offset >= hw->nvm.sr_size) {
177 i40e_debug(hw, I40E_DEBUG_NVM,
179 offset, hw->nvm.sr_size);
185 ret_code = i40e_poll_sr_srctl_done_bit(hw);
190 wr32(hw, I40E_GLNVM_SRCTL, sr_reg);
193 ret_code = i40e_poll_sr_srctl_done_bit(hw);
195 sr_reg = rd32(hw, I40E_GLNVM_SRDATA);
201 i40e_debug(hw, I40E_DEBUG_NVM,
211 * @hw: pointer to the HW structure.
220 static int i40e_read_nvm_aq(struct i40e_hw *hw,
229 cmd_details.wb_desc = &hw->nvm_wb_desc;
236 if ((offset + words) > hw->nvm.sr_size)
237 i40e_debug(hw, I40E_DEBUG_NVM,
239 (offset + words), hw->nvm.sr_size);
242 i40e_debug(hw, I40E_DEBUG_NVM,
248 i40e_debug(hw, I40E_DEBUG_NVM,
252 ret_code = i40e_aq_read_nvm(hw, module_pointer,
262 * @hw: pointer to the HW structure
268 static int i40e_read_nvm_word_aq(struct i40e_hw *hw, u16 offset,
273 ret_code = i40e_read_nvm_aq(hw, 0x0, offset, 1, data, true);
281 * @hw: pointer to the HW structure
290 static int __i40e_read_nvm_word(struct i40e_hw *hw,
293 if (test_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps))
294 return i40e_read_nvm_word_aq(hw, offset, data);
296 return i40e_read_nvm_word_srctl(hw, offset, data);
301 * @hw: pointer to the HW structure
307 int i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,
312 if (test_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps))
313 ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
317 ret_code = __i40e_read_nvm_word(hw, offset, data);
319 if (test_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps))
320 i40e_release_nvm(hw);
327 * @hw: Pointer to the HW structure
334 int i40e_read_nvm_module_data(struct i40e_hw *hw,
347 status = i40e_read_nvm_word(hw, module_ptr, &ptr_value);
349 i40e_debug(hw, I40E_DEBUG_ALL,
361 i40e_debug(hw, I40E_DEBUG_ALL, "Pointer not initialized.\n");
368 i40e_debug(hw, I40E_DEBUG_ALL,
375 status = i40e_read_nvm_word(hw, ptr_value + module_offset,
378 i40e_debug(hw, I40E_DEBUG_ALL,
387 status = i40e_read_nvm_buffer(hw, offset, &words_data_size,
390 i40e_debug(hw, I40E_DEBUG_ALL,
401 * @hw: pointer to the HW structure
410 static int i40e_read_nvm_buffer_srctl(struct i40e_hw *hw, u16 offset,
419 ret_code = i40e_read_nvm_word_srctl(hw, index, &data[word]);
432 * @hw: pointer to the HW structure
441 static int i40e_read_nvm_buffer_aq(struct i40e_hw *hw, u16 offset,
467 ret_code = i40e_read_nvm_aq(hw, 0x0, offset, read_size,
489 * @hw: pointer to the HW structure
497 static int __i40e_read_nvm_buffer(struct i40e_hw *hw,
501 if (test_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps))
502 return i40e_read_nvm_buffer_aq(hw, offset, words, data);
504 return i40e_read_nvm_buffer_srctl(hw, offset, words, data);
509 * @hw: pointer to the HW structure
518 int i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,
523 if (test_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps)) {
524 ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
526 ret_code = i40e_read_nvm_buffer_aq(hw, offset, words,
528 i40e_release_nvm(hw);
531 ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data);
539 * @hw: pointer to the HW structure.
548 static int i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer,
556 cmd_details.wb_desc = &hw->nvm_wb_desc;
563 if ((offset + words) > hw->nvm.sr_size)
564 i40e_debug(hw, I40E_DEBUG_NVM,
566 (offset + words), hw->nvm.sr_size);
569 i40e_debug(hw, I40E_DEBUG_NVM,
575 i40e_debug(hw, I40E_DEBUG_NVM,
579 ret_code = i40e_aq_update_nvm(hw, module_pointer,
590 * @hw: pointer to hardware structure
598 static int i40e_calc_nvm_checksum(struct i40e_hw *hw,
609 ret_code = i40e_allocate_virt_mem(hw, &vmem,
616 ret_code = __i40e_read_nvm_word(hw, I40E_SR_VPD_PTR, &vpd_module);
623 ret_code = __i40e_read_nvm_word(hw, I40E_SR_PCIE_ALT_AUTO_LOAD_PTR,
633 for (i = 0; i < hw->nvm.sr_size; i++) {
638 ret_code = __i40e_read_nvm_buffer(hw, i, &words, data);
667 i40e_free_virt_mem(hw, &vmem);
673 * @hw: pointer to hardware structure
679 int i40e_update_nvm_checksum(struct i40e_hw *hw)
685 ret_code = i40e_calc_nvm_checksum(hw, &checksum);
688 ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD,
697 * @hw: pointer to hardware structure
703 int i40e_validate_nvm_checksum(struct i40e_hw *hw,
715 ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
718 ret_code = i40e_calc_nvm_checksum(hw, &checksum_local);
719 __i40e_read_nvm_word(hw, I40E_SR_SW_CHECKSUM_WORD, &checksum_sr);
720 i40e_release_nvm(hw);
773 * @hw: pointer to hardware structure
780 i40e_nvmupd_validate_command(struct i40e_hw *hw, struct i40e_nvm_access *cmd,
794 i40e_debug(hw, I40E_DEBUG_NVM,
866 * @hw: pointer to hardware structure
872 static int i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
886 cmd_details.wb_desc = &hw->nvm_wb_desc;
888 status = i40e_aq_erase_nvm(hw, module, cmd->offset, (u16)cmd->data_size,
891 i40e_debug(hw, I40E_DEBUG_NVM,
894 i40e_debug(hw, I40E_DEBUG_NVM,
896 __func__, status, hw->aq.asq_last_status);
897 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);
905 * @hw: pointer to hardware structure
912 static int i40e_nvmupd_nvm_write(struct i40e_hw *hw,
928 cmd_details.wb_desc = &hw->nvm_wb_desc;
930 status = i40e_aq_update_nvm(hw, module, cmd->offset,
934 i40e_debug(hw, I40E_DEBUG_NVM,
937 i40e_debug(hw, I40E_DEBUG_NVM,
939 __func__, status, hw->aq.asq_last_status);
940 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);
948 * @hw: pointer to hardware structure
955 static int i40e_nvmupd_nvm_read(struct i40e_hw *hw,
969 cmd_details.wb_desc = &hw->nvm_wb_desc;
971 status = i40e_aq_read_nvm(hw, module, cmd->offset, (u16)cmd->data_size,
974 i40e_debug(hw, I40E_DEBUG_NVM,
977 i40e_debug(hw, I40E_DEBUG_NVM,
979 __func__, status, hw->aq.asq_last_status);
980 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);
988 * @hw: pointer to hardware structure
995 static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,
1007 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
1012 cmd_details.wb_desc = &hw->nvm_wb_desc;
1015 memset(&hw->nvm_wb_desc, 0, aq_desc_len);
1019 i40e_debug(hw, I40E_DEBUG_NVM,
1031 if (!hw->nvm_buff.va) {
1032 status = i40e_allocate_virt_mem(hw, &hw->nvm_buff,
1033 hw->aq.asq_buf_size);
1035 i40e_debug(hw, I40E_DEBUG_NVM,
1040 if (hw->nvm_buff.va) {
1041 buff = hw->nvm_buff.va;
1047 memset(&hw->nvm_aq_event_desc, 0, aq_desc_len);
1050 status = i40e_asq_send_command(hw, aq_desc, buff,
1053 i40e_debug(hw, I40E_DEBUG_NVM,
1056 libie_aq_str(hw->aq.asq_last_status));
1057 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);
1063 hw->nvm_wait_opcode = cmd->offset;
1064 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
1072 * @hw: pointer to hardware structure
1079 static int i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
1088 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
1091 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_wb_desc.datalen);
1095 i40e_debug(hw, I40E_DEBUG_NVM, "%s: offset too big %d > %d\n",
1105 i40e_debug(hw, I40E_DEBUG_NVM, "%s: copy length %d too big, trimming to %d\n",
1115 i40e_debug(hw, I40E_DEBUG_NVM, "%s: aq_desc bytes %d to %d\n",
1118 buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset;
1123 buff = hw->nvm_buff.va;
1125 buff = hw->nvm_buff.va + (cmd->offset - aq_desc_len);
1129 int start_byte = buff - (u8 *)hw->nvm_buff.va;
1131 i40e_debug(hw, I40E_DEBUG_NVM, "%s: databuf bytes %d to %d\n",
1141 * @hw: pointer to hardware structure
1148 static int i40e_nvmupd_get_aq_event(struct i40e_hw *hw,
1155 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);
1158 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen);
1162 i40e_debug(hw, I40E_DEBUG_NVM,
1168 memcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size);
1175 * @hw: pointer to hardware structure
1183 static int i40e_nvmupd_state_init(struct i40e_hw *hw,
1190 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
1194 status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1197 hw->aq.asq_last_status);
1199 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
1200 i40e_release_nvm(hw);
1205 status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1208 hw->aq.asq_last_status);
1210 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
1212 i40e_release_nvm(hw);
1214 hw->nvmupd_state = I40E_NVMUPD_STATE_READING;
1219 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
1222 hw->aq.asq_last_status);
1224 status = i40e_nvmupd_nvm_erase(hw, cmd, perrno);
1226 i40e_release_nvm(hw);
1228 hw->nvm_release_on_done = true;
1229 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_erase;
1230 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
1236 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
1239 hw->aq.asq_last_status);
1241 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
1243 i40e_release_nvm(hw);
1245 hw->nvm_release_on_done = true;
1246 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1247 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
1253 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
1256 hw->aq.asq_last_status);
1258 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
1260 i40e_release_nvm(hw);
1262 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1263 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
1269 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
1272 hw->aq.asq_last_status);
1274 status = i40e_update_nvm_checksum(hw);
1276 *perrno = hw->aq.asq_last_status ?
1278 hw->aq.asq_last_status) :
1280 i40e_release_nvm(hw);
1282 hw->nvm_release_on_done = true;
1283 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1284 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
1290 status = i40e_nvmupd_exec_aq(hw, cmd, bytes, perrno);
1294 status = i40e_nvmupd_get_aq_result(hw, cmd, bytes, perrno);
1298 status = i40e_nvmupd_get_aq_event(hw, cmd, bytes, perrno);
1302 i40e_debug(hw, I40E_DEBUG_NVM,
1314 * @hw: pointer to hardware structure
1322 static int i40e_nvmupd_state_reading(struct i40e_hw *hw,
1329 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
1334 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
1338 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
1339 i40e_release_nvm(hw);
1340 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1344 i40e_debug(hw, I40E_DEBUG_NVM,
1356 * @hw: pointer to hardware structure
1364 static int i40e_nvmupd_state_writing(struct i40e_hw *hw,
1372 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
1377 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
1379 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1380 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
1385 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
1387 *perrno = hw->aq.asq_last_status ?
1389 hw->aq.asq_last_status) :
1391 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1393 hw->nvm_release_on_done = true;
1394 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1395 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
1401 status = i40e_update_nvm_checksum(hw);
1403 *perrno = hw->aq.asq_last_status ?
1405 hw->aq.asq_last_status) :
1407 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1409 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1410 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
1416 status = i40e_update_nvm_checksum(hw);
1418 *perrno = hw->aq.asq_last_status ?
1420 hw->aq.asq_last_status) :
1422 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1424 hw->nvm_release_on_done = true;
1425 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
1426 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
1431 i40e_debug(hw, I40E_DEBUG_NVM,
1445 if (status && hw->aq.asq_last_status == LIBIE_AQ_RC_EBUSY &&
1447 u32 old_asq_status = hw->aq.asq_last_status;
1451 gtime = rd32(hw, I40E_GLVFGEN_TIMER);
1452 if (gtime >= hw->nvm.hw_semaphore_timeout) {
1453 i40e_debug(hw, I40E_DEBUG_ALL,
1455 gtime, hw->nvm.hw_semaphore_timeout);
1456 i40e_release_nvm(hw);
1457 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
1459 i40e_debug(hw, I40E_DEBUG_ALL,
1461 hw->aq.asq_last_status);
1463 hw->aq.asq_last_status = old_asq_status;
1476 * @hw: pointer to hardware structure
1483 int i40e_nvmupd_command(struct i40e_hw *hw,
1494 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
1496 i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d opc 0x%04x cmd 0x%08x config 0x%08x offset 0x%08x data_size 0x%08x\n",
1498 hw->nvmupd_state,
1499 hw->nvm_release_on_done, hw->nvm_wait_opcode,
1504 i40e_debug(hw, I40E_DEBUG_NVM,
1518 bytes[0] = hw->nvmupd_state;
1522 *((u16 *)&bytes[2]) = hw->nvm_wait_opcode;
1526 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR)
1527 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1533 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) {
1534 i40e_debug(hw, I40E_DEBUG_NVM,
1536 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1547 mutex_lock(&hw->aq.arq_mutex);
1548 switch (hw->nvmupd_state) {
1550 status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);
1554 status = i40e_nvmupd_state_reading(hw, cmd, bytes, perrno);
1558 status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno);
1567 i40e_nvmupd_clear_wait_state(hw);
1578 i40e_debug(hw, I40E_DEBUG_NVM,
1579 "NVMUPD: no such state %d\n", hw->nvmupd_state);
1585 mutex_unlock(&hw->aq.arq_mutex);
1590 * i40e_nvmupd_clear_wait_state - clear wait state on hw
1591 * @hw: pointer to the hardware structure
1593 void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw)
1595 i40e_debug(hw, I40E_DEBUG_NVM,
1597 hw->nvm_wait_opcode);
1599 if (hw->nvm_release_on_done) {
1600 i40e_release_nvm(hw);
1601 hw->nvm_release_on_done = false;
1603 hw->nvm_wait_opcode = 0;
1605 if (hw->aq.arq_last_status) {
1606 hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR;
1610 switch (hw->nvmupd_state) {
1612 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
1616 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
1626 * @hw: pointer to the hardware structure
1630 void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,
1635 if (opcode == hw->nvm_wait_opcode) {
1636 memcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len);
1637 i40e_nvmupd_clear_wait_state(hw);