intel/e1000e/82571.c

48 	s32 ret_val;
83 	ret_val = e1000_get_phy_id_82571(hw);
84 	if (ret_val) {
86 		return ret_val;
94 			ret_val = -E1000_ERR_PHY;
98 			ret_val = -E1000_ERR_PHY;
103 			ret_val = -E1000_ERR_PHY;
106 		ret_val = -E1000_ERR_PHY;
110 	if (ret_val)
113 	return ret_val;
390 	s32 ret_val;
407 		ret_val = e1e_rphy(hw, MII_PHYSID1, &phy_id);
408 		if (ret_val)
409 			return ret_val;
413 		ret_val = e1e_rphy(hw, MII_PHYSID2, &phy_id);
414 		if (ret_val)
415 			return ret_val;
563 	s32 ret_val;
566 	ret_val = e1000_get_hw_semaphore_82573(hw);
567 	if (ret_val)
569 	return ret_val;
648 	s32 ret_val;
650 	ret_val = e1000_get_hw_semaphore_82571(hw);
651 	if (ret_val)
652 		return ret_val;
658 		ret_val = e1000e_acquire_nvm(hw);
662 	if (ret_val)
665 	return ret_val;
695 	s32 ret_val;
701 		ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);
705 		ret_val = e1000e_write_nvm_spi(hw, offset, words, data);
708 		ret_val = -E1000_ERR_NVM;
712 	return ret_val;
726 	s32 ret_val;
729 	ret_val = e1000e_update_nvm_checksum_generic(hw);
730 	if (ret_val)
731 		return ret_val;
809 	s32 ret_val = 0;
825 		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
826 		if (ret_val)
831 		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
832 		if (ret_val)
836 	return ret_val;
877 	s32 ret_val;
880 	ret_val = e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &data);
881 	if (ret_val)
882 		return ret_val;
886 		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
887 		if (ret_val)
888 			return ret_val;
891 		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);
892 		if (ret_val)
893 			return ret_val;
895 		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);
896 		if (ret_val)
897 			return ret_val;
900 		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
901 		if (ret_val)
902 			return ret_val;
909 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
911 			if (ret_val)
912 				return ret_val;
915 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
917 			if (ret_val)
918 				return ret_val;
920 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
922 			if (ret_val)
923 				return ret_val;
926 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
928 			if (ret_val)
929 				return ret_val;
945 	s32 ret_val;
950 	ret_val = e1000e_disable_pcie_master(hw);
951 	if (ret_val)
970 		ret_val = e1000_get_hw_semaphore_82573(hw);
974 		ret_val = e1000_get_hw_semaphore_82574(hw);
989 		if (!ret_val)
995 		if (!ret_val)
1010 	ret_val = e1000e_get_auto_rd_done(hw);
1011 	if (ret_val)
1013 		return ret_val;
1045 		ret_val = e1000_check_alt_mac_addr_generic(hw);
1046 		if (ret_val)
1047 			return ret_val;
1069 	s32 ret_val;
1075 	ret_val = mac->ops.id_led_init(hw);
1077 	if (ret_val)
1099 	ret_val = mac->ops.setup_link(hw);
1134 	return ret_val;
1363 	s32 ret_val;
1368 	ret_val = e1e_rphy(hw, E1000_RECEIVE_ERROR_COUNTER, &receive_errors);
1369 	if (ret_val)
1372 		ret_val = e1e_rphy(hw, E1000_BASE1000T_STATUS, &status_1kbt);
1373 		if (ret_val)
1424 	s32 ret_val;
1434 		ret_val = e1000e_copper_link_setup_m88(hw);
1437 		ret_val = e1000e_copper_link_setup_igp(hw);
1443 	if (ret_val)
1444 		return ret_val;
1503 	s32 ret_val = 0;
1575 				ret_val = e1000e_config_fc_after_link_up(hw);
1576 				if (ret_val) {
1639 	return ret_val;
1652 	s32 ret_val;
1654 	ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
1655 	if (ret_val) {
1657 		return ret_val;
1730 	s32 ret_val;
1739 	ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
1740 	if (ret_val)
1741 		return ret_val;
1751 		ret_val = e1000_read_nvm(hw, 0x23, 1, &data);
1752 		if (ret_val)
1753 			return ret_val;
1757 			ret_val = e1000_write_nvm(hw, 0x23, 1, &data);
1758 			if (ret_val)
1759 				return ret_val;
1760 			ret_val = e1000e_update_nvm_checksum(hw);
1761 			if (ret_val)
1762 				return ret_val;
1776 		s32 ret_val;
1782 		ret_val = e1000_check_alt_mac_addr_generic(hw);
1783 		if (ret_val)
1784 			return ret_val;