Lines Matching refs:hw
11 static s32 e1000_check_downshift(struct e1000_hw *hw);
12 static s32 e1000_check_polarity(struct e1000_hw *hw,
14 static void e1000_clear_hw_cntrs(struct e1000_hw *hw);
15 static void e1000_clear_vfta(struct e1000_hw *hw);
16 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw,
18 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw);
19 static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
20 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
21 static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
23 static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
24 static s32 e1000_id_led_init(struct e1000_hw *hw);
25 static void e1000_init_rx_addrs(struct e1000_hw *hw);
26 static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
28 static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
30 static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
31 static s32 e1000_wait_autoneg(struct e1000_hw *hw);
32 static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);
33 static s32 e1000_set_phy_type(struct e1000_hw *hw);
34 static void e1000_phy_init_script(struct e1000_hw *hw);
35 static s32 e1000_setup_copper_link(struct e1000_hw *hw);
36 static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw);
37 static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw);
38 static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw);
39 static s32 e1000_config_mac_to_phy(struct e1000_hw *hw);
40 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
41 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
42 static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count);
43 static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw);
44 static s32 e1000_phy_reset_dsp(struct e1000_hw *hw);
45 static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset,
47 static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset,
49 static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw);
50 static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd);
51 static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd);
52 static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count);
53 static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
55 static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
57 static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count);
58 static s32 e1000_acquire_eeprom(struct e1000_hw *hw);
59 static void e1000_release_eeprom(struct e1000_hw *hw);
60 static void e1000_standby_eeprom(struct e1000_hw *hw);
61 static s32 e1000_set_vco_speed(struct e1000_hw *hw);
62 static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw);
63 static s32 e1000_set_phy_mode(struct e1000_hw *hw);
64 static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
66 static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
90 * @hw: Struct containing variables accessed by shared code
92 static s32 e1000_set_phy_type(struct e1000_hw *hw)
94 if (hw->mac_type == e1000_undefined)
97 switch (hw->phy_id) {
103 hw->phy_type = e1000_phy_m88;
106 if (hw->mac_type == e1000_82541 ||
107 hw->mac_type == e1000_82541_rev_2 ||
108 hw->mac_type == e1000_82547 ||
109 hw->mac_type == e1000_82547_rev_2)
110 hw->phy_type = e1000_phy_igp;
113 hw->phy_type = e1000_phy_8211;
116 hw->phy_type = e1000_phy_8201;
120 hw->phy_type = e1000_phy_undefined;
129 * @hw: Struct containing variables accessed by shared code
131 static void e1000_phy_init_script(struct e1000_hw *hw)
135 if (hw->phy_init_script) {
141 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
144 e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
147 e1000_write_phy_reg(hw, 0x0000, 0x0140);
150 switch (hw->mac_type) {
153 e1000_write_phy_reg(hw, 0x1F95, 0x0001);
154 e1000_write_phy_reg(hw, 0x1F71, 0xBD21);
155 e1000_write_phy_reg(hw, 0x1F79, 0x0018);
156 e1000_write_phy_reg(hw, 0x1F30, 0x1600);
157 e1000_write_phy_reg(hw, 0x1F31, 0x0014);
158 e1000_write_phy_reg(hw, 0x1F32, 0x161C);
159 e1000_write_phy_reg(hw, 0x1F94, 0x0003);
160 e1000_write_phy_reg(hw, 0x1F96, 0x003F);
161 e1000_write_phy_reg(hw, 0x2010, 0x0008);
166 e1000_write_phy_reg(hw, 0x1F73, 0x0099);
172 e1000_write_phy_reg(hw, 0x0000, 0x3300);
176 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
178 if (hw->mac_type == e1000_82547) {
182 e1000_read_phy_reg(hw,
187 e1000_read_phy_reg(hw,
210 e1000_write_phy_reg(hw,
213 e1000_write_phy_reg(hw,
222 * e1000_set_mac_type - Set the mac type member in the hw struct.
223 * @hw: Struct containing variables accessed by shared code
225 s32 e1000_set_mac_type(struct e1000_hw *hw)
227 switch (hw->device_id) {
229 switch (hw->revision_id) {
231 hw->mac_type = e1000_82542_rev2_0;
234 hw->mac_type = e1000_82542_rev2_1;
243 hw->mac_type = e1000_82543;
249 hw->mac_type = e1000_82544;
256 hw->mac_type = e1000_82540;
260 hw->mac_type = e1000_82545;
265 hw->mac_type = e1000_82545_rev_3;
270 hw->mac_type = e1000_82546;
278 hw->mac_type = e1000_82546_rev_3;
283 hw->mac_type = e1000_82541;
289 hw->mac_type = e1000_82541_rev_2;
293 hw->mac_type = e1000_82547;
296 hw->mac_type = e1000_82547_rev_2;
299 hw->mac_type = e1000_ce4100;
306 switch (hw->mac_type) {
311 hw->asf_firmware_present = true;
320 if (hw->mac_type == e1000_82543)
321 hw->bad_tx_carr_stats_fd = true;
323 if (hw->mac_type > e1000_82544)
324 hw->has_smbus = true;
331 * @hw: Struct containing variables accessed by shared code
333 void e1000_set_media_type(struct e1000_hw *hw)
337 if (hw->mac_type != e1000_82543) {
339 hw->tbi_compatibility_en = false;
342 switch (hw->device_id) {
345 hw->media_type = e1000_media_type_internal_serdes;
348 switch (hw->mac_type) {
351 hw->media_type = e1000_media_type_fiber;
354 hw->media_type = e1000_media_type_copper;
359 hw->media_type = e1000_media_type_fiber;
361 hw->tbi_compatibility_en = false;
363 hw->media_type = e1000_media_type_copper;
372 * @hw: Struct containing variables accessed by shared code
376 s32 e1000_reset_hw(struct e1000_hw *hw)
385 if (hw->mac_type == e1000_82542_rev2_0) {
387 e1000_pci_clear_mwi(hw);
403 hw->tbi_compatibility_on = false;
413 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
426 switch (hw->mac_type) {
436 E1000_WRITE_REG_IO(hw, CTRL, (ctrl | E1000_CTRL_RST));
453 switch (hw->mac_type) {
476 ret_val = e1000_get_auto_rd_done(hw);
483 if (hw->mac_type >= e1000_82540) {
489 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
490 e1000_phy_init_script(hw);
507 if (hw->mac_type == e1000_82542_rev2_0) {
508 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
509 e1000_pci_set_mwi(hw);
517 * @hw: Struct containing variables accessed by shared code
525 s32 e1000_init_hw(struct e1000_hw *hw)
534 ret_val = e1000_id_led_init(hw);
541 e1000_set_media_type(hw);
545 if (hw->mac_type < e1000_82545_rev_3)
547 e1000_clear_vfta(hw);
550 if (hw->mac_type == e1000_82542_rev2_0) {
552 e1000_pci_clear_mwi(hw);
561 e1000_init_rx_addrs(hw);
564 if (hw->mac_type == e1000_82542_rev2_0) {
568 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
569 e1000_pci_set_mwi(hw);
576 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
588 if (hw->dma_fairness && hw->mac_type <= e1000_82543) {
593 switch (hw->mac_type) {
601 if (hw->bus_type == e1000_bus_type_pcix &&
602 e1000_pcix_get_mmrbc(hw) > 2048)
603 e1000_pcix_set_mmrbc(hw, 2048);
608 ret_val = e1000_setup_link(hw);
611 if (hw->mac_type > e1000_82544) {
624 e1000_clear_hw_cntrs(hw);
626 if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER ||
627 hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) {
641 * @hw: Struct containing variables accessed by shared code.
643 static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw)
648 if (hw->media_type != e1000_media_type_internal_serdes)
651 switch (hw->mac_type) {
659 ret_val = e1000_read_eeprom(hw, EEPROM_SERDES_AMPLITUDE, 1,
668 e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data);
678 * @hw: Struct containing variables accessed by shared code
686 s32 e1000_setup_link(struct e1000_hw *hw)
697 * control setting, then the variable hw->fc will
700 if (hw->fc == E1000_FC_DEFAULT) {
701 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG,
708 hw->fc = E1000_FC_NONE;
711 hw->fc = E1000_FC_TX_PAUSE;
713 hw->fc = E1000_FC_FULL;
720 if (hw->mac_type == e1000_82542_rev2_0)
721 hw->fc &= (~E1000_FC_TX_PAUSE);
723 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1))
724 hw->fc &= (~E1000_FC_RX_PAUSE);
726 hw->original_fc = hw->fc;
728 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc);
737 if (hw->mac_type == e1000_82543) {
738 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG,
750 ret_val = (hw->media_type == e1000_media_type_copper) ?
751 e1000_setup_copper_link(hw) : e1000_setup_fiber_serdes_link(hw);
764 ew32(FCTTV, hw->fc_pause_time);
772 if (!(hw->fc & E1000_FC_TX_PAUSE)) {
780 if (hw->fc_send_xon) {
781 ew32(FCRTL, (hw->fc_low_water | E1000_FCRTL_XONE));
782 ew32(FCRTH, hw->fc_high_water);
784 ew32(FCRTL, hw->fc_low_water);
785 ew32(FCRTH, hw->fc_high_water);
793 * @hw: Struct containing variables accessed by shared code
799 static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw)
815 if (hw->media_type == e1000_media_type_fiber)
816 signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0;
818 ret_val = e1000_adjust_serdes_amplitude(hw);
826 ret_val = e1000_set_vco_speed(hw);
830 e1000_config_collision_dist(hw);
848 switch (hw->fc) {
892 hw->txcw = txcw;
902 if (hw->media_type == e1000_media_type_internal_serdes ||
913 hw->autoneg_failed = 1;
919 ret_val = e1000_check_for_link(hw);
924 hw->autoneg_failed = 0;
926 hw->autoneg_failed = 0;
937 * @hw: Struct containing variables accessed by shared code
941 static s32 e1000_copper_link_rtl_setup(struct e1000_hw *hw)
946 ret_val = e1000_phy_reset(hw);
955 static s32 gbe_dhg_phy_setup(struct e1000_hw *hw)
960 switch (hw->phy_type) {
962 ret_val = e1000_copper_link_rtl_setup(hw);
981 ret_val = e1000_copper_link_rtl_setup(hw);
998 * @hw: Struct containing variables accessed by shared code
1002 static s32 e1000_copper_link_preconfig(struct e1000_hw *hw)
1013 if (hw->mac_type > e1000_82543) {
1021 ret_val = e1000_phy_hw_reset(hw);
1027 ret_val = e1000_detect_gig_phy(hw);
1032 e_dbg("Phy ID = %x\n", hw->phy_id);
1035 ret_val = e1000_set_phy_mode(hw);
1039 if ((hw->mac_type == e1000_82545_rev_3) ||
1040 (hw->mac_type == e1000_82546_rev_3)) {
1042 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1045 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1048 if (hw->mac_type <= e1000_82543 ||
1049 hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 ||
1050 hw->mac_type == e1000_82541_rev_2 ||
1051 hw->mac_type == e1000_82547_rev_2)
1052 hw->phy_reset_disable = false;
1059 * @hw: Struct containing variables accessed by shared code
1061 static s32 e1000_copper_link_igp_setup(struct e1000_hw *hw)
1067 if (hw->phy_reset_disable)
1070 ret_val = e1000_phy_reset(hw);
1085 if (hw->phy_type == e1000_phy_igp) {
1087 ret_val = e1000_set_d3_lplu_state(hw, false);
1095 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
1099 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
1100 hw->dsp_config_state = e1000_dsp_config_disabled;
1105 hw->mdix = 1;
1108 hw->dsp_config_state = e1000_dsp_config_enabled;
1111 switch (hw->mdix) {
1124 ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
1129 if (hw->autoneg) {
1130 e1000_ms_type phy_ms_setting = hw->master_slave;
1132 if (hw->ffe_config_state == e1000_ffe_config_active)
1133 hw->ffe_config_state = e1000_ffe_config_enabled;
1135 if (hw->dsp_config_state == e1000_dsp_config_activated)
1136 hw->dsp_config_state = e1000_dsp_config_enabled;
1142 if (hw->autoneg_advertised == ADVERTISE_1000_FULL) {
1145 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1151 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1157 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_data);
1162 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data);
1167 ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_data);
1172 hw->original_master_slave = (phy_data & CR_1000T_MS_ENABLE) ?
1191 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data);
1201 * @hw: Struct containing variables accessed by shared code
1203 static s32 e1000_copper_link_mgp_setup(struct e1000_hw *hw)
1208 if (hw->phy_reset_disable)
1212 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1227 switch (hw->mdix) {
1250 if (hw->disable_polarity_correction == 1)
1252 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1256 if (hw->phy_revision < M88E1011_I_REV_4) {
1261 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1268 if ((hw->phy_revision == E1000_REVISION_2) &&
1269 (hw->phy_id == M88E1111_I_PHY_ID)) {
1273 ret_val = e1000_write_phy_reg(hw,
1284 ret_val = e1000_write_phy_reg(hw,
1293 ret_val = e1000_phy_reset(hw);
1304 * @hw: Struct containing variables accessed by shared code
1309 static s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
1314 /* Perform some bounds checking on the hw->autoneg_advertised
1317 hw->autoneg_advertised &= AUTONEG_ADVERTISE_SPEED_DEFAULT;
1322 if (hw->autoneg_advertised == 0)
1323 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT;
1326 if (hw->phy_type == e1000_phy_8201)
1327 hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL;
1330 ret_val = e1000_phy_setup_autoneg(hw);
1340 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
1345 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
1352 if (hw->wait_autoneg_complete) {
1353 ret_val = e1000_wait_autoneg(hw);
1361 hw->get_link_status = true;
1368 * @hw: Struct containing variables accessed by shared code
1379 static s32 e1000_copper_link_postconfig(struct e1000_hw *hw)
1383 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) {
1384 e1000_config_collision_dist(hw);
1386 ret_val = e1000_config_mac_to_phy(hw);
1392 ret_val = e1000_config_fc_after_link_up(hw);
1399 if (hw->phy_type == e1000_phy_igp) {
1400 ret_val = e1000_config_dsp_after_link_change(hw, true);
1412 * @hw: Struct containing variables accessed by shared code
1416 static s32 e1000_setup_copper_link(struct e1000_hw *hw)
1423 ret_val = e1000_copper_link_preconfig(hw);
1427 if (hw->phy_type == e1000_phy_igp) {
1428 ret_val = e1000_copper_link_igp_setup(hw);
1431 } else if (hw->phy_type == e1000_phy_m88) {
1432 ret_val = e1000_copper_link_mgp_setup(hw);
1436 ret_val = gbe_dhg_phy_setup(hw);
1443 if (hw->autoneg) {
1447 ret_val = e1000_copper_link_autoneg(hw);
1455 ret_val = e1000_phy_force_speed_duplex(hw);
1466 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
1469 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
1475 ret_val = e1000_copper_link_postconfig(hw);
1491 * @hw: Struct containing variables accessed by shared code
1495 s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
1502 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
1507 ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
1510 else if (hw->phy_type == e1000_phy_8201)
1527 e_dbg("autoneg_advertised %x\n", hw->autoneg_advertised);
1530 if (hw->autoneg_advertised & ADVERTISE_10_HALF) {
1536 if (hw->autoneg_advertised & ADVERTISE_10_FULL) {
1542 if (hw->autoneg_advertised & ADVERTISE_100_HALF) {
1548 if (hw->autoneg_advertised & ADVERTISE_100_FULL) {
1554 if (hw->autoneg_advertised & ADVERTISE_1000_HALF) {
1560 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) {
1582 switch (hw->fc) {
1597 * hw's ability to send PAUSE frames.
1619 ret_val = e1000_write_phy_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
1625 if (hw->phy_type == e1000_phy_8201) {
1628 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1639 * @hw: Struct containing variables accessed by shared code
1641 * Force PHY speed and duplex settings to hw->forced_speed_duplex
1643 static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw)
1653 hw->fc = E1000_FC_NONE;
1655 e_dbg("hw->fc = %d\n", hw->fc);
1668 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg);
1677 if (hw->forced_speed_duplex == e1000_100_full ||
1678 hw->forced_speed_duplex == e1000_10_full) {
1695 if (hw->forced_speed_duplex == e1000_100_full ||
1696 hw->forced_speed_duplex == e1000_100_half) {
1710 e1000_config_collision_dist(hw);
1715 if (hw->phy_type == e1000_phy_m88) {
1717 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1726 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1741 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
1749 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
1755 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg);
1768 if (hw->wait_autoneg_complete) {
1779 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1784 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1792 if ((i == 0) && (hw->phy_type == e1000_phy_m88)) {
1796 ret_val = e1000_phy_reset_dsp(hw);
1813 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1818 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1824 if (hw->phy_type == e1000_phy_m88) {
1831 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1838 e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1848 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1854 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1858 if ((hw->mac_type == e1000_82544 ||
1859 hw->mac_type == e1000_82543) &&
1860 (!hw->autoneg) &&
1861 (hw->forced_speed_duplex == e1000_10_full ||
1862 hw->forced_speed_duplex == e1000_10_half)) {
1863 ret_val = e1000_polarity_reversal_workaround(hw);
1873 * @hw: Struct containing variables accessed by shared code
1879 void e1000_config_collision_dist(struct e1000_hw *hw)
1883 if (hw->mac_type < e1000_82543)
1899 * @hw: Struct containing variables accessed by shared code
1905 static s32 e1000_config_mac_to_phy(struct e1000_hw *hw)
1914 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100))
1924 switch (hw->phy_type) {
1926 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
1940 e1000_config_collision_dist(hw);
1946 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
1956 e1000_config_collision_dist(hw);
1975 * @hw: Struct containing variables accessed by shared code
1984 s32 e1000_force_mac_fc(struct e1000_hw *hw)
1997 * according to the "hw->fc" parameter.
2009 switch (hw->fc) {
2030 if (hw->mac_type == e1000_82542_rev2_0)
2039 * @hw: Struct containing variables accessed by shared code
2048 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw)
2061 if (((hw->media_type == e1000_media_type_fiber) &&
2062 (hw->autoneg_failed)) ||
2063 ((hw->media_type == e1000_media_type_internal_serdes) &&
2064 (hw->autoneg_failed)) ||
2065 ((hw->media_type == e1000_media_type_copper) &&
2066 (!hw->autoneg))) {
2067 ret_val = e1000_force_mac_fc(hw);
2079 if ((hw->media_type == e1000_media_type_copper) && hw->autoneg) {
2084 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
2087 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
2098 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV,
2102 ret_val = e1000_read_phy_reg(hw, PHY_LP_ABILITY,
2151 if (hw->original_fc == E1000_FC_FULL) {
2152 hw->fc = E1000_FC_FULL;
2155 hw->fc = E1000_FC_RX_PAUSE;
2172 hw->fc = E1000_FC_TX_PAUSE;
2188 hw->fc = E1000_FC_RX_PAUSE;
2214 else if ((hw->original_fc == E1000_FC_NONE ||
2215 hw->original_fc == E1000_FC_TX_PAUSE) ||
2216 hw->fc_strict_ieee) {
2217 hw->fc = E1000_FC_NONE;
2220 hw->fc = E1000_FC_RX_PAUSE;
2230 e1000_get_speed_and_duplex(hw, &speed, &duplex);
2238 hw->fc = E1000_FC_NONE;
2243 ret_val = e1000_force_mac_fc(hw);
2259 * @hw: pointer to the HW structure
2264 static s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
2283 if (hw->autoneg_failed == 0) {
2284 hw->autoneg_failed = 1;
2290 ew32(TXCW, (hw->txcw & ~E1000_TXCW_ANE));
2298 ret_val = e1000_config_fc_after_link_up(hw);
2310 ew32(TXCW, hw->txcw);
2313 hw->serdes_has_link = true;
2324 hw->serdes_has_link = true;
2328 hw->serdes_has_link = false;
2341 hw->serdes_has_link = true;
2345 hw->serdes_has_link = false;
2350 hw->serdes_has_link = false;
2354 hw->serdes_has_link = false;
2365 * @hw: Struct containing variables accessed by shared code
2370 s32 e1000_check_for_link(struct e1000_hw *hw)
2385 if ((hw->media_type == e1000_media_type_fiber) ||
2386 (hw->media_type == e1000_media_type_internal_serdes)) {
2389 if (hw->media_type == e1000_media_type_fiber) {
2391 hw->get_link_status = false;
2401 if ((hw->media_type == e1000_media_type_copper) && hw->get_link_status) {
2407 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2410 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2415 hw->get_link_status = false;
2419 e1000_check_downshift(hw);
2430 if ((hw->mac_type == e1000_82544 ||
2431 hw->mac_type == e1000_82543) &&
2432 (!hw->autoneg) &&
2433 (hw->forced_speed_duplex == e1000_10_full ||
2434 hw->forced_speed_duplex == e1000_10_half)) {
2437 e1000_polarity_reversal_workaround(hw);
2445 e1000_config_dsp_after_link_change(hw, false);
2452 if (!hw->autoneg)
2456 e1000_config_dsp_after_link_change(hw, true);
2466 if ((hw->mac_type >= e1000_82544) &&
2467 (hw->mac_type != e1000_ce4100))
2468 e1000_config_collision_dist(hw);
2470 ret_val = e1000_config_mac_to_phy(hw);
2483 ret_val = e1000_config_fc_after_link_up(hw);
2497 if (hw->tbi_compatibility_en) {
2501 e1000_get_speed_and_duplex(hw, &speed, &duplex);
2512 if (hw->tbi_compatibility_on) {
2519 hw->tbi_compatibility_on = false;
2528 if (!hw->tbi_compatibility_on) {
2529 hw->tbi_compatibility_on = true;
2538 if ((hw->media_type == e1000_media_type_fiber) ||
2539 (hw->media_type == e1000_media_type_internal_serdes))
2540 e1000_check_for_serdes_link_generic(hw);
2547 * @hw: Struct containing variables accessed by shared code
2553 s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex)
2559 if (hw->mac_type >= e1000_82543) {
2589 if (hw->phy_type == e1000_phy_igp && hw->speed_downgraded) {
2590 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_EXP, &phy_data);
2598 e1000_read_phy_reg(hw, PHY_LP_ABILITY, &phy_data);
2614 * @hw: Struct containing variables accessed by shared code
2618 static s32 e1000_wait_autoneg(struct e1000_hw *hw)
2631 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2634 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2647 * @hw: Struct containing variables accessed by shared code
2650 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl)
2662 * @hw: Struct containing variables accessed by shared code
2665 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl)
2677 * @hw: Struct containing variables accessed by shared code
2683 static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count)
2716 e1000_raise_mdi_clk(hw, &ctrl);
2717 e1000_lower_mdi_clk(hw, &ctrl);
2725 * @hw: Struct containing variables accessed by shared code
2729 static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw)
2757 e1000_raise_mdi_clk(hw, &ctrl);
2758 e1000_lower_mdi_clk(hw, &ctrl);
2762 e1000_raise_mdi_clk(hw, &ctrl);
2767 e1000_lower_mdi_clk(hw, &ctrl);
2770 e1000_raise_mdi_clk(hw, &ctrl);
2771 e1000_lower_mdi_clk(hw, &ctrl);
2778 * @hw: Struct containing variables accessed by shared code
2785 s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data)
2792 if ((hw->phy_type == e1000_phy_igp) &&
2794 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2800 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2808 static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2813 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1;
2820 if (hw->mac_type > e1000_82543) {
2825 if (hw->mac_type == e1000_ce4100) {
2885 e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);
2902 e1000_shift_out_mdi_bits(hw, mdic, 14);
2908 *phy_data = e1000_shift_in_mdi_bits(hw);
2916 * @hw: Struct containing variables accessed by shared code
2922 s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data)
2929 if ((hw->phy_type == e1000_phy_igp) &&
2931 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2939 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2946 static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2951 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1;
2958 if (hw->mac_type > e1000_82543) {
2964 if (hw->mac_type == e1000_ce4100) {
3014 e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);
3027 e1000_shift_out_mdi_bits(hw, mdic, 32);
3035 * @hw: Struct containing variables accessed by shared code
3039 s32 e1000_phy_hw_reset(struct e1000_hw *hw)
3046 if (hw->mac_type > e1000_82543) {
3078 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
3087 return e1000_get_phy_cfg_done(hw);
3092 * @hw: Struct containing variables accessed by shared code
3097 s32 e1000_phy_reset(struct e1000_hw *hw)
3102 switch (hw->phy_type) {
3104 ret_val = e1000_phy_hw_reset(hw);
3109 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
3114 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
3122 if (hw->phy_type == e1000_phy_igp)
3123 e1000_phy_init_script(hw);
3130 * @hw: Struct containing variables accessed by shared code
3134 static s32 e1000_detect_gig_phy(struct e1000_hw *hw)
3140 if (hw->phy_id != 0)
3144 ret_val = e1000_read_phy_reg(hw, PHY_ID1, &phy_id_high);
3148 hw->phy_id = (u32)(phy_id_high << 16);
3150 ret_val = e1000_read_phy_reg(hw, PHY_ID2, &phy_id_low);
3154 hw->phy_id |= (u32)(phy_id_low & PHY_REVISION_MASK);
3155 hw->phy_revision = (u32)phy_id_low & ~PHY_REVISION_MASK;
3157 switch (hw->mac_type) {
3159 if (hw->phy_id == M88E1000_E_PHY_ID)
3163 if (hw->phy_id == M88E1000_I_PHY_ID)
3171 if (hw->phy_id == M88E1011_I_PHY_ID)
3175 if ((hw->phy_id == RTL8211B_PHY_ID) ||
3176 (hw->phy_id == RTL8201N_PHY_ID) ||
3177 (hw->phy_id == M88E1118_E_PHY_ID))
3184 if (hw->phy_id == IGP01E1000_I_PHY_ID)
3188 e_dbg("Invalid MAC type %d\n", hw->mac_type);
3191 phy_init_status = e1000_set_phy_type(hw);
3194 e_dbg("PHY ID 0x%X detected\n", hw->phy_id);
3197 e_dbg("Invalid PHY ID 0x%X\n", hw->phy_id);
3203 * @hw: Struct containing variables accessed by shared code
3207 static s32 e1000_phy_reset_dsp(struct e1000_hw *hw)
3212 ret_val = e1000_write_phy_reg(hw, 29, 0x001d);
3215 ret_val = e1000_write_phy_reg(hw, 30, 0x00c1);
3218 ret_val = e1000_write_phy_reg(hw, 30, 0x0000);
3229 * @hw: Struct containing variables accessed by shared code
3234 static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
3242 * and it stored in the hw->speed_downgraded parameter.
3244 phy_info->downshift = (e1000_downshift) hw->speed_downgraded;
3253 ret_val = e1000_check_polarity(hw, &polarity);
3259 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS, &phy_data);
3271 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
3283 ret_val = e1000_get_cable_length(hw, &min_length, &max_length);
3307 * @hw: Struct containing variables accessed by shared code
3312 static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
3320 * and it stored in the hw->speed_downgraded parameter.
3322 phy_info->downshift = (e1000_downshift) hw->speed_downgraded;
3324 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
3338 ret_val = e1000_check_polarity(hw, &polarity);
3343 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
3358 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
3375 * @hw: Struct containing variables accessed by shared code
3380 s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info)
3394 if (hw->media_type != e1000_media_type_copper) {
3399 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
3403 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
3412 if (hw->phy_type == e1000_phy_igp)
3413 return e1000_phy_igp_get_info(hw, phy_info);
3414 else if ((hw->phy_type == e1000_phy_8211) ||
3415 (hw->phy_type == e1000_phy_8201))
3418 return e1000_phy_m88_get_info(hw, phy_info);
3421 s32 e1000_validate_mdi_setting(struct e1000_hw *hw)
3423 if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) {
3425 hw->mdix = 1;
3433 * @hw: Struct containing variables accessed by shared code
3435 * Sets up eeprom variables in the hw struct. Must be called after mac_type
3438 s32 e1000_init_eeprom_params(struct e1000_hw *hw)
3440 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3445 switch (hw->mac_type) {
3510 ret_val = e1000_read_eeprom(hw, EEPROM_CFG, 1, &eeprom_size);
3529 * @hw: Struct containing variables accessed by shared code
3532 static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd)
3540 udelay(hw->eeprom.delay_usec);
3545 * @hw: Struct containing variables accessed by shared code
3548 static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd)
3556 udelay(hw->eeprom.delay_usec);
3561 * @hw: Struct containing variables accessed by shared code
3565 static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count)
3567 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3599 e1000_raise_ee_clk(hw, &eecd);
3600 e1000_lower_ee_clk(hw, &eecd);
3613 * @hw: Struct containing variables accessed by shared code
3616 static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count)
3636 e1000_raise_ee_clk(hw, &eecd);
3644 e1000_lower_ee_clk(hw, &eecd);
3652 * @hw: Struct containing variables accessed by shared code
3657 static s32 e1000_acquire_eeprom(struct e1000_hw *hw)
3659 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3665 if (hw->mac_type > e1000_82544) {
3706 * @hw: Struct containing variables accessed by shared code
3708 static void e1000_standby_eeprom(struct e1000_hw *hw)
3710 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3753 * @hw: Struct containing variables accessed by shared code
3757 static void e1000_release_eeprom(struct e1000_hw *hw)
3763 if (hw->eeprom.type == e1000_eeprom_spi) {
3770 udelay(hw->eeprom.delay_usec);
3771 } else if (hw->eeprom.type == e1000_eeprom_microwire) {
3783 udelay(hw->eeprom.delay_usec);
3789 udelay(hw->eeprom.delay_usec);
3793 if (hw->mac_type > e1000_82544) {
3801 * @hw: Struct containing variables accessed by shared code
3803 static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw)
3815 e1000_shift_out_ee_bits(hw, EEPROM_RDSR_OPCODE_SPI,
3816 hw->eeprom.opcode_bits);
3817 spi_stat_reg = (u8)e1000_shift_in_ee_bits(hw, 8);
3824 e1000_standby_eeprom(hw);
3840 * @hw: Struct containing variables accessed by shared code
3845 s32 e1000_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
3850 ret = e1000_do_read_eeprom(hw, offset, words, data);
3855 static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
3858 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3861 if (hw->mac_type == e1000_ce4100) {
3883 if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
3893 if (e1000_spi_eeprom_ready(hw)) {
3894 e1000_release_eeprom(hw);
3898 e1000_standby_eeprom(hw);
3907 e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits);
3908 e1000_shift_out_ee_bits(hw, (u16)(offset * 2),
3919 word_in = e1000_shift_in_ee_bits(hw, 16);
3925 e1000_shift_out_ee_bits(hw,
3928 e1000_shift_out_ee_bits(hw, (u16)(offset + i),
3934 data[i] = e1000_shift_in_ee_bits(hw, 16);
3935 e1000_standby_eeprom(hw);
3941 e1000_release_eeprom(hw);
3948 * @hw: Struct containing variables accessed by shared code
3954 s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw)
3960 if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) {
3969 if ((hw->subsystem_vendor_id == 0x103C) && (eeprom_data == 0x16d6))
3983 * @hw: Struct containing variables accessed by shared code
3988 s32 e1000_update_eeprom_checksum(struct e1000_hw *hw)
3994 if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) {
4001 if (e1000_write_eeprom(hw, EEPROM_CHECKSUM_REG, 1, &checksum) < 0) {
4010 * @hw: Struct containing variables accessed by shared code
4018 s32 e1000_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
4023 ret = e1000_do_write_eeprom(hw, offset, words, data);
4028 static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
4031 struct e1000_eeprom_info *eeprom = &hw->eeprom;
4034 if (hw->mac_type == e1000_ce4100) {
4051 if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
4055 status = e1000_write_eeprom_microwire(hw, offset, words, data);
4057 status = e1000_write_eeprom_spi(hw, offset, words, data);
4062 e1000_release_eeprom(hw);
4069 * @hw: Struct containing variables accessed by shared code
4074 static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset, u16 words,
4077 struct e1000_eeprom_info *eeprom = &hw->eeprom;
4083 if (e1000_spi_eeprom_ready(hw))
4086 e1000_standby_eeprom(hw);
4090 e1000_shift_out_ee_bits(hw, EEPROM_WREN_OPCODE_SPI,
4093 e1000_standby_eeprom(hw);
4102 e1000_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits);
4104 e1000_shift_out_ee_bits(hw, (u16)((offset + widx) * 2),
4116 e1000_shift_out_ee_bits(hw, word_out, 16);
4125 e1000_standby_eeprom(hw);
4136 * @hw: Struct containing variables accessed by shared code
4141 static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset,
4144 struct e1000_eeprom_info *eeprom = &hw->eeprom;
4155 e1000_shift_out_ee_bits(hw, EEPROM_EWEN_OPCODE_MICROWIRE,
4158 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2));
4161 e1000_standby_eeprom(hw);
4165 e1000_shift_out_ee_bits(hw, EEPROM_WRITE_OPCODE_MICROWIRE,
4168 e1000_shift_out_ee_bits(hw, (u16)(offset + words_written),
4172 e1000_shift_out_ee_bits(hw, data[words_written], 16);
4177 e1000_standby_eeprom(hw);
4196 e1000_standby_eeprom(hw);
4208 e1000_shift_out_ee_bits(hw, EEPROM_EWDS_OPCODE_MICROWIRE,
4211 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2));
4218 * @hw: Struct containing variables accessed by shared code
4223 s32 e1000_read_mac_addr(struct e1000_hw *hw)
4230 if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {
4234 hw->perm_mac_addr[i] = (u8)(eeprom_data & 0x00FF);
4235 hw->perm_mac_addr[i + 1] = (u8)(eeprom_data >> 8);
4238 switch (hw->mac_type) {
4244 hw->perm_mac_addr[5] ^= 0x01;
4249 hw->mac_addr[i] = hw->perm_mac_addr[i];
4255 * @hw: Struct containing variables accessed by shared code
4261 static void e1000_init_rx_addrs(struct e1000_hw *hw)
4269 e1000_rar_set(hw, hw->mac_addr, 0);
4278 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
4280 E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
4287 * @hw: Struct containing variables accessed by shared code
4290 u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
4297 switch (hw->mc_filter_type) {
4326 * @hw: Struct containing variables accessed by shared code
4330 void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
4359 switch (hw->mac_type) {
4366 E1000_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
4368 E1000_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
4374 * @hw: Struct containing variables accessed by shared code
4378 void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
4382 if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) {
4383 temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1));
4384 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
4386 E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp);
4389 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
4396 * @hw: Struct containing variables accessed by shared code
4398 static void e1000_clear_vfta(struct e1000_hw *hw)
4403 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
4408 static s32 e1000_id_led_init(struct e1000_hw *hw)
4417 if (hw->mac_type < e1000_82540) {
4423 hw->ledctl_default = ledctl;
4424 hw->ledctl_mode1 = hw->ledctl_default;
4425 hw->ledctl_mode2 = hw->ledctl_default;
4427 if (e1000_read_eeprom(hw, EEPROM_ID_LED_SETTINGS, 1, &eeprom_data) < 0) {
4443 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
4444 hw->ledctl_mode1 |= ledctl_on << (i << 3);
4449 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
4450 hw->ledctl_mode1 |= ledctl_off << (i << 3);
4460 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
4461 hw->ledctl_mode2 |= ledctl_on << (i << 3);
4466 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
4467 hw->ledctl_mode2 |= ledctl_off << (i << 3);
4479 * @hw: Struct containing variables accessed by shared code
4483 s32 e1000_setup_led(struct e1000_hw *hw)
4488 switch (hw->mac_type) {
4500 ret_val = e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO,
4501 &hw->phy_spd_default);
4504 ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
4505 (u16)(hw->phy_spd_default &
4511 if (hw->media_type == e1000_media_type_fiber) {
4514 hw->ledctl_default = ledctl;
4522 } else if (hw->media_type == e1000_media_type_copper)
4523 ew32(LEDCTL, hw->ledctl_mode1);
4532 * @hw: Struct containing variables accessed by shared code
4534 s32 e1000_cleanup_led(struct e1000_hw *hw)
4538 switch (hw->mac_type) {
4550 ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
4551 hw->phy_spd_default);
4557 ew32(LEDCTL, hw->ledctl_default);
4566 * @hw: Struct containing variables accessed by shared code
4568 s32 e1000_led_on(struct e1000_hw *hw)
4572 switch (hw->mac_type) {
4581 if (hw->media_type == e1000_media_type_fiber) {
4592 if (hw->media_type == e1000_media_type_fiber) {
4596 } else if (hw->media_type == e1000_media_type_copper) {
4597 ew32(LEDCTL, hw->ledctl_mode2);
4610 * @hw: Struct containing variables accessed by shared code
4612 s32 e1000_led_off(struct e1000_hw *hw)
4616 switch (hw->mac_type) {
4625 if (hw->media_type == e1000_media_type_fiber) {
4636 if (hw->media_type == e1000_media_type_fiber) {
4640 } else if (hw->media_type == e1000_media_type_copper) {
4641 ew32(LEDCTL, hw->ledctl_mode1);
4654 * @hw: Struct containing variables accessed by shared code
4656 static void e1000_clear_hw_cntrs(struct e1000_hw *hw)
4712 if (hw->mac_type < e1000_82543)
4722 if (hw->mac_type <= e1000_82544)
4732 * @hw: Struct containing variables accessed by shared code
4735 * hw->ifs_params_forced to true. However, you must initialize hw->
4739 void e1000_reset_adaptive(struct e1000_hw *hw)
4741 if (hw->adaptive_ifs) {
4742 if (!hw->ifs_params_forced) {
4743 hw->current_ifs_val = 0;
4744 hw->ifs_min_val = IFS_MIN;
4745 hw->ifs_max_val = IFS_MAX;
4746 hw->ifs_step_size = IFS_STEP;
4747 hw->ifs_ratio = IFS_RATIO;
4749 hw->in_ifs_mode = false;
4758 * @hw: Struct containing variables accessed by shared code
4763 void e1000_update_adaptive(struct e1000_hw *hw)
4765 if (hw->adaptive_ifs) {
4766 if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) {
4767 if (hw->tx_packet_delta > MIN_NUM_XMITS) {
4768 hw->in_ifs_mode = true;
4769 if (hw->current_ifs_val < hw->ifs_max_val) {
4770 if (hw->current_ifs_val == 0)
4771 hw->current_ifs_val =
4772 hw->ifs_min_val;
4774 hw->current_ifs_val +=
4775 hw->ifs_step_size;
4776 ew32(AIT, hw->current_ifs_val);
4780 if (hw->in_ifs_mode &&
4781 (hw->tx_packet_delta <= MIN_NUM_XMITS)) {
4782 hw->current_ifs_val = 0;
4783 hw->in_ifs_mode = false;
4794 * @hw: Struct containing variables accessed by shared code
4798 void e1000_get_bus_info(struct e1000_hw *hw)
4802 switch (hw->mac_type) {
4805 hw->bus_type = e1000_bus_type_pci;
4806 hw->bus_speed = e1000_bus_speed_unknown;
4807 hw->bus_width = e1000_bus_width_unknown;
4811 hw->bus_type = (status & E1000_STATUS_PCIX_MODE) ?
4814 if (hw->device_id == E1000_DEV_ID_82546EB_QUAD_COPPER) {
4815 hw->bus_speed = (hw->bus_type == e1000_bus_type_pci) ?
4817 } else if (hw->bus_type == e1000_bus_type_pci) {
4818 hw->bus_speed = (status & E1000_STATUS_PCI66) ?
4823 hw->bus_speed = e1000_bus_speed_66;
4826 hw->bus_speed = e1000_bus_speed_100;
4829 hw->bus_speed = e1000_bus_speed_133;
4832 hw->bus_speed = e1000_bus_speed_reserved;
4836 hw->bus_width = (status & E1000_STATUS_BUS64) ?
4844 * @hw: Struct containing variables accessed by shared code
4851 static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value)
4853 unsigned long io_addr = hw->io_base;
4854 unsigned long io_data = hw->io_base + 4;
4856 e1000_io_write(hw, io_addr, offset);
4857 e1000_io_write(hw, io_data, value);
4862 * @hw: Struct containing variables accessed by shared code
4874 static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
4885 if (hw->phy_type == e1000_phy_m88) {
4886 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
4917 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */
4929 e1000_read_phy_reg(hw, agc_reg_array[i], &phy_data);
4974 * @hw: Struct containing variables accessed by shared code
4987 static s32 e1000_check_polarity(struct e1000_hw *hw,
4993 if (hw->phy_type == e1000_phy_m88) {
4995 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
5002 } else if (hw->phy_type == e1000_phy_igp) {
5004 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS,
5016 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG,
5040 * @hw: Struct containing variables accessed by shared code
5050 static s32 e1000_check_downshift(struct e1000_hw *hw)
5055 if (hw->phy_type == e1000_phy_igp) {
5056 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH,
5061 hw->speed_downgraded =
5063 } else if (hw->phy_type == e1000_phy_m88) {
5064 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
5069 hw->speed_downgraded = FIELD_GET(M88E1000_PSSR_DOWNSHIFT,
5083 static s32 e1000_1000Mb_check_cable_length(struct e1000_hw *hw)
5089 ret_val = e1000_get_cable_length(hw, &min_length, &max_length);
5093 if (hw->dsp_config_state != e1000_dsp_config_enabled)
5098 ret_val = e1000_read_phy_reg(hw, dsp_reg_array[i],
5105 ret_val = e1000_write_phy_reg(hw, dsp_reg_array[i],
5110 hw->dsp_config_state = e1000_dsp_config_activated;
5116 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
5122 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS,
5129 hw->ffe_config_state = e1000_ffe_config_active;
5131 ret_val = e1000_write_phy_reg(hw,
5150 * @hw: Struct containing variables accessed by shared code
5160 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
5165 if (hw->phy_type != e1000_phy_igp)
5169 ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex);
5176 ret_val = e1000_1000Mb_check_cable_length(hw);
5181 if (hw->dsp_config_state == e1000_dsp_config_activated) {
5186 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
5192 ret_val = e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
5199 ret_val = e1000_write_phy_reg(hw, 0x0000,
5205 e1000_read_phy_reg(hw, dsp_reg_array[i],
5214 e1000_write_phy_reg(hw, dsp_reg_array[i],
5220 ret_val = e1000_write_phy_reg(hw, 0x0000,
5229 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
5234 hw->dsp_config_state = e1000_dsp_config_enabled;
5237 if (hw->ffe_config_state == e1000_ffe_config_active) {
5242 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
5248 ret_val = e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
5255 ret_val = e1000_write_phy_reg(hw, 0x0000,
5260 e1000_write_phy_reg(hw, IGP01E1000_PHY_DSP_FFE,
5265 ret_val = e1000_write_phy_reg(hw, 0x0000,
5274 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
5279 hw->ffe_config_state = e1000_ffe_config_enabled;
5287 * @hw: Struct containing variables accessed by shared code
5293 static s32 e1000_set_phy_mode(struct e1000_hw *hw)
5298 if ((hw->mac_type == e1000_82545_rev_3) &&
5299 (hw->media_type == e1000_media_type_copper)) {
5301 e1000_read_eeprom(hw, EEPROM_PHY_CLASS_WORD, 1,
5309 e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT,
5314 e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL,
5319 hw->phy_reset_disable = false;
5328 * @hw: Struct containing variables accessed by shared code
5339 static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active)
5344 if (hw->phy_type != e1000_phy_igp)
5351 if (hw->mac_type == e1000_82541_rev_2 ||
5352 hw->mac_type == e1000_82547_rev_2) {
5354 e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data);
5360 if (hw->mac_type == e1000_82541_rev_2 ||
5361 hw->mac_type == e1000_82547_rev_2) {
5364 e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
5375 if (hw->smart_speed == e1000_smart_speed_on) {
5377 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5384 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5388 } else if (hw->smart_speed == e1000_smart_speed_off) {
5390 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5397 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5402 } else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT) ||
5403 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL) ||
5404 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) {
5405 if (hw->mac_type == e1000_82541_rev_2 ||
5406 hw->mac_type == e1000_82547_rev_2) {
5409 e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
5417 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5424 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5434 * @hw: Struct containing variables accessed by shared code
5438 static s32 e1000_set_vco_speed(struct e1000_hw *hw)
5444 switch (hw->mac_type) {
5455 e1000_read_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, &default_page);
5459 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
5463 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
5468 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
5474 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
5478 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
5483 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
5488 e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, default_page);
5497 * @hw: Struct containing variables accessed by shared code
5502 u32 e1000_enable_mng_pass_thru(struct e1000_hw *hw)
5506 if (hw->asf_firmware_present) {
5518 static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw)
5528 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
5531 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
5535 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
5545 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5549 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5563 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
5567 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
5571 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
5575 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
5579 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
5589 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5593 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5606 * @hw: Struct containing variables accessed by shared code
5612 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw)
5620 * @hw: Struct containing variables accessed by shared code
5626 static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw)