chelsio/cxgb3/sge.c

90 enum { TXQ_ETH, TXQ_OFLD, TXQ_CTRL };
731 	qs->txq[TXQ_ETH].cntxt_id = FW_TUNNEL_SGEEC_START + id;
732 	qs->txq[TXQ_ETH].token = FW_TUNNEL_TID_START + id;
1249 	set_bit(TXQ_ETH, &qs->txq_stopped);
1282 	q = &qs->txq[TXQ_ETH];
1311 		    test_and_clear_bit(TXQ_ETH, &qs->txq_stopped)) {
1987 	if (test_bit(TXQ_ETH, &qs->txq_stopped) &&
1988 	    should_restart_tx(&qs->txq[TXQ_ETH]) &&
1989 	    test_and_clear_bit(TXQ_ETH, &qs->txq_stopped)) {
1990 		qs->txq[TXQ_ETH].restarts++;
2222 		clear_bit(TXQ_RUNNING, &qs->txq[TXQ_ETH].flags);
2227 		qs->txq[TXQ_ETH].processed += credits;
2256 		struct sge_txq *txq = &qs->txq[TXQ_ETH];
2916                 tbd[TXQ_ETH] = reclaim_completed_tx(adap, &qs->txq[TXQ_ETH],
2928                       (max(tbd[TXQ_ETH], tbd[TXQ_OFLD]) /
3085 	q->txq[TXQ_ETH].stop_thres = nports *
3126 	ret = t3_sge_init_ecntxt(adapter, q->txq[TXQ_ETH].cntxt_id, USE_GTS,
3127 				 SGE_CNTXT_ETH, id, q->txq[TXQ_ETH].phys_addr,
3128 				 q->txq[TXQ_ETH].size, q->txq[TXQ_ETH].token,
3363 		q->txq_size[TXQ_ETH] = 1024;