chelsio/cxgb/regs.h

36 #define V_CMDQ0_ENABLE(x) ((x) << S_CMDQ0_ENABLE)
40 #define V_CMDQ1_ENABLE(x) ((x) << S_CMDQ1_ENABLE)
44 #define V_FL0_ENABLE(x) ((x) << S_FL0_ENABLE)
48 #define V_FL1_ENABLE(x) ((x) << S_FL1_ENABLE)
52 #define V_CPL_ENABLE(x) ((x) << S_CPL_ENABLE)
56 #define V_RESPONSE_QUEUE_ENABLE(x) ((x) << S_RESPONSE_QUEUE_ENABLE)
61 #define V_CMDQ_PRIORITY(x) ((x) << S_CMDQ_PRIORITY)
62 #define G_CMDQ_PRIORITY(x) (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY)
65 #define V_DISABLE_CMDQ0_GTS(x) ((x) << S_DISABLE_CMDQ0_GTS)
69 #define V_DISABLE_CMDQ1_GTS(x) ((x) << S_DISABLE_CMDQ1_GTS)
73 #define V_DISABLE_FL0_GTS(x) ((x) << S_DISABLE_FL0_GTS)
77 #define V_DISABLE_FL1_GTS(x) ((x) << S_DISABLE_FL1_GTS)
81 #define V_ENABLE_BIG_ENDIAN(x) ((x) << S_ENABLE_BIG_ENDIAN)
85 #define V_FL_SELECTION_CRITERIA(x) ((x) << S_FL_SELECTION_CRITERIA)
89 #define V_ISCSI_COALESCE(x) ((x) << S_ISCSI_COALESCE)
94 #define V_RX_PKT_OFFSET(x) ((x) << S_RX_PKT_OFFSET)
95 #define G_RX_PKT_OFFSET(x) (((x) >> S_RX_PKT_OFFSET) & M_RX_PKT_OFFSET)
98 #define V_VLAN_XTRACT(x) ((x) << S_VLAN_XTRACT)
114 #define V_CMDQ0_SIZE(x) ((x) << S_CMDQ0_SIZE)
115 #define G_CMDQ0_SIZE(x) (((x) >> S_CMDQ0_SIZE) & M_CMDQ0_SIZE)
121 #define V_FL0_SIZE(x) ((x) << S_FL0_SIZE)
122 #define G_FL0_SIZE(x) (((x) >> S_FL0_SIZE) & M_FL0_SIZE)
128 #define V_RESPQ_SIZE(x) ((x) << S_RESPQ_SIZE)
129 #define G_RESPQ_SIZE(x) (((x) >> S_RESPQ_SIZE) & M_RESPQ_SIZE)
137 #define V_FL_THRESHOLD(x) ((x) << S_FL_THRESHOLD)
138 #define G_FL_THRESHOLD(x) (((x) >> S_FL_THRESHOLD) & M_FL_THRESHOLD)
144 #define V_RESPQ_CREDIT(x) ((x) << S_RESPQ_CREDIT)
145 #define G_RESPQ_CREDIT(x) (((x) >> S_RESPQ_CREDIT) & M_RESPQ_CREDIT)
151 #define V_SLEEPING(x) ((x) << S_SLEEPING)
152 #define G_SLEEPING(x) (((x) >> S_SLEEPING) & M_SLEEPING)
158 #define V_INTERRUPT_TIMER_COUNT(x) ((x) << S_INTERRUPT_TIMER_COUNT)
159 #define G_INTERRUPT_TIMER_COUNT(x) (((x) >> S_INTERRUPT_TIMER_COUNT) & M_INTERRUPT_TIMER_COUNT)
165 #define V_CMDQ0_POINTER(x) ((x) << S_CMDQ0_POINTER)
166 #define G_CMDQ0_POINTER(x) (((x) >> S_CMDQ0_POINTER) & M_CMDQ0_POINTER)
169 #define V_CURRENT_GENERATION_BIT(x) ((x) << S_CURRENT_GENERATION_BIT)
176 #define V_CMDQ1_POINTER(x) ((x) << S_CMDQ1_POINTER)
177 #define G_CMDQ1_POINTER(x) (((x) >> S_CMDQ1_POINTER) & M_CMDQ1_POINTER)
183 #define V_FL0_POINTER(x) ((x) << S_FL0_POINTER)
184 #define G_FL0_POINTER(x) (((x) >> S_FL0_POINTER) & M_FL0_POINTER)
190 #define V_FL1_POINTER(x) ((x) << S_FL1_POINTER)
191 #define G_FL1_POINTER(x) (((x) >> S_FL1_POINTER) & M_FL1_POINTER)
197 #define V_DAY(x) ((x) << S_DAY)
198 #define G_DAY(x) (((x) >> S_DAY) & M_DAY)
202 #define V_MONTH(x) ((x) << S_MONTH)
203 #define G_MONTH(x) (((x) >> S_MONTH) & M_MONTH)
209 #define V_CMDQ1_SIZE(x) ((x) << S_CMDQ1_SIZE)
210 #define G_CMDQ1_SIZE(x) (((x) >> S_CMDQ1_SIZE) & M_CMDQ1_SIZE)
216 #define V_FL1_SIZE(x) ((x) << S_FL1_SIZE)
217 #define G_FL1_SIZE(x) (((x) >> S_FL1_SIZE) & M_FL1_SIZE)
222 #define V_RESPQ_EXHAUSTED(x) ((x) << S_RESPQ_EXHAUSTED)
226 #define V_RESPQ_OVERFLOW(x) ((x) << S_RESPQ_OVERFLOW)
230 #define V_FL_EXHAUSTED(x) ((x) << S_FL_EXHAUSTED)
234 #define V_PACKET_TOO_BIG(x) ((x) << S_PACKET_TOO_BIG)
238 #define V_PACKET_MISMATCH(x) ((x) << S_PACKET_MISMATCH)
248 #define V_CLK_ENABLE(x) ((x) << S_CLK_ENABLE)
252 #define V_READY(x) ((x) << S_READY)
257 #define V_READ_TO_WRITE_DELAY(x) ((x) << S_READ_TO_WRITE_DELAY)
258 #define G_READ_TO_WRITE_DELAY(x) (((x) >> S_READ_TO_WRITE_DELAY) & M_READ_TO_WRITE_DELAY)
262 #define V_WRITE_TO_READ_DELAY(x) ((x) << S_WRITE_TO_READ_DELAY)
263 #define G_WRITE_TO_READ_DELAY(x) (((x) >> S_WRITE_TO_READ_DELAY) & M_WRITE_TO_READ_DELAY)
267 #define V_MC3_BANK_CYCLE(x) ((x) << S_MC3_BANK_CYCLE)
268 #define G_MC3_BANK_CYCLE(x) (((x) >> S_MC3_BANK_CYCLE) & M_MC3_BANK_CYCLE)
272 #define V_REFRESH_CYCLE(x) ((x) << S_REFRESH_CYCLE)
273 #define G_REFRESH_CYCLE(x) (((x) >> S_REFRESH_CYCLE) & M_REFRESH_CYCLE)
277 #define V_PRECHARGE_CYCLE(x) ((x) << S_PRECHARGE_CYCLE)
278 #define G_PRECHARGE_CYCLE(x) (((x) >> S_PRECHARGE_CYCLE) & M_PRECHARGE_CYCLE)
281 #define V_ACTIVE_TO_READ_WRITE_DELAY(x) ((x) << S_ACTIVE_TO_READ_WRITE_DELAY)
286 #define V_ACTIVE_TO_PRECHARGE_DELAY(x) ((x) << S_ACTIVE_TO_PRECHARGE_DELAY)
287 #define G_ACTIVE_TO_PRECHARGE_DELAY(x) (((x) >> S_ACTIVE_TO_PRECHARGE_DELAY) & M_ACTIVE_TO_PRECHARGE_DELAY)
291 #define V_WRITE_RECOVERY_DELAY(x) ((x) << S_WRITE_RECOVERY_DELAY)
292 #define G_WRITE_RECOVERY_DELAY(x) (((x) >> S_WRITE_RECOVERY_DELAY) & M_WRITE_RECOVERY_DELAY)
296 #define V_DENSITY(x) ((x) << S_DENSITY)
297 #define G_DENSITY(x) (((x) >> S_DENSITY) & M_DENSITY)
300 #define V_ORGANIZATION(x) ((x) << S_ORGANIZATION)
304 #define V_BANKS(x) ((x) << S_BANKS)
308 #define V_UNREGISTERED(x) ((x) << S_UNREGISTERED)
313 #define V_MC3_WIDTH(x) ((x) << S_MC3_WIDTH)
314 #define G_MC3_WIDTH(x) (((x) >> S_MC3_WIDTH) & M_MC3_WIDTH)
317 #define V_MC3_SLOW(x) ((x) << S_MC3_SLOW)
324 #define V_MC3_MODE(x) ((x) << S_MC3_MODE)
325 #define G_MC3_MODE(x) (((x) >> S_MC3_MODE) & M_MC3_MODE)
328 #define V_BUSY(x) ((x) << S_BUSY)
335 #define V_MC3_EXTENDED_MODE(x) ((x) << S_MC3_EXTENDED_MODE)
336 #define G_MC3_EXTENDED_MODE(x) (((x) >> S_MC3_EXTENDED_MODE) & M_MC3_EXTENDED_MODE)
342 #define V_REFRESH_ENABLE(x) ((x) << S_REFRESH_ENABLE)
347 #define V_REFRESH_DIVISOR(x) ((x) << S_REFRESH_DIVISOR)
348 #define G_REFRESH_DIVISOR(x) (((x) >> S_REFRESH_DIVISOR) & M_REFRESH_DIVISOR)
353 #define V_MASTER_DLL_RESET(x) ((x) << S_MASTER_DLL_RESET)
358 #define V_MASTER_DLL_TAP_COUNT(x) ((x) << S_MASTER_DLL_TAP_COUNT)
359 #define G_MASTER_DLL_TAP_COUNT(x) (((x) >> S_MASTER_DLL_TAP_COUNT) & M_MASTER_DLL_TAP_COUNT)
362 #define V_MASTER_DLL_LOCKED(x) ((x) << S_MASTER_DLL_LOCKED)
366 #define V_MASTER_DLL_MAX_TAP_COUNT(x) ((x) << S_MASTER_DLL_MAX_TAP_COUNT)
371 #define V_MASTER_DLL_TAP_COUNT_OFFSET(x) ((x) << S_MASTER_DLL_TAP_COUNT_OFFSET)
372 #define G_MASTER_DLL_TAP_COUNT_OFFSET(x) (((x) >> S_MASTER_DLL_TAP_COUNT_OFFSET) & M_MASTER_DLL_TAP_COUNT_OFFSET)
375 #define V_SLAVE_DLL_RESET(x) ((x) << S_SLAVE_DLL_RESET)
380 #define V_SLAVE_DLL_DELTA(x) ((x) << S_SLAVE_DLL_DELTA)
381 #define G_SLAVE_DLL_DELTA(x) (((x) >> S_SLAVE_DLL_DELTA) & M_SLAVE_DLL_DELTA)
385 #define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x) ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)
386 #define G_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x) (((x) >> S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) & M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)
389 #define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(x) ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE)
394 #define V_SLAVE_DELAY_LINE_TAP_COUNT(x) ((x) << S_SLAVE_DELAY_LINE_TAP_COUNT)
395 #define G_SLAVE_DELAY_LINE_TAP_COUNT(x) (((x) >> S_SLAVE_DELAY_LINE_TAP_COUNT) & M_SLAVE_DELAY_LINE_TAP_COUNT)
400 #define V_ECC_GENERATION_ENABLE(x) ((x) << S_ECC_GENERATION_ENABLE)
404 #define V_ECC_CHECK_ENABLE(x) ((x) << S_ECC_CHECK_ENABLE)
409 #define V_CORRECTABLE_ERROR_COUNT(x) ((x) << S_CORRECTABLE_ERROR_COUNT)
410 #define G_CORRECTABLE_ERROR_COUNT(x) (((x) >> S_CORRECTABLE_ERROR_COUNT) & M_CORRECTABLE_ERROR_COUNT)
414 #define V_UNCORRECTABLE_ERROR_COUNT(x) ((x) << S_UNCORRECTABLE_ERROR_COUNT)
415 #define G_UNCORRECTABLE_ERROR_COUNT(x) (((x) >> S_UNCORRECTABLE_ERROR_COUNT) & M_UNCORRECTABLE_ERROR_COUNT)
421 #define V_MC3_CE_ADDR(x) ((x) << S_MC3_CE_ADDR)
422 #define G_MC3_CE_ADDR(x) (((x) >> S_MC3_CE_ADDR) & M_MC3_CE_ADDR)
433 #define V_MC3_UE_ADDR(x) ((x) << S_MC3_UE_ADDR)
434 #define G_MC3_UE_ADDR(x) (((x) >> S_MC3_UE_ADDR) & M_MC3_UE_ADDR)
450 #define V_BACK_DOOR_OPERATION(x) ((x) << S_BACK_DOOR_OPERATION)
459 #define V_OP(x) ((x) << S_OP)
464 #define V_DATA_PATTERN(x) ((x) << S_DATA_PATTERN)
465 #define G_DATA_PATTERN(x) (((x) >> S_DATA_PATTERN) & M_DATA_PATTERN)
468 #define V_CONTINUOUS(x) ((x) << S_CONTINUOUS)
474 #define V_MC3_CORR_ERR(x) ((x) << S_MC3_CORR_ERR)
478 #define V_MC3_UNCORR_ERR(x) ((x) << S_MC3_UNCORR_ERR)
483 #define V_MC3_PARITY_ERR(x) ((x) << S_MC3_PARITY_ERR)
484 #define G_MC3_PARITY_ERR(x) (((x) >> S_MC3_PARITY_ERR) & M_MC3_PARITY_ERR)
487 #define V_MC3_ADDR_ERR(x) ((x) << S_MC3_ADDR_ERR)
496 #define V_POWER_UP(x) ((x) << S_POWER_UP)
501 #define V_MC4_BANK_CYCLE(x) ((x) << S_MC4_BANK_CYCLE)
502 #define G_MC4_BANK_CYCLE(x) (((x) >> S_MC4_BANK_CYCLE) & M_MC4_BANK_CYCLE)
505 #define V_MC4_NARROW(x) ((x) << S_MC4_NARROW)
509 #define V_MC4_SLOW(x) ((x) << S_MC4_SLOW)
514 #define V_MC4A_WIDTH(x) ((x) << S_MC4A_WIDTH)
515 #define G_MC4A_WIDTH(x) (((x) >> S_MC4A_WIDTH) & M_MC4A_WIDTH)
518 #define V_MC4A_SLOW(x) ((x) << S_MC4A_SLOW)
525 #define V_MC4_MODE(x) ((x) << S_MC4_MODE)
526 #define G_MC4_MODE(x) (((x) >> S_MC4_MODE) & M_MC4_MODE)
532 #define V_MC4_EXTENDED_MODE(x) ((x) << S_MC4_EXTENDED_MODE)
533 #define G_MC4_EXTENDED_MODE(x) (((x) >> S_MC4_EXTENDED_MODE) & M_MC4_EXTENDED_MODE)
542 #define V_MC4_CE_ADDR(x) ((x) << S_MC4_CE_ADDR)
543 #define G_MC4_CE_ADDR(x) (((x) >> S_MC4_CE_ADDR) & M_MC4_CE_ADDR)
554 #define V_MC4_UE_ADDR(x) ((x) << S_MC4_UE_ADDR)
555 #define G_MC4_UE_ADDR(x) (((x) >> S_MC4_UE_ADDR) & M_MC4_UE_ADDR)
566 #define V_MC4_BACK_DOOR_ADDR(x) ((x) << S_MC4_BACK_DOOR_ADDR)
567 #define G_MC4_BACK_DOOR_ADDR(x) (((x) >> S_MC4_BACK_DOOR_ADDR) & M_MC4_BACK_DOOR_ADDR)
577 #define V_OPERATION(x) ((x) << S_OPERATION)
587 #define V_MC4_CORR_ERR(x) ((x) << S_MC4_CORR_ERR)
591 #define V_MC4_UNCORR_ERR(x) ((x) << S_MC4_UNCORR_ERR)
595 #define V_MC4_ADDR_ERR(x) ((x) << S_MC4_ADDR_ERR)
605 #define V_TPI_ADDRESS(x) ((x) << S_TPI_ADDRESS)
606 #define G_TPI_ADDRESS(x) (((x) >> S_TPI_ADDRESS) & M_TPI_ADDRESS)
613 #define V_TPIWR(x) ((x) << S_TPIWR)
617 #define V_TPIRDY(x) ((x) << S_TPIRDY)
621 #define V_INT_DIR(x) ((x) << S_INT_DIR)
628 #define V_TPIPAR(x) ((x) << S_TPIPAR)
629 #define G_TPIPAR(x) (((x) >> S_TPIPAR) & M_TPIPAR)
636 #define V_TP_IN_CSPI_TUNNEL(x) ((x) << S_TP_IN_CSPI_TUNNEL)
640 #define V_TP_IN_CSPI_ETHERNET(x) ((x) << S_TP_IN_CSPI_ETHERNET)
644 #define V_TP_IN_CSPI_CPL(x) ((x) << S_TP_IN_CSPI_CPL)
648 #define V_TP_IN_CSPI_POS(x) ((x) << S_TP_IN_CSPI_POS)
652 #define V_TP_IN_CSPI_CHECK_IP_CSUM(x) ((x) << S_TP_IN_CSPI_CHECK_IP_CSUM)
656 #define V_TP_IN_CSPI_CHECK_TCP_CSUM(x) ((x) << S_TP_IN_CSPI_CHECK_TCP_CSUM)
660 #define V_TP_IN_ESPI_TUNNEL(x) ((x) << S_TP_IN_ESPI_TUNNEL)
664 #define V_TP_IN_ESPI_ETHERNET(x) ((x) << S_TP_IN_ESPI_ETHERNET)
668 #define V_TP_IN_ESPI_CPL(x) ((x) << S_TP_IN_ESPI_CPL)
672 #define V_TP_IN_ESPI_POS(x) ((x) << S_TP_IN_ESPI_POS)
676 #define V_TP_IN_ESPI_CHECK_IP_CSUM(x) ((x) << S_TP_IN_ESPI_CHECK_IP_CSUM)
680 #define V_TP_IN_ESPI_CHECK_TCP_CSUM(x) ((x) << S_TP_IN_ESPI_CHECK_TCP_CSUM)
684 #define V_OFFLOAD_DISABLE(x) ((x) << S_OFFLOAD_DISABLE)
690 #define V_TP_OUT_C_ETH(x) ((x) << S_TP_OUT_C_ETH)
694 #define V_TP_OUT_CSPI_CPL(x) ((x) << S_TP_OUT_CSPI_CPL)
698 #define V_TP_OUT_CSPI_POS(x) ((x) << S_TP_OUT_CSPI_POS)
702 #define V_TP_OUT_CSPI_GENERATE_IP_CSUM(x) ((x) << S_TP_OUT_CSPI_GENERATE_IP_CSUM)
706 #define V_TP_OUT_CSPI_GENERATE_TCP_CSUM(x) ((x) << S_TP_OUT_CSPI_GENERATE_TCP_CSUM)
710 #define V_TP_OUT_ESPI_ETHERNET(x) ((x) << S_TP_OUT_ESPI_ETHERNET)
714 #define V_TP_OUT_ESPI_TAG_ETHERNET(x) ((x) << S_TP_OUT_ESPI_TAG_ETHERNET)
718 #define V_TP_OUT_ESPI_CPL(x) ((x) << S_TP_OUT_ESPI_CPL)
722 #define V_TP_OUT_ESPI_POS(x) ((x) << S_TP_OUT_ESPI_POS)
726 #define V_TP_OUT_ESPI_GENERATE_IP_CSUM(x) ((x) << S_TP_OUT_ESPI_GENERATE_IP_CSUM)
730 #define V_TP_OUT_ESPI_GENERATE_TCP_CSUM(x) ((x) << S_TP_OUT_ESPI_GENERATE_TCP_CSUM)
737 #define V_IP_TTL(x) ((x) << S_IP_TTL)
738 #define G_IP_TTL(x) (((x) >> S_IP_TTL) & M_IP_TTL)
742 #define V_TCAM_SERVER_REGION_USAGE(x) ((x) << S_TCAM_SERVER_REGION_USAGE)
743 #define G_TCAM_SERVER_REGION_USAGE(x) (((x) >> S_TCAM_SERVER_REGION_USAGE) & M_TCAM_SERVER_REGION_USAGE)
746 #define V_QOS_MAPPING(x) ((x) << S_QOS_MAPPING)
750 #define V_TCP_CSUM(x) ((x) << S_TCP_CSUM)
754 #define V_UDP_CSUM(x) ((x) << S_UDP_CSUM)
758 #define V_IP_CSUM(x) ((x) << S_IP_CSUM)
762 #define V_IP_ID_SPLIT(x) ((x) << S_IP_ID_SPLIT)
766 #define V_PATH_MTU(x) ((x) << S_PATH_MTU)
771 #define V_5TUPLE_LOOKUP(x) ((x) << S_5TUPLE_LOOKUP)
772 #define G_5TUPLE_LOOKUP(x) (((x) >> S_5TUPLE_LOOKUP) & M_5TUPLE_LOOKUP)
775 #define V_IP_FRAGMENT_DROP(x) ((x) << S_IP_FRAGMENT_DROP)
779 #define V_PING_DROP(x) ((x) << S_PING_DROP)
783 #define V_PROTECT_MODE(x) ((x) << S_PROTECT_MODE)
787 #define V_SYN_COOKIE_ALGORITHM(x) ((x) << S_SYN_COOKIE_ALGORITHM)
791 #define V_ATTACK_FILTER(x) ((x) << S_ATTACK_FILTER)
795 #define V_INTERFACE_TYPE(x) ((x) << S_INTERFACE_TYPE)
799 #define V_DISABLE_RX_FLOW_CONTROL(x) ((x) << S_DISABLE_RX_FLOW_CONTROL)
804 #define V_SYN_COOKIE_PARAMETER(x) ((x) << S_SYN_COOKIE_PARAMETER)
805 #define G_SYN_COOKIE_PARAMETER(x) (((x) >> S_SYN_COOKIE_PARAMETER) & M_SYN_COOKIE_PARAMETER)
813 #define V_CM_MEMMGR_BASE(x) ((x) << S_CM_MEMMGR_BASE)
814 #define G_CM_MEMMGR_BASE(x) (((x) >> S_CM_MEMMGR_BASE) & M_CM_MEMMGR_BASE)
820 #define V_CM_TIMER_BASE(x) ((x) << S_CM_TIMER_BASE)
821 #define G_CM_TIMER_BASE(x) (((x) >> S_CM_TIMER_BASE) & M_CM_TIMER_BASE)
835 #define V_TIMESTAMP(x) ((x) << S_TIMESTAMP)
836 #define G_TIMESTAMP(x) (((x) >> S_TIMESTAMP) & M_TIMESTAMP)
840 #define V_WINDOW_SCALE(x) ((x) << S_WINDOW_SCALE)
841 #define G_WINDOW_SCALE(x) (((x) >> S_WINDOW_SCALE) & M_WINDOW_SCALE)
845 #define V_SACK(x) ((x) << S_SACK)
846 #define G_SACK(x) (((x) >> S_SACK) & M_SACK)
850 #define V_ECN(x) ((x) << S_ECN)
851 #define G_ECN(x) (((x) >> S_ECN) & M_ECN)
855 #define V_SACK_ALGORITHM(x) ((x) << S_SACK_ALGORITHM)
856 #define G_SACK_ALGORITHM(x) (((x) >> S_SACK_ALGORITHM) & M_SACK_ALGORITHM)
859 #define V_MSS(x) ((x) << S_MSS)
864 #define V_DEFAULT_PEER_MSS(x) ((x) << S_DEFAULT_PEER_MSS)
865 #define G_DEFAULT_PEER_MSS(x) (((x) >> S_DEFAULT_PEER_MSS) & M_DEFAULT_PEER_MSS)
870 #define V_DACK_MODE(x) ((x) << S_DACK_MODE)
874 #define V_DACK_AUTO_MGMT(x) ((x) << S_DACK_AUTO_MGMT)
878 #define V_DACK_AUTO_CAREFUL(x) ((x) << S_DACK_AUTO_CAREFUL)
883 #define V_DACK_MSS_SELECTOR(x) ((x) << S_DACK_MSS_SELECTOR)
884 #define G_DACK_MSS_SELECTOR(x) (((x) >> S_DACK_MSS_SELECTOR) & M_DACK_MSS_SELECTOR)
888 #define V_DACK_BYTE_THRESHOLD(x) ((x) << S_DACK_BYTE_THRESHOLD)
889 #define G_DACK_BYTE_THRESHOLD(x) (((x) >> S_DACK_BYTE_THRESHOLD) & M_DACK_BYTE_THRESHOLD)
895 #define V_TP_ACCESS_LATENCY(x) ((x) << S_TP_ACCESS_LATENCY)
896 #define G_TP_ACCESS_LATENCY(x) (((x) >> S_TP_ACCESS_LATENCY) & M_TP_ACCESS_LATENCY)
899 #define V_HELD_FIN_DISABLE(x) ((x) << S_HELD_FIN_DISABLE)
903 #define V_DDP_FC_ENABLE(x) ((x) << S_DDP_FC_ENABLE)
907 #define V_RDMA_ERR_ENABLE(x) ((x) << S_RDMA_ERR_ENABLE)
911 #define V_FAST_PDU_DELIVERY(x) ((x) << S_FAST_PDU_DELIVERY)
915 #define V_CLEAR_FIN(x) ((x) << S_CLEAR_FIN)
919 #define V_DIS_TX_FILL_WIN_PUSH(x) ((x) << S_DIS_TX_FILL_WIN_PUSH)
924 #define V_TP_PC_REV(x) ((x) << S_TP_PC_REV)
925 #define G_TP_PC_REV(x) (((x) >> S_TP_PC_REV) & M_TP_PC_REV)
931 #define V_ELEMENT0(x) ((x) << S_ELEMENT0)
932 #define G_ELEMENT0(x) (((x) >> S_ELEMENT0) & M_ELEMENT0)
936 #define V_ELEMENT1(x) ((x) << S_ELEMENT1)
937 #define G_ELEMENT1(x) (((x) >> S_ELEMENT1) & M_ELEMENT1)
941 #define V_ELEMENT2(x) ((x) << S_ELEMENT2)
942 #define G_ELEMENT2(x) (((x) >> S_ELEMENT2) & M_ELEMENT2)
946 #define V_ELEMENT3(x) ((x) << S_ELEMENT3)
947 #define G_ELEMENT3(x) (((x) >> S_ELEMENT3) & M_ELEMENT3)
956 #define V_VAR_MULT(x) ((x) << S_VAR_MULT)
957 #define G_VAR_MULT(x) (((x) >> S_VAR_MULT) & M_VAR_MULT)
961 #define V_VAR_GAIN(x) ((x) << S_VAR_GAIN)
962 #define G_VAR_GAIN(x) (((x) >> S_VAR_GAIN) & M_VAR_GAIN)
966 #define V_SRTT_GAIN(x) ((x) << S_SRTT_GAIN)
967 #define G_SRTT_GAIN(x) (((x) >> S_SRTT_GAIN) & M_SRTT_GAIN)
971 #define V_RTTVAR_INIT(x) ((x) << S_RTTVAR_INIT)
972 #define G_RTTVAR_INIT(x) (((x) >> S_RTTVAR_INIT) & M_RTTVAR_INIT)
976 #define V_DUP_THRESH(x) ((x) << S_DUP_THRESH)
977 #define G_DUP_THRESH(x) (((x) >> S_DUP_THRESH) & M_DUP_THRESH)
981 #define V_INIT_CONG_WIN(x) ((x) << S_INIT_CONG_WIN)
982 #define G_INIT_CONG_WIN(x) (((x) >> S_INIT_CONG_WIN) & M_INIT_CONG_WIN)
988 #define V_INITIAL_SLOW_START_THRESHOLD(x) ((x) << S_INITIAL_SLOW_START_THRESHOLD)
989 #define G_INITIAL_SLOW_START_THRESHOLD(x) (((x) >> S_INITIAL_SLOW_START_THRESHOLD) & M_INITIAL_SLOW_START_THRESHOLD)
993 #define V_RECEIVE_BUFFER_SIZE(x) ((x) << S_RECEIVE_BUFFER_SIZE)
994 #define G_RECEIVE_BUFFER_SIZE(x) (((x) >> S_RECEIVE_BUFFER_SIZE) & M_RECEIVE_BUFFER_SIZE)
1000 #define V_RX_COALESCE_SIZE(x) ((x) << S_RX_COALESCE_SIZE)
1001 #define G_RX_COALESCE_SIZE(x) (((x) >> S_RX_COALESCE_SIZE) & M_RX_COALESCE_SIZE)
1005 #define V_MAX_RX_SIZE(x) ((x) << S_MAX_RX_SIZE)
1006 #define G_MAX_RX_SIZE(x) (((x) >> S_MAX_RX_SIZE) & M_MAX_RX_SIZE)
1011 #define V_RX_COALESCING_PSH_DELIVER(x) ((x) << S_RX_COALESCING_PSH_DELIVER)
1015 #define V_RX_COALESCING_ENABLE(x) ((x) << S_RX_COALESCING_ENABLE)
1019 #define V_TAHOE_ENABLE(x) ((x) << S_TAHOE_ENABLE)
1024 #define V_MAX_REORDER_FRAGMENTS(x) ((x) << S_MAX_REORDER_FRAGMENTS)
1025 #define G_MAX_REORDER_FRAGMENTS(x) (((x) >> S_MAX_REORDER_FRAGMENTS) & M_MAX_REORDER_FRAGMENTS)
1031 #define V_DELAYED_ACK_TIMER_RESOLUTION(x) ((x) << S_DELAYED_ACK_TIMER_RESOLUTION)
1032 #define G_DELAYED_ACK_TIMER_RESOLUTION(x) (((x) >> S_DELAYED_ACK_TIMER_RESOLUTION) & M_DELAYED_ACK_TIMER_RESOLUTION)
1036 #define V_GENERIC_TIMER_RESOLUTION(x) ((x) << S_GENERIC_TIMER_RESOLUTION)
1037 #define G_GENERIC_TIMER_RESOLUTION(x) (((x) >> S_GENERIC_TIMER_RESOLUTION) & M_GENERIC_TIMER_RESOLUTION)
1043 #define V_2MSL(x) ((x) << S_2MSL)
1044 #define G_2MSL(x) (((x) >> S_2MSL) & M_2MSL)
1050 #define V_RETRANSMIT_TIMER_MIN(x) ((x) << S_RETRANSMIT_TIMER_MIN)
1051 #define G_RETRANSMIT_TIMER_MIN(x) (((x) >> S_RETRANSMIT_TIMER_MIN) & M_RETRANSMIT_TIMER_MIN)
1057 #define V_RETRANSMIT_TIMER_MAX(x) ((x) << S_RETRANSMIT_TIMER_MAX)
1058 #define G_RETRANSMIT_TIMER_MAX(x) (((x) >> S_RETRANSMIT_TIMER_MAX) & M_RETRANSMIT_TIMER_MAX)
1064 #define V_PERSIST_TIMER_MIN(x) ((x) << S_PERSIST_TIMER_MIN)
1065 #define G_PERSIST_TIMER_MIN(x) (((x) >> S_PERSIST_TIMER_MIN) & M_PERSIST_TIMER_MIN)
1071 #define V_PERSIST_TIMER_MAX(x) ((x) << S_PERSIST_TIMER_MAX)
1072 #define G_PERSIST_TIMER_MAX(x) (((x) >> S_PERSIST_TIMER_MAX) & M_PERSIST_TIMER_MAX)
1078 #define V_KEEP_ALIVE_IDLE_TIME(x) ((x) << S_KEEP_ALIVE_IDLE_TIME)
1079 #define G_KEEP_ALIVE_IDLE_TIME(x) (((x) >> S_KEEP_ALIVE_IDLE_TIME) & M_KEEP_ALIVE_IDLE_TIME)
1085 #define V_KEEP_ALIVE_INTERVAL_TIME(x) ((x) << S_KEEP_ALIVE_INTERVAL_TIME)
1086 #define G_KEEP_ALIVE_INTERVAL_TIME(x) (((x) >> S_KEEP_ALIVE_INTERVAL_TIME) & M_KEEP_ALIVE_INTERVAL_TIME)
1092 #define V_INITIAL_SRTT(x) ((x) << S_INITIAL_SRTT)
1093 #define G_INITIAL_SRTT(x) (((x) >> S_INITIAL_SRTT) & M_INITIAL_SRTT)
1099 #define V_DELAYED_ACK_TIME(x) ((x) << S_DELAYED_ACK_TIME)
1100 #define G_DELAYED_ACK_TIME(x) (((x) >> S_DELAYED_ACK_TIME) & M_DELAYED_ACK_TIME)
1106 #define V_FINWAIT2_TIME(x) ((x) << S_FINWAIT2_TIME)
1107 #define G_FINWAIT2_TIME(x) (((x) >> S_FINWAIT2_TIME) & M_FINWAIT2_TIME)
1113 #define V_FAST_FINWAIT2_TIME(x) ((x) << S_FAST_FINWAIT2_TIME)
1114 #define G_FAST_FINWAIT2_TIME(x) (((x) >> S_FAST_FINWAIT2_TIME) & M_FAST_FINWAIT2_TIME)
1120 #define V_KEEPALIVE_MAX(x) ((x) << S_KEEPALIVE_MAX)
1121 #define G_KEEPALIVE_MAX(x) (((x) >> S_KEEPALIVE_MAX) & M_KEEPALIVE_MAX)
1125 #define V_WINDOWPROBE_MAX(x) ((x) << S_WINDOWPROBE_MAX)
1126 #define G_WINDOWPROBE_MAX(x) (((x) >> S_WINDOWPROBE_MAX) & M_WINDOWPROBE_MAX)
1130 #define V_RETRANSMISSION_MAX(x) ((x) << S_RETRANSMISSION_MAX)
1131 #define G_RETRANSMISSION_MAX(x) (((x) >> S_RETRANSMISSION_MAX) & M_RETRANSMISSION_MAX)
1135 #define V_SYN_MAX(x) ((x) << S_SYN_MAX)
1136 #define G_SYN_MAX(x) (((x) >> S_SYN_MAX) & M_SYN_MAX)
1142 #define V_L3_VALUE(x) ((x) << S_L3_VALUE)
1143 #define G_L3_VALUE(x) (((x) >> S_L3_VALUE) & M_L3_VALUE)
1163 #define V_TP_RESET(x) ((x) << S_TP_RESET)
1167 #define V_CM_MEMMGR_INIT(x) ((x) << S_CM_MEMMGR_INIT)
1178 #define V_CM_MEMMGR_RX_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_RX_FREE_LIST_BASE)
1179 #define G_CM_MEMMGR_RX_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_RX_FREE_LIST_BASE) & M_CM_MEMMGR_RX_FREE_LIST_BASE)
1185 #define V_CM_MEMMGR_TX_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_TX_FREE_LIST_BASE)
1186 #define G_CM_MEMMGR_TX_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_TX_FREE_LIST_BASE) & M_CM_MEMMGR_TX_FREE_LIST_BASE)
1192 #define V_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)
1193 #define G_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) & M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)
1199 #define V_CM_MEMMGR_MAX_PSTRUCT(x) ((x) << S_CM_MEMMGR_MAX_PSTRUCT)
1200 #define G_CM_MEMMGR_MAX_PSTRUCT(x) (((x) >> S_CM_MEMMGR_MAX_PSTRUCT) & M_CM_MEMMGR_MAX_PSTRUCT)
1205 #define V_TX_FREE_LIST_EMPTY(x) ((x) << S_TX_FREE_LIST_EMPTY)
1209 #define V_RX_FREE_LIST_EMPTY(x) ((x) << S_RX_FREE_LIST_EMPTY)
1216 #define V_DISABLE_PAST_TIMER_INSERTION(x) ((x) << S_DISABLE_PAST_TIMER_INSERTION)
1221 #define V_MODULATION_TIMER_SEPARATOR(x) ((x) << S_MODULATION_TIMER_SEPARATOR)
1222 #define G_MODULATION_TIMER_SEPARATOR(x) (((x) >> S_MODULATION_TIMER_SEPARATOR) & M_MODULATION_TIMER_SEPARATOR)
1226 #define V_GLOBAL_TIMER_SEPARATOR(x) ((x) << S_GLOBAL_TIMER_SEPARATOR)
1227 #define G_GLOBAL_TIMER_SEPARATOR(x) (((x) >> S_GLOBAL_TIMER_SEPARATOR) & M_GLOBAL_TIMER_SEPARATOR)
1234 #define V_ENABLE_TX_DROP(x) ((x) << S_ENABLE_TX_DROP)
1238 #define V_ENABLE_TX_ERROR(x) ((x) << S_ENABLE_TX_ERROR)
1243 #define V_DROP_TICKS_CNT(x) ((x) << S_DROP_TICKS_CNT)
1244 #define G_DROP_TICKS_CNT(x) (((x) >> S_DROP_TICKS_CNT) & M_DROP_TICKS_CNT)
1248 #define V_NUM_PKTS_DROPPED(x) ((x) << S_NUM_PKTS_DROPPED)
1249 #define G_NUM_PKTS_DROPPED(x) (((x) >> S_NUM_PKTS_DROPPED) & M_NUM_PKTS_DROPPED)
1257 #define V_USE_ROUTE_TABLE(x) ((x) << S_USE_ROUTE_TABLE)
1261 #define V_ENABLE_CSPI(x) ((x) << S_ENABLE_CSPI)
1265 #define V_ENABLE_PCIX(x) ((x) << S_ENABLE_PCIX)
1272 #define V_ROUTE_TABLE_INDEX(x) ((x) << S_ROUTE_TABLE_INDEX)
1273 #define G_ROUTE_TABLE_INDEX(x) (((x) >> S_ROUTE_TABLE_INDEX) & M_ROUTE_TABLE_INDEX)
1280 #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE)
1281 #define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & M_CPL_OPCODE)
1286 #define V_ZEROROUTEERROR(x) ((x) << S_ZEROROUTEERROR)
1290 #define V_CSPIFRAMINGERROR(x) ((x) << S_CSPIFRAMINGERROR)
1294 #define V_SGEFRAMINGERROR(x) ((x) << S_SGEFRAMINGERROR)
1298 #define V_TPFRAMINGERROR(x) ((x) << S_TPFRAMINGERROR)
1310 #define V_CALENDARLENGTH(x) ((x) << S_CALENDARLENGTH)
1311 #define G_CALENDARLENGTH(x) (((x) >> S_CALENDARLENGTH) & M_CALENDARLENGTH)
1316 #define V_FIFOSTATUSENABLE(x) ((x) << S_FIFOSTATUSENABLE)
1323 #define V_MAXBURST1(x) ((x) << S_MAXBURST1)
1324 #define G_MAXBURST1(x) (((x) >> S_MAXBURST1) & M_MAXBURST1)
1328 #define V_MAXBURST2(x) ((x) << S_MAXBURST2)
1329 #define G_MAXBURST2(x) (((x) >> S_MAXBURST2) & M_MAXBURST2)
1335 #define V_CSPI_TRAIN_ALPHA(x) ((x) << S_CSPI_TRAIN_ALPHA)
1336 #define G_CSPI_TRAIN_ALPHA(x) (((x) >> S_CSPI_TRAIN_ALPHA) & M_CSPI_TRAIN_ALPHA)
1340 #define V_CSPI_TRAIN_DATA_MAXT(x) ((x) << S_CSPI_TRAIN_DATA_MAXT)
1341 #define G_CSPI_TRAIN_DATA_MAXT(x) (((x) >> S_CSPI_TRAIN_DATA_MAXT) & M_CSPI_TRAIN_DATA_MAXT)
1346 #define V_DIP4ERR(x) ((x) << S_DIP4ERR)
1350 #define V_RXDROP(x) ((x) << S_RXDROP)
1354 #define V_TXDROP(x) ((x) << S_TXDROP)
1358 #define V_RXOVERFLOW(x) ((x) << S_RXOVERFLOW)
1362 #define V_RAMPARITYERR(x) ((x) << S_RAMPARITYERR)
1372 #define V_SCHTOKEN0(x) ((x) << S_SCHTOKEN0)
1373 #define G_SCHTOKEN0(x) (((x) >> S_SCHTOKEN0) & M_SCHTOKEN0)
1379 #define V_SCHTOKEN1(x) ((x) << S_SCHTOKEN1)
1380 #define G_SCHTOKEN1(x) (((x) >> S_SCHTOKEN1) & M_SCHTOKEN1)
1386 #define V_SCHTOKEN2(x) ((x) << S_SCHTOKEN2)
1387 #define G_SCHTOKEN2(x) (((x) >> S_SCHTOKEN2) & M_SCHTOKEN2)
1393 #define V_SCHTOKEN3(x) ((x) << S_SCHTOKEN3)
1394 #define G_SCHTOKEN3(x) (((x) >> S_SCHTOKEN3) & M_SCHTOKEN3)
1400 #define V_ALMOSTEMPTY(x) ((x) << S_ALMOSTEMPTY)
1401 #define G_ALMOSTEMPTY(x) (((x) >> S_ALMOSTEMPTY) & M_ALMOSTEMPTY)
1407 #define V_ALMOSTFULL(x) ((x) << S_ALMOSTFULL)
1408 #define G_ALMOSTFULL(x) (((x) >> S_ALMOSTFULL) & M_ALMOSTFULL)
1415 #define V_RX_NPORTS(x) ((x) << S_RX_NPORTS)
1416 #define G_RX_NPORTS(x) (((x) >> S_RX_NPORTS) & M_RX_NPORTS)
1420 #define V_TX_NPORTS(x) ((x) << S_TX_NPORTS)
1421 #define G_TX_NPORTS(x) (((x) >> S_TX_NPORTS) & M_TX_NPORTS)
1426 #define V_RXSTATUSENABLE(x) ((x) << S_RXSTATUSENABLE)
1430 #define V_TXDROPENABLE(x) ((x) << S_TXDROPENABLE)
1434 #define V_RXENDIANMODE(x) ((x) << S_RXENDIANMODE)
1438 #define V_TXENDIANMODE(x) ((x) << S_TXENDIANMODE)
1442 #define V_INTEL1010MODE(x) ((x) << S_INTEL1010MODE)
1450 #define V_MAXTRAINALPHA(x) ((x) << S_MAXTRAINALPHA)
1451 #define G_MAXTRAINALPHA(x) (((x) >> S_MAXTRAINALPHA) & M_MAXTRAINALPHA)
1455 #define V_MAXTRAINDATA(x) ((x) << S_MAXTRAINDATA)
1456 #define G_MAXTRAINDATA(x) (((x) >> S_MAXTRAINDATA) & M_MAXTRAINDATA)
1462 #define V_RXFIFOPARITYERROR(x) ((x) << S_RXFIFOPARITYERROR)
1463 #define G_RXFIFOPARITYERROR(x) (((x) >> S_RXFIFOPARITYERROR) & M_RXFIFOPARITYERROR)
1467 #define V_TXFIFOPARITYERROR(x) ((x) << S_TXFIFOPARITYERROR)
1468 #define G_TXFIFOPARITYERROR(x) (((x) >> S_TXFIFOPARITYERROR) & M_TXFIFOPARITYERROR)
1472 #define V_RXFIFOOVERFLOW(x) ((x) << S_RXFIFOOVERFLOW)
1473 #define G_RXFIFOOVERFLOW(x) (((x) >> S_RXFIFOOVERFLOW) & M_RXFIFOOVERFLOW)
1479 #define V_TXPORT0DROPCNT(x) ((x) << S_TXPORT0DROPCNT)
1480 #define G_TXPORT0DROPCNT(x) (((x) >> S_TXPORT0DROPCNT) & M_TXPORT0DROPCNT)
1484 #define V_TXPORT1DROPCNT(x) ((x) << S_TXPORT1DROPCNT)
1485 #define G_TXPORT1DROPCNT(x) (((x) >> S_TXPORT1DROPCNT) & M_TXPORT1DROPCNT)
1491 #define V_TXPORT2DROPCNT(x) ((x) << S_TXPORT2DROPCNT)
1492 #define G_TXPORT2DROPCNT(x) (((x) >> S_TXPORT2DROPCNT) & M_TXPORT2DROPCNT)
1496 #define V_TXPORT3DROPCNT(x) ((x) << S_TXPORT3DROPCNT)
1497 #define G_TXPORT3DROPCNT(x) (((x) >> S_TXPORT3DROPCNT) & M_TXPORT3DROPCNT)
1503 #define V_RXPORT0DROPCNT(x) ((x) << S_RXPORT0DROPCNT)
1504 #define G_RXPORT0DROPCNT(x) (((x) >> S_RXPORT0DROPCNT) & M_RXPORT0DROPCNT)
1508 #define V_RXPORT1DROPCNT(x) ((x) << S_RXPORT1DROPCNT)
1509 #define G_RXPORT1DROPCNT(x) (((x) >> S_RXPORT1DROPCNT) & M_RXPORT1DROPCNT)
1515 #define V_RXPORT2DROPCNT(x) ((x) << S_RXPORT2DROPCNT)
1516 #define G_RXPORT2DROPCNT(x) (((x) >> S_RXPORT2DROPCNT) & M_RXPORT2DROPCNT)
1520 #define V_RXPORT3DROPCNT(x) ((x) << S_RXPORT3DROPCNT)
1521 #define G_RXPORT3DROPCNT(x) (((x) >> S_RXPORT3DROPCNT) & M_RXPORT3DROPCNT)
1527 #define V_DIP4ERRORCNT(x) ((x) << S_DIP4ERRORCNT)
1528 #define G_DIP4ERRORCNT(x) (((x) >> S_DIP4ERRORCNT) & M_DIP4ERRORCNT)
1532 #define V_DIP4ERRORCNTSHADOW(x) ((x) << S_DIP4ERRORCNTSHADOW)
1533 #define G_DIP4ERRORCNTSHADOW(x) (((x) >> S_DIP4ERRORCNTSHADOW) & M_DIP4ERRORCNTSHADOW)
1536 #define V_TRICN_RX_TRAIN_ERR(x) ((x) << S_TRICN_RX_TRAIN_ERR)
1540 #define V_TRICN_RX_TRAINING(x) ((x) << S_TRICN_RX_TRAINING)
1544 #define V_TRICN_RX_TRAIN_OK(x) ((x) << S_TRICN_RX_TRAIN_OK)
1550 #define V_DIP2PARITYERR(x) ((x) << S_DIP2PARITYERR)
1558 #define V_ESPI_RX_LNK_RST(x) ((x) << S_ESPI_RX_LNK_RST)
1562 #define V_ESPI_RX_CORE_RST(x) ((x) << S_ESPI_RX_CORE_RST)
1566 #define V_RX_CLK_STATUS(x) ((x) << S_RX_CLK_STATUS)
1573 #define V_OUT_OF_SYNC_COUNT(x) ((x) << S_OUT_OF_SYNC_COUNT)
1574 #define G_OUT_OF_SYNC_COUNT(x) (((x) >> S_OUT_OF_SYNC_COUNT) & M_OUT_OF_SYNC_COUNT)
1577 #define V_DIP2_COUNT_MODE_ENABLE(x) ((x) << S_DIP2_COUNT_MODE_ENABLE)
1582 #define V_DIP2_PARITY_ERR_THRES(x) ((x) << S_DIP2_PARITY_ERR_THRES)
1583 #define G_DIP2_PARITY_ERR_THRES(x) (((x) >> S_DIP2_PARITY_ERR_THRES) & M_DIP2_PARITY_ERR_THRES)
1587 #define V_DIP4_THRES(x) ((x) << S_DIP4_THRES)
1588 #define G_DIP4_THRES(x) (((x) >> S_DIP4_THRES) & M_DIP4_THRES)
1591 #define V_DIP4_THRES_ENABLE(x) ((x) << S_DIP4_THRES_ENABLE)
1595 #define V_FORCE_DISABLE_STATUS(x) ((x) << S_FORCE_DISABLE_STATUS)
1599 #define V_DYNAMIC_DESKEW(x) ((x) << S_DYNAMIC_DESKEW)
1604 #define V_MONITORED_PORT_NUM(x) ((x) << S_MONITORED_PORT_NUM)
1605 #define G_MONITORED_PORT_NUM(x) (((x) >> S_MONITORED_PORT_NUM) & M_MONITORED_PORT_NUM)
1608 #define V_MONITORED_DIRECTION(x) ((x) << S_MONITORED_DIRECTION)
1612 #define V_MONITORED_INTERFACE(x) ((x) << S_MONITORED_INTERFACE)
1619 #define V_DIP2_ERR_CNT(x) ((x) << S_DIP2_ERR_CNT)
1620 #define G_DIP2_ERR_CNT(x) (((x) >> S_DIP2_ERR_CNT) & M_DIP2_ERR_CNT)
1626 #define V_WRITE_DATA(x) ((x) << S_WRITE_DATA)
1627 #define G_WRITE_DATA(x) (((x) >> S_WRITE_DATA) & M_WRITE_DATA)
1631 #define V_REGISTER_OFFSET(x) ((x) << S_REGISTER_OFFSET)
1632 #define G_REGISTER_OFFSET(x) (((x) >> S_REGISTER_OFFSET) & M_REGISTER_OFFSET)
1636 #define V_CHANNEL_ADDR(x) ((x) << S_CHANNEL_ADDR)
1637 #define G_CHANNEL_ADDR(x) (((x) >> S_CHANNEL_ADDR) & M_CHANNEL_ADDR)
1641 #define V_MODULE_ADDR(x) ((x) << S_MODULE_ADDR)
1642 #define G_MODULE_ADDR(x) (((x) >> S_MODULE_ADDR) & M_MODULE_ADDR)
1646 #define V_BUNDLE_ADDR(x) ((x) << S_BUNDLE_ADDR)
1647 #define G_BUNDLE_ADDR(x) (((x) >> S_BUNDLE_ADDR) & M_BUNDLE_ADDR)
1651 #define V_SPI4_COMMAND(x) ((x) << S_SPI4_COMMAND)
1652 #define G_SPI4_COMMAND(x) (((x) >> S_SPI4_COMMAND) & M_SPI4_COMMAND)
1658 #define V_READ_DATA(x) ((x) << S_READ_DATA)
1659 #define G_READ_DATA(x) (((x) >> S_READ_DATA) & M_READ_DATA)
1662 #define V_ESPI_CMD_BUSY(x) ((x) << S_ESPI_CMD_BUSY)
1666 #define V_ERROR_ACK(x) ((x) << S_ERROR_ACK)
1670 #define V_UNMAPPED_ERR(x) ((x) << S_UNMAPPED_ERR)
1675 #define V_TRANSACTION_TIMER(x) ((x) << S_TRANSACTION_TIMER)
1676 #define G_TRANSACTION_TIMER(x) (((x) >> S_TRANSACTION_TIMER) & M_TRANSACTION_TIMER)
1688 #define V_HREG_PAR_ERR(x) ((x) << S_HREG_PAR_ERR)
1692 #define V_EGRS_DATA_PAR_ERR(x) ((x) << S_EGRS_DATA_PAR_ERR)
1696 #define V_INGRS_DATA_PAR_ERR(x) ((x) << S_INGRS_DATA_PAR_ERR)
1700 #define V_PM_INTR(x) ((x) << S_PM_INTR)
1704 #define V_PM_E2C_SYNC_ERR(x) ((x) << S_PM_E2C_SYNC_ERR)
1708 #define V_PM_C2E_SYNC_ERR(x) ((x) << S_PM_C2E_SYNC_ERR)
1712 #define V_PM_E2C_EMPTY_ERR(x) ((x) << S_PM_E2C_EMPTY_ERR)
1716 #define V_PM_C2E_EMPTY_ERR(x) ((x) << S_PM_C2E_EMPTY_ERR)
1721 #define V_PM_PAR_ERR(x) ((x) << S_PM_PAR_ERR)
1722 #define G_PM_PAR_ERR(x) (((x) >> S_PM_PAR_ERR) & M_PM_PAR_ERR)
1725 #define V_PM_E2C_WRT_FULL(x) ((x) << S_PM_E2C_WRT_FULL)
1729 #define V_PM_C2E_WRT_FULL(x) ((x) << S_PM_C2E_WRT_FULL)
1738 #define V_PL_INTR_SGE_ERR(x) ((x) << S_PL_INTR_SGE_ERR)
1742 #define V_PL_INTR_SGE_DATA(x) ((x) << S_PL_INTR_SGE_DATA)
1746 #define V_PL_INTR_MC3(x) ((x) << S_PL_INTR_MC3)
1750 #define V_PL_INTR_MC4(x) ((x) << S_PL_INTR_MC4)
1754 #define V_PL_INTR_MC5(x) ((x) << S_PL_INTR_MC5)
1758 #define V_PL_INTR_RAT(x) ((x) << S_PL_INTR_RAT)
1762 #define V_PL_INTR_TP(x) ((x) << S_PL_INTR_TP)
1766 #define V_PL_INTR_ULP(x) ((x) << S_PL_INTR_ULP)
1770 #define V_PL_INTR_ESPI(x) ((x) << S_PL_INTR_ESPI)
1774 #define V_PL_INTR_CSPI(x) ((x) << S_PL_INTR_CSPI)
1778 #define V_PL_INTR_PCIX(x) ((x) << S_PL_INTR_PCIX)
1782 #define V_PL_INTR_EXT(x) ((x) << S_PL_INTR_EXT)
1791 #define V_MODE(x) ((x) << S_MODE)
1795 #define V_TCAM_RESET(x) ((x) << S_TCAM_RESET)
1799 #define V_TCAM_READY(x) ((x) << S_TCAM_READY)
1803 #define V_DBGI_ENABLE(x) ((x) << S_DBGI_ENABLE)
1807 #define V_M_BUS_ENABLE(x) ((x) << S_M_BUS_ENABLE)
1811 #define V_PARITY_ENABLE(x) ((x) << S_PARITY_ENABLE)
1816 #define V_SYN_ISSUE_MODE(x) ((x) << S_SYN_ISSUE_MODE)
1817 #define G_SYN_ISSUE_MODE(x) (((x) >> S_SYN_ISSUE_MODE) & M_SYN_ISSUE_MODE)
1820 #define V_BUILD(x) ((x) << S_BUILD)
1824 #define V_COMPRESSION_ENABLE(x) ((x) << S_COMPRESSION_ENABLE)
1829 #define V_NUM_LIP(x) ((x) << S_NUM_LIP)
1830 #define G_NUM_LIP(x) (((x) >> S_NUM_LIP) & M_NUM_LIP)
1834 #define V_TCAM_PART_CNT(x) ((x) << S_TCAM_PART_CNT)
1835 #define G_TCAM_PART_CNT(x) (((x) >> S_TCAM_PART_CNT) & M_TCAM_PART_CNT)
1839 #define V_TCAM_PART_TYPE(x) ((x) << S_TCAM_PART_TYPE)
1840 #define G_TCAM_PART_TYPE(x) (((x) >> S_TCAM_PART_TYPE) & M_TCAM_PART_TYPE)
1844 #define V_TCAM_PART_SIZE(x) ((x) << S_TCAM_PART_SIZE)
1845 #define G_TCAM_PART_SIZE(x) (((x) >> S_TCAM_PART_SIZE) & M_TCAM_PART_SIZE)
1848 #define V_TCAM_PART_TYPE_HI(x) ((x) << S_TCAM_PART_TYPE_HI)
1855 #define V_SIZE(x) ((x) << S_SIZE)
1856 #define G_SIZE(x) (((x) >> S_SIZE) & M_SIZE)
1862 #define V_START_OF_ROUTING_TABLE(x) ((x) << S_START_OF_ROUTING_TABLE)
1863 #define G_START_OF_ROUTING_TABLE(x) (((x) >> S_START_OF_ROUTING_TABLE) & M_START_OF_ROUTING_TABLE)
1869 #define V_START_OF_SERVER_INDEX(x) ((x) << S_START_OF_SERVER_INDEX)
1870 #define G_START_OF_SERVER_INDEX(x) (((x) >> S_START_OF_SERVER_INDEX) & M_START_OF_SERVER_INDEX)
1876 #define V_LOCAL_IP_RAM_ADDR(x) ((x) << S_LOCAL_IP_RAM_ADDR)
1877 #define G_LOCAL_IP_RAM_ADDR(x) (((x) >> S_LOCAL_IP_RAM_ADDR) & M_LOCAL_IP_RAM_ADDR)
1880 #define V_RAM_WRITE_ENABLE(x) ((x) << S_RAM_WRITE_ENABLE)
1888 #define V_SEARCH_RESPONSE_LATENCY(x) ((x) << S_SEARCH_RESPONSE_LATENCY)
1889 #define G_SEARCH_RESPONSE_LATENCY(x) (((x) >> S_SEARCH_RESPONSE_LATENCY) & M_SEARCH_RESPONSE_LATENCY)
1893 #define V_LEARN_RESPONSE_LATENCY(x) ((x) << S_LEARN_RESPONSE_LATENCY)
1894 #define G_LEARN_RESPONSE_LATENCY(x) (((x) >> S_LEARN_RESPONSE_LATENCY) & M_LEARN_RESPONSE_LATENCY)
1900 #define V_SRCHLAT(x) ((x) << S_SRCHLAT)
1901 #define G_SRCHLAT(x) (((x) >> S_SRCHLAT) & M_SRCHLAT)
1905 #define V_PARLAT(x) ((x) << S_PARLAT)
1906 #define G_PARLAT(x) (((x) >> S_PARLAT) & M_PARLAT)
1911 #define V_POVEREN(x) ((x) << S_POVEREN)
1915 #define V_LRNVEREN(x) ((x) << S_LRNVEREN)
1919 #define V_VWVEREN(x) ((x) << S_VWVEREN)
1926 #define V_IDINDEX(x) ((x) << S_IDINDEX)
1927 #define G_IDINDEX(x) (((x) >> S_IDINDEX) & M_IDINDEX)
1933 #define V_RSTMAX(x) ((x) << S_RSTMAX)
1934 #define G_RSTMAX(x) (((x) >> S_RSTMAX) & M_RSTMAX)
1939 #define V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(x) ((x) << S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR)
1943 #define V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(x) ((x) << S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR)
1947 #define V_MC5_INT_HIT_IN_RT_REGION_ERR(x) ((x) << S_MC5_INT_HIT_IN_RT_REGION_ERR)
1951 #define V_MC5_INT_MISS_ERR(x) ((x) << S_MC5_INT_MISS_ERR)
1955 #define V_MC5_INT_LIP0_ERR(x) ((x) << S_MC5_INT_LIP0_ERR)
1959 #define V_MC5_INT_LIP_MISS_ERR(x) ((x) << S_MC5_INT_LIP_MISS_ERR)
1963 #define V_MC5_INT_PARITY_ERR(x) ((x) << S_MC5_INT_PARITY_ERR)
1967 #define V_MC5_INT_ACTIVE_REGION_FULL(x) ((x) << S_MC5_INT_ACTIVE_REGION_FULL)
1971 #define V_MC5_INT_NFA_SRCH_ERR(x) ((x) << S_MC5_INT_NFA_SRCH_ERR)
1975 #define V_MC5_INT_SYN_COOKIE(x) ((x) << S_MC5_INT_SYN_COOKIE)
1979 #define V_MC5_INT_SYN_COOKIE_BAD(x) ((x) << S_MC5_INT_SYN_COOKIE_BAD)
1983 #define V_MC5_INT_SYN_COOKIE_OFF(x) ((x) << S_MC5_INT_SYN_COOKIE_OFF)
1987 #define V_MC5_INT_UNKNOWN_CMD(x) ((x) << S_MC5_INT_UNKNOWN_CMD)
1991 #define V_MC5_INT_REQUESTQ_PARITY_ERR(x) ((x) << S_MC5_INT_REQUESTQ_PARITY_ERR)
1995 #define V_MC5_INT_DISPATCHQ_PARITY_ERR(x) ((x) << S_MC5_INT_DISPATCHQ_PARITY_ERR)
1999 #define V_MC5_INT_DEL_ACT_EMPTY(x) ((x) << S_MC5_INT_DEL_ACT_EMPTY)
2010 #define V_CMDMODE(x) ((x) << S_CMDMODE)
2011 #define G_CMDMODE(x) (((x) >> S_CMDMODE) & M_CMDMODE)
2014 #define V_SADRSEL(x) ((x) << S_SADRSEL)
2019 #define V_WRITE_BURST_SIZE(x) ((x) << S_WRITE_BURST_SIZE)
2020 #define G_WRITE_BURST_SIZE(x) (((x) >> S_WRITE_BURST_SIZE) & M_WRITE_BURST_SIZE)
2038 #define V_DBGI_RSP_VALID(x) ((x) << S_DBGI_RSP_VALID)
2042 #define V_DBGI_RSP_HIT(x) ((x) << S_DBGI_RSP_HIT)
2046 #define V_DBGI_RSP_ERR(x) ((x) << S_DBGI_RSP_ERR)
2051 #define V_DBGI_RSP_ERR_REASON(x) ((x) << S_DBGI_RSP_ERR_REASON)
2052 #define G_DBGI_RSP_ERR_REASON(x) (((x) >> S_DBGI_RSP_ERR_REASON) & M_DBGI_RSP_ERR_REASON)
2080 #define V_VPD_ADDR(x) ((x) << S_VPD_ADDR)
2081 #define G_VPD_ADDR(x) (((x) >> S_VPD_ADDR) & M_VPD_ADDR)
2084 #define V_VPD_OP_FLAG(x) ((x) << S_VPD_OP_FLAG)
2092 #define V_MASTER_PARITY_ERR(x) ((x) << S_MASTER_PARITY_ERR)
2096 #define V_SIG_TARGET_ABORT(x) ((x) << S_SIG_TARGET_ABORT)
2100 #define V_RCV_TARGET_ABORT(x) ((x) << S_RCV_TARGET_ABORT)
2104 #define V_RCV_MASTER_ABORT(x) ((x) << S_RCV_MASTER_ABORT)
2108 #define V_SIG_SYS_ERR(x) ((x) << S_SIG_SYS_ERR)
2112 #define V_DET_PARITY_ERR(x) ((x) << S_DET_PARITY_ERR)
2116 #define V_PIO_PARITY_ERR(x) ((x) << S_PIO_PARITY_ERR)
2120 #define V_WF_PARITY_ERR(x) ((x) << S_WF_PARITY_ERR)
2125 #define V_RF_PARITY_ERR(x) ((x) << S_RF_PARITY_ERR)
2126 #define G_RF_PARITY_ERR(x) (((x) >> S_RF_PARITY_ERR) & M_RF_PARITY_ERR)
2130 #define V_CF_PARITY_ERR(x) ((x) << S_CF_PARITY_ERR)
2131 #define G_CF_PARITY_ERR(x) (((x) >> S_CF_PARITY_ERR) & M_CF_PARITY_ERR)
2137 #define V_PCI_MODE_64BIT(x) ((x) << S_PCI_MODE_64BIT)
2141 #define V_PCI_MODE_66MHZ(x) ((x) << S_PCI_MODE_66MHZ)
2146 #define V_PCI_MODE_PCIX_INITPAT(x) ((x) << S_PCI_MODE_PCIX_INITPAT)
2147 #define G_PCI_MODE_PCIX_INITPAT(x) (((x) >> S_PCI_MODE_PCIX_INITPAT) & M_PCI_MODE_PCIX_INITPAT)
2150 #define V_PCI_MODE_PCIX(x) ((x) << S_PCI_MODE_PCIX)
2155 #define V_PCI_MODE_CLK(x) ((x) << S_PCI_MODE_CLK)
2156 #define G_PCI_MODE_CLK(x) (((x) >> S_PCI_MODE_CLK) & M_PCI_MODE_CLK)