Lines Matching defs:ena_dev
104 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
175 ring->ena_dev = adapter->ena_dev;
186 struct ena_com_dev *ena_dev;
190 ena_dev = adapter->ena_dev;
201 txr->tx_max_header_size = ena_dev->tx_max_header_size;
202 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
205 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
219 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
751 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
764 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1378 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1380 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1486 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1512 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1516 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1837 struct ena_com_dev *ena_dev = adapter->ena_dev;
1841 if (!ena_dev->rss.tbl_log_size) {
1850 rc = ena_com_indirect_table_set(ena_dev);
1855 rc = ena_com_set_hash_function(ena_dev);
1860 rc = ena_com_set_hash_ctrl(ena_dev);
1892 struct ena_com_dev *ena_dev;
1898 ena_dev = adapter->ena_dev;
1908 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1913 rc = ena_com_create_io_queue(ena_dev, &ctx);
1921 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1928 ena_com_destroy_io_queue(ena_dev, ena_qid);
1939 struct ena_com_dev *ena_dev = adapter->ena_dev;
1952 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1959 struct ena_com_dev *ena_dev;
1966 ena_dev = adapter->ena_dev;
1981 rc = ena_com_create_io_queue(ena_dev, &ctx);
1989 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2003 ena_com_destroy_io_queue(ena_dev, ena_qid);
2009 struct ena_com_dev *ena_dev = adapter->ena_dev;
2027 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2169 if (ena_com_interrupt_moderation_supported(adapter->ena_dev))
2170 ena_com_enable_adaptive_moderation(adapter->ena_dev);
2238 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2243 ena_com_set_admin_running_state(adapter->ena_dev, false);
2347 large_llq_changed = adapter->ena_dev->tx_mem_queue_type ==
2350 new_llq_header_len != adapter->ena_dev->tx_max_header_size;
2383 struct ena_com_dev *ena_dev = adapter->ena_dev;
2410 ena_com_rss_destroy(ena_dev);
2706 static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
2714 rc = ena_com_allocate_host_info(ena_dev);
2720 host_info = ena_dev->host_attr.host_info;
2753 rc = ena_com_set_host_attributes(ena_dev);
2766 ena_com_delete_host_info(ena_dev);
2784 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2791 rc = ena_com_set_host_attributes(adapter->ena_dev);
2803 ena_com_delete_debug_area(adapter->ena_dev);
2891 struct ena_com_dev *ena_dev = adapter->ena_dev;
2906 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
2913 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
2931 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
2964 ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
3020 struct ena_com_dev *ena_dev = adapter->ena_dev;
3027 !!(ena_dev->supported_features & BIT(ENA_ADMIN_LLQ));
3043 struct ena_com_dev *ena_dev,
3051 if (!(ena_dev->supported_features & llq_feature_mask)) {
3054 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3058 if (!ena_dev->mem_bar) {
3059 netdev_err(ena_dev->net_device,
3061 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3065 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3069 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3075 static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
3083 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3087 if (!ena_dev->mem_bar)
3097 struct ena_com_dev *ena_dev = adapter->ena_dev;
3106 rc = ena_com_mmio_reg_read_request_init(ena_dev);
3116 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3118 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3124 rc = ena_com_validate_version(ena_dev);
3130 dma_width = ena_com_get_dma_width(ena_dev);
3146 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3157 ena_com_set_admin_polling_mode(ena_dev, true);
3159 ena_config_host_info(ena_dev, pdev);
3162 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3177 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3187 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx->llq,
3205 ena_com_abort_admin_commands(ena_dev);
3206 ena_com_wait_for_abort_completion(ena_dev);
3207 ena_com_delete_host_info(ena_dev);
3208 ena_com_admin_destroy(ena_dev);
3210 ena_com_mmio_reg_read_request_destroy(ena_dev);
3217 struct ena_com_dev *ena_dev = adapter->ena_dev;
3235 ena_com_set_admin_polling_mode(ena_dev, false);
3237 ena_com_admin_aenq_enable(ena_dev);
3250 struct ena_com_dev *ena_dev = adapter->ena_dev;
3264 ena_com_set_admin_running_state(ena_dev, false);
3273 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3279 ena_com_abort_admin_commands(ena_dev);
3281 ena_com_wait_for_abort_completion(ena_dev);
3283 ena_com_admin_destroy(ena_dev);
3287 ena_com_mmio_reg_read_request_destroy(ena_dev);
3301 struct ena_com_dev *ena_dev = adapter->ena_dev;
3318 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
3319 txr->tx_max_header_size = ena_dev->tx_max_header_size;
3356 ena_com_abort_admin_commands(ena_dev);
3357 ena_com_wait_for_abort_completion(ena_dev);
3358 ena_com_admin_destroy(ena_dev);
3359 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3361 ena_com_mmio_reg_read_request_destroy(ena_dev);
3626 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3641 adapter->ena_dev->admin_queue.completion_timeout =
3646 adapter->ena_dev->mmio_read.reg_read_to =
3686 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3688 adapter->ena_dev->host_attr.host_info;
3717 struct ena_com_dev *ena_dev,
3722 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3739 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3817 struct ena_com_dev *ena_dev = adapter->ena_dev;
3822 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3830 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3838 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, ENA_HASH_KEY_SIZE,
3845 rc = ena_com_set_default_hash_ctrl(ena_dev);
3854 ena_com_rss_destroy(ena_dev);
3860 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3880 struct ena_com_dev *ena_dev = NULL;
3905 ena_dev = vzalloc(sizeof(*ena_dev));
3906 if (!ena_dev) {
3919 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
3922 if (!ena_dev->reg_bar) {
3928 ena_dev->ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;
3930 ena_dev->dmadev = &pdev->dev;
3941 adapter->ena_dev = ena_dev;
3946 ena_dev->net_device = netdev;
3956 rc = ena_com_allocate_customer_metrics_buffer(ena_dev);
3962 rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);
3987 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
3988 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
3989 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
3990 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4008 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4017 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4097 ena_com_delete_debug_area(ena_dev);
4098 ena_com_rss_destroy(ena_dev);
4100 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4102 ena_com_set_admin_running_state(ena_dev, false);
4108 ena_com_delete_host_info(ena_dev);
4109 ena_com_admin_destroy(ena_dev);
4113 ena_com_delete_customer_metrics_buffer(ena_dev);
4119 ena_release_bars(ena_dev, pdev);
4121 vfree(ena_dev);
4140 struct ena_com_dev *ena_dev;
4143 ena_dev = adapter->ena_dev;
4173 ena_com_rss_destroy(ena_dev);
4175 ena_com_delete_debug_area(ena_dev);
4177 ena_com_delete_host_info(ena_dev);
4179 ena_com_delete_customer_metrics_buffer(ena_dev);
4181 ena_release_bars(ena_dev, pdev);
4185 vfree(ena_dev);