ethernet/altera/altera_msgdma.c

13 int msgdma_initialize(struct altera_tse_private *priv)
18 void msgdma_uninitialize(struct altera_tse_private *priv)
22 void msgdma_start_rxdma(struct altera_tse_private *priv)
26 void msgdma_reset(struct altera_tse_private *priv)
31 	csrwr32(MSGDMA_CSR_STAT_MASK, priv->rx_dma_csr,
33 	csrwr32(MSGDMA_CSR_CTL_RESET, priv->rx_dma_csr,
38 		if (tse_bit_is_clear(priv->rx_dma_csr, msgdma_csroffs(status),
45 		netif_warn(priv, drv, priv->dev,
49 	csrwr32(MSGDMA_CSR_STAT_MASK, priv->rx_dma_csr, msgdma_csroffs(status));
52 	csrwr32(MSGDMA_CSR_STAT_MASK, priv->tx_dma_csr,
55 	csrwr32(MSGDMA_CSR_CTL_RESET, priv->tx_dma_csr,
60 		if (tse_bit_is_clear(priv->tx_dma_csr, msgdma_csroffs(status),
67 		netif_warn(priv, drv, priv->dev,
71 	csrwr32(MSGDMA_CSR_STAT_MASK, priv->tx_dma_csr, msgdma_csroffs(status));
74 void msgdma_disable_rxirq(struct altera_tse_private *priv)
76 	tse_clear_bit(priv->rx_dma_csr, msgdma_csroffs(control),
80 void msgdma_enable_rxirq(struct altera_tse_private *priv)
82 	tse_set_bit(priv->rx_dma_csr, msgdma_csroffs(control),
86 void msgdma_disable_txirq(struct altera_tse_private *priv)
88 	tse_clear_bit(priv->tx_dma_csr, msgdma_csroffs(control),
92 void msgdma_enable_txirq(struct altera_tse_private *priv)
94 	tse_set_bit(priv->tx_dma_csr, msgdma_csroffs(control),
98 void msgdma_clear_rxirq(struct altera_tse_private *priv)
100 	csrwr32(MSGDMA_CSR_STAT_IRQ, priv->rx_dma_csr, msgdma_csroffs(status));
103 void msgdma_clear_txirq(struct altera_tse_private *priv)
105 	csrwr32(MSGDMA_CSR_STAT_IRQ, priv->tx_dma_csr, msgdma_csroffs(status));
109 int msgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer)
111 	csrwr32(lower_32_bits(buffer->dma_addr), priv->tx_dma_desc,
113 	csrwr32(upper_32_bits(buffer->dma_addr), priv->tx_dma_desc,
115 	csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(write_addr_lo));
116 	csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(write_addr_hi));
117 	csrwr32(buffer->len, priv->tx_dma_desc, msgdma_descroffs(len));
118 	csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(burst_seq_num));
119 	csrwr32(MSGDMA_DESC_TX_STRIDE, priv->tx_dma_desc,
121 	csrwr32(MSGDMA_DESC_CTL_TX_SINGLE, priv->tx_dma_desc,
126 u32 msgdma_tx_completions(struct altera_tse_private *priv)
133 	inuse = csrrd32(priv->tx_dma_csr, msgdma_csroffs(rw_fill_level))
138 			      priv->tx_prod - priv->tx_cons - inuse - 1, 0);
141 		status = csrrd32(priv->tx_dma_csr, msgdma_csroffs(status));
143 			ready = priv->tx_prod - priv->tx_cons - 1;
145 			ready = priv->tx_prod - priv->tx_cons;
152 void msgdma_add_rx_desc(struct altera_tse_private *priv,
155 	u32 len = priv->rx_dma_buf_sz;
164 	csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(read_addr_lo));
165 	csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(read_addr_hi));
166 	csrwr32(lower_32_bits(dma_addr), priv->rx_dma_desc,
168 	csrwr32(upper_32_bits(dma_addr), priv->rx_dma_desc,
170 	csrwr32(len, priv->rx_dma_desc, msgdma_descroffs(len));
171 	csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(burst_seq_num));
172 	csrwr32(0x00010001, priv->rx_dma_desc, msgdma_descroffs(stride));
173 	csrwr32(control, priv->rx_dma_desc, msgdma_descroffs(control));
179 u32 msgdma_rx_status(struct altera_tse_private *priv)
185 	if (csrrd32(priv->rx_dma_csr, msgdma_csroffs(resp_fill_level))
187 		pktlength = csrrd32(priv->rx_dma_resp,
189 		pktstatus = csrrd32(priv->rx_dma_resp,