dsa/mv88e6xxx/phy.c

13 #include "chip.h"
16 int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
19 	return mv88e6xxx_read(chip, addr, reg, val);
22 int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
25 	return mv88e6xxx_write(chip, addr, reg, val);
28 int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
33 	bus = mv88e6xxx_default_mdio_bus(chip);
37 	if (!chip->info->ops->phy_read)
40 	return chip->info->ops->phy_read(chip, bus, addr, reg, val);
43 int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
48 	bus = mv88e6xxx_default_mdio_bus(chip);
52 	if (!chip->info->ops->phy_write)
55 	return chip->info->ops->phy_write(chip, bus, addr, reg, val);
58 int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
64 	bus = mv88e6xxx_default_mdio_bus(chip);
68 	if (!chip->info->ops->phy_read_c45)
71 	return chip->info->ops->phy_read_c45(chip, bus, addr, devad, reg, val);
74 int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
80 	bus = mv88e6xxx_default_mdio_bus(chip);
84 	if (!chip->info->ops->phy_write_c45)
87 	return chip->info->ops->phy_write_c45(chip, bus, addr, devad, reg, val);
90 static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
92 	return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
95 static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
102 	err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
105 		dev_err(chip->dev,
111 int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
120 	err = mv88e6xxx_phy_page_get(chip, phy, page);
122 		err = mv88e6xxx_phy_read(chip, phy, reg, val);
123 		mv88e6xxx_phy_page_put(chip, phy);
129 int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
138 	err = mv88e6xxx_phy_page_get(chip, phy, page);
140 		err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
142 			err = mv88e6xxx_phy_write(chip, phy, reg, val);
144 		mv88e6xxx_phy_page_put(chip, phy);
150 static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
152 	if (!chip->info->ops->ppu_disable)
155 	return chip->info->ops->ppu_disable(chip);
158 static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
160 	if (!chip->info->ops->ppu_enable)
163 	return chip->info->ops->ppu_enable(chip);
168 	struct mv88e6xxx_chip *chip;
170 	chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
172 	mv88e6xxx_reg_lock(chip);
174 	if (mutex_trylock(&chip->ppu_mutex)) {
175 		if (mv88e6xxx_phy_ppu_enable(chip) == 0)
176 			chip->ppu_disabled = 0;
177 		mutex_unlock(&chip->ppu_mutex);
180 	mv88e6xxx_reg_unlock(chip);
185 	struct mv88e6xxx_chip *chip = timer_container_of(chip, t, ppu_timer);
187 	schedule_work(&chip->ppu_work);
190 static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
194 	mutex_lock(&chip->ppu_mutex);
201 	if (!chip->ppu_disabled) {
202 		ret = mv88e6xxx_phy_ppu_disable(chip);
204 			mutex_unlock(&chip->ppu_mutex);
207 		chip->ppu_disabled = 1;
209 		timer_delete(&chip->ppu_timer);
216 static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
219 	mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
220 	mutex_unlock(&chip->ppu_mutex);
223 static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
225 	mutex_init(&chip->ppu_mutex);
226 	INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
227 	timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
230 static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
232 	mutex_lock(&chip->ppu_mutex);
233 	timer_delete_sync(&chip->ppu_timer);
234 	cancel_work_sync(&chip->ppu_work);
235 	mutex_unlock(&chip->ppu_mutex);
238 int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
243 	err = mv88e6xxx_phy_ppu_access_get(chip);
245 		err = mv88e6xxx_read(chip, addr, reg, val);
246 		mv88e6xxx_phy_ppu_access_put(chip);
252 int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
257 	err = mv88e6xxx_phy_ppu_access_get(chip);
259 		err = mv88e6xxx_write(chip, addr, reg, val);
260 		mv88e6xxx_phy_ppu_access_put(chip);
266 void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
268 	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
269 		mv88e6xxx_phy_ppu_state_init(chip);
272 void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
274 	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
275 		mv88e6xxx_phy_ppu_state_destroy(chip);
278 int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
280 	return mv88e6xxx_phy_ppu_enable(chip);