Lines Matching defs:priv
113 mcp251xfd_get_model_str(const struct mcp251xfd_priv *priv)
115 return __mcp251xfd_get_model_str(priv->devtype_data.model);
158 static inline int mcp251xfd_vdd_enable(const struct mcp251xfd_priv *priv)
160 if (!priv->reg_vdd)
163 return regulator_enable(priv->reg_vdd);
166 static inline int mcp251xfd_vdd_disable(const struct mcp251xfd_priv *priv)
168 if (!priv->reg_vdd)
171 return regulator_disable(priv->reg_vdd);
175 mcp251xfd_transceiver_enable(const struct mcp251xfd_priv *priv)
177 if (!priv->reg_xceiver)
180 return regulator_enable(priv->reg_xceiver);
184 mcp251xfd_transceiver_disable(const struct mcp251xfd_priv *priv)
186 if (!priv->reg_xceiver)
189 return regulator_disable(priv->reg_xceiver);
192 static int mcp251xfd_clks_and_vdd_enable(const struct mcp251xfd_priv *priv)
196 err = clk_prepare_enable(priv->clk);
200 err = mcp251xfd_vdd_enable(priv);
202 clk_disable_unprepare(priv->clk);
211 static int mcp251xfd_clks_and_vdd_disable(const struct mcp251xfd_priv *priv)
215 err = mcp251xfd_vdd_disable(priv);
219 clk_disable_unprepare(priv->clk);
230 mcp251xfd_chip_get_mode(const struct mcp251xfd_priv *priv, u8 *mode)
235 err = regmap_read(priv->map_reg, MCP251XFD_REG_CON, &val);
245 __mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,
248 const struct can_bittiming *bt = &priv->can.bittiming;
255 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_CON,
258 netdev_err(priv->ndev,
274 err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_CON, con,
285 regmap_read(priv->map_reg, MCP251XFD_REG_OSC, &osc);
288 netdev_err(priv->ndev,
296 netdev_err(priv->ndev,
306 mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,
309 return __mcp251xfd_chip_set_mode(priv, mode_req, false);
313 mcp251xfd_chip_set_mode_nowait(const struct mcp251xfd_priv *priv,
316 return __mcp251xfd_chip_set_mode(priv, mode_req, true);
320 mcp251xfd_chip_wait_for_osc_ready(const struct mcp251xfd_priv *priv,
326 err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_OSC, osc,
335 netdev_err(priv->ndev,
341 netdev_err(priv->ndev,
349 static int mcp251xfd_chip_wake(const struct mcp251xfd_priv *priv)
374 err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
382 return mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);
385 static inline int mcp251xfd_chip_sleep(const struct mcp251xfd_priv *priv)
387 if (priv->pll_enable) {
394 err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
396 netdev_err(priv->ndev,
399 priv->spi->max_speed_hz = priv->spi_max_speed_hz_slow;
402 return mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_SLEEP);
405 static int mcp251xfd_chip_softreset_do(const struct mcp251xfd_priv *priv)
413 err = mcp251xfd_chip_wake(priv);
417 err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
422 return spi_write_then_read(priv->spi, &cmd, sizeof(cmd), NULL, 0);
425 static int mcp251xfd_chip_softreset_check(const struct mcp251xfd_priv *priv)
438 err = mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);
442 err = mcp251xfd_chip_get_mode(priv, &mode);
447 netdev_info(priv->ndev,
456 static int mcp251xfd_chip_softreset(const struct mcp251xfd_priv *priv)
462 netdev_info(priv->ndev,
465 err = mcp251xfd_chip_softreset_do(priv);
471 err = mcp251xfd_chip_softreset_check(priv);
483 static int mcp251xfd_chip_clock_init(const struct mcp251xfd_priv *priv)
498 if (priv->pll_enable) {
503 err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
507 err = mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);
511 priv->spi->max_speed_hz = priv->spi_max_speed_hz_fast;
516 static int mcp251xfd_chip_timestamp_init(const struct mcp251xfd_priv *priv)
523 return regmap_write(priv->map_reg, MCP251XFD_REG_TSCON,
527 static int mcp251xfd_set_bittiming(const struct mcp251xfd_priv *priv)
529 const struct can_bittiming *bt = &priv->can.bittiming;
530 const struct can_bittiming *dbt = &priv->can.fd.data_bittiming;
560 if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD_NON_ISO))
563 err = regmap_write(priv->map_reg, MCP251XFD_REG_CON, val);
575 err = regmap_write(priv->map_reg, MCP251XFD_REG_NBTCFG, val);
579 if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD))
590 err = regmap_write(priv->map_reg, MCP251XFD_REG_DBTCFG, val);
595 if (priv->can.ctrlmode & CAN_CTRLMODE_TDC_AUTO)
597 else if (priv->can.ctrlmode & CAN_CTRLMODE_TDC_MANUAL)
603 FIELD_PREP(MCP251XFD_REG_TDC_TDCV_MASK, priv->can.fd.tdc.tdcv) |
604 FIELD_PREP(MCP251XFD_REG_TDC_TDCO_MASK, priv->can.fd.tdc.tdco);
606 return regmap_write(priv->map_reg, MCP251XFD_REG_TDC, val);
609 static int mcp251xfd_chip_rx_int_enable(const struct mcp251xfd_priv *priv)
613 if (!priv->rx_int)
627 return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
630 static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)
634 if (!priv->rx_int)
643 return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
646 static int mcp251xfd_chip_ecc_init(struct mcp251xfd_priv *priv)
648 struct mcp251xfd_ecc *ecc = &priv->ecc;
655 if (priv->devtype_data.quirks & MCP251XFD_QUIRK_ECC)
658 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCCON,
667 err = regmap_raw_write(priv->map_reg, MCP251XFD_RAM_START, ram,
674 static u8 mcp251xfd_get_normal_mode(const struct mcp251xfd_priv *priv)
678 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
680 else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
682 else if (priv->can.ctrlmode & CAN_CTRLMODE_FD)
691 __mcp251xfd_chip_set_normal_mode(const struct mcp251xfd_priv *priv,
696 mode = mcp251xfd_get_normal_mode(priv);
698 return __mcp251xfd_chip_set_mode(priv, mode, nowait);
702 mcp251xfd_chip_set_normal_mode(const struct mcp251xfd_priv *priv)
704 return __mcp251xfd_chip_set_normal_mode(priv, false);
708 mcp251xfd_chip_set_normal_mode_nowait(const struct mcp251xfd_priv *priv)
710 return __mcp251xfd_chip_set_normal_mode(priv, true);
713 static int mcp251xfd_chip_interrupts_enable(const struct mcp251xfd_priv *priv)
719 err = regmap_write(priv->map_reg, MCP251XFD_REG_CRC, val);
724 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCCON, val, val);
738 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
741 return regmap_write(priv->map_reg, MCP251XFD_REG_INT, val);
744 static int mcp251xfd_chip_interrupts_disable(const struct mcp251xfd_priv *priv)
749 err = regmap_write(priv->map_reg, MCP251XFD_REG_INT, 0);
754 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCCON,
759 return regmap_write(priv->map_reg, MCP251XFD_REG_CRC, 0);
762 static void mcp251xfd_chip_stop(struct mcp251xfd_priv *priv,
765 priv->can.state = state;
767 mcp251xfd_chip_interrupts_disable(priv);
768 mcp251xfd_chip_rx_int_disable(priv);
769 mcp251xfd_timestamp_stop(priv);
770 mcp251xfd_chip_sleep(priv);
773 static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)
777 err = mcp251xfd_chip_softreset(priv);
781 err = mcp251xfd_chip_clock_init(priv);
785 err = mcp251xfd_chip_timestamp_init(priv);
789 mcp251xfd_timestamp_start(priv);
791 err = mcp251xfd_set_bittiming(priv);
795 err = mcp251xfd_chip_rx_int_enable(priv);
799 err = mcp251xfd_chip_ecc_init(priv);
803 err = mcp251xfd_ring_init(priv);
807 err = mcp251xfd_chip_fifo_init(priv);
811 priv->can.state = CAN_STATE_ERROR_ACTIVE;
813 err = mcp251xfd_chip_set_normal_mode(priv);
820 mcp251xfd_dump(priv);
821 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
828 struct mcp251xfd_priv *priv = netdev_priv(ndev);
833 err = mcp251xfd_chip_start(priv);
837 err = mcp251xfd_chip_interrupts_enable(priv);
839 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
856 const struct mcp251xfd_priv *priv = netdev_priv(ndev);
860 err = regmap_read(priv->map_reg, MCP251XFD_REG_TREC, &trec);
876 const struct mcp251xfd_priv *priv = netdev_priv(ndev);
885 if (priv->can.state == CAN_STATE_BUS_OFF) {
886 *bec = priv->bec;
894 mcp251xfd_alloc_can_err_skb(struct mcp251xfd_priv *priv,
900 err = mcp251xfd_get_timestamp_raw(priv, ts_raw);
904 skb = alloc_can_err_skb(priv->ndev, cf);
906 mcp251xfd_skb_set_timestamp_raw(priv, skb, *ts_raw);
911 static int mcp251xfd_handle_rxovif(struct mcp251xfd_priv *priv)
913 struct net_device_stats *stats = &priv->ndev->stats;
923 err = regmap_read(priv->map_reg, MCP251XFD_REG_RXOVIF, &rxovif);
927 mcp251xfd_for_each_rx_ring(priv, ring, i) {
932 if (priv->regs_status.intf & MCP251XFD_REG_INT_SERRIF) {
934 netdev_dbg(priv->ndev,
939 netdev_dbg(priv->ndev,
944 err = regmap_update_bits(priv->map_reg,
952 skb = mcp251xfd_alloc_can_err_skb(priv, &cf, &ts_raw);
959 err = can_rx_offload_queue_timestamp(&priv->offload, skb, ts_raw);
966 static int mcp251xfd_handle_txatif(struct mcp251xfd_priv *priv)
968 netdev_info(priv->ndev, "%s\n", __func__);
973 static int mcp251xfd_handle_ivmif(struct mcp251xfd_priv *priv)
975 struct net_device_stats *stats = &priv->ndev->stats;
981 err = mcp251xfd_get_timestamp_raw(priv, &ts_raw);
985 err = regmap_read(priv->map_reg, MCP251XFD_REG_BDIAG1, &bdiag1);
992 err = regmap_write(priv->map_reg, MCP251XFD_REG_BDIAG1, 0x0);
996 priv->can.can_stats.bus_error++;
998 skb = alloc_can_err_skb(priv->ndev, &cf);
1004 netdev_err(priv->ndev,
1010 netdev_dbg(priv->ndev, "CRC error\n");
1018 netdev_dbg(priv->ndev, "Stuff error\n");
1026 netdev_dbg(priv->ndev, "Format error\n");
1035 netdev_dbg(priv->ndev, "NACK error\n");
1045 netdev_dbg(priv->ndev, "Bit1 error\n");
1053 netdev_dbg(priv->ndev, "Bit0 error\n");
1063 mcp251xfd_skb_set_timestamp_raw(priv, skb, ts_raw);
1064 err = can_rx_offload_queue_timestamp(&priv->offload, skb, ts_raw);
1071 static int mcp251xfd_handle_cerrif(struct mcp251xfd_priv *priv)
1073 struct net_device_stats *stats = &priv->ndev->stats;
1080 err = regmap_read(priv->map_reg, MCP251XFD_REG_TREC, &trec);
1101 if (new_state == priv->can.state)
1107 skb = mcp251xfd_alloc_can_err_skb(priv, &cf, &ts_raw);
1108 can_change_state(priv->ndev, cf, tx_state, rx_state);
1116 err = __mcp251xfd_get_berr_counter(priv->ndev, &priv->bec);
1120 mcp251xfd_chip_stop(priv, CAN_STATE_BUS_OFF);
1121 can_bus_off(priv->ndev);
1130 err = mcp251xfd_get_berr_counter(priv->ndev, &bec);
1138 err = can_rx_offload_queue_timestamp(&priv->offload, skb, ts_raw);
1146 mcp251xfd_handle_modif(const struct mcp251xfd_priv *priv, bool *set_normal_mode)
1148 const u8 mode_reference = mcp251xfd_get_normal_mode(priv);
1152 err = mcp251xfd_chip_get_mode(priv, &mode);
1157 netdev_dbg(priv->ndev,
1173 if ((priv->devtype_data.quirks & MCP251XFD_QUIRK_MAB_NO_WARN) &&
1176 netdev_dbg(priv->ndev,
1180 netdev_err(priv->ndev,
1192 if (priv->regs_status.intf & MCP251XFD_REG_INT_ECCIF) {
1197 return mcp251xfd_chip_set_normal_mode_nowait(priv);
1200 static int mcp251xfd_handle_serrif(struct mcp251xfd_priv *priv)
1202 struct mcp251xfd_ecc *ecc = &priv->ecc;
1203 struct net_device_stats *stats = &priv->ndev->stats;
1228 if ((priv->regs_status.intf & MCP251XFD_REG_INT_MODIF &&
1229 priv->regs_status.intf & MCP251XFD_REG_INT_IVMIF) ||
1230 priv->regs_status.intf & MCP251XFD_REG_INT_ECCIF ||
1234 if (priv->regs_status.intf & MCP251XFD_REG_INT_ECCIF ||
1240 if (priv->devtype_data.quirks & MCP251XFD_QUIRK_MAB_NO_WARN)
1241 netdev_dbg(priv->ndev, "%s\n", msg);
1243 netdev_info(priv->ndev, "%s\n", msg);
1264 if (priv->regs_status.intf & MCP251XFD_REG_INT_RXOVIF ||
1265 priv->regs_status.intf & MCP251XFD_REG_INT_RXIF) {
1271 netdev_err(priv->ndev,
1273 priv->regs_status.intf);
1279 mcp251xfd_handle_eccif_recover(struct mcp251xfd_priv *priv, u8 nr)
1281 struct mcp251xfd_tx_ring *tx_ring = priv->tx;
1282 struct mcp251xfd_ecc *ecc = &priv->ecc;
1290 err = mcp251xfd_tx_tail_get_from_chip(priv, &chip_tx_tail);
1303 !(offset == 0 || (offset == 1 && (mcp251xfd_is_2518FD(priv) ||
1304 mcp251xfd_is_251863(priv))))) {
1305 netdev_err(priv->ndev,
1312 netdev_info(priv->ndev,
1320 err = spi_sync_transfer(priv->spi, tx_obj->xfer, 1);
1325 return mcp251xfd_chip_set_normal_mode(priv);
1329 mcp251xfd_handle_eccif(struct mcp251xfd_priv *priv, bool set_normal_mode)
1331 struct mcp251xfd_ecc *ecc = &priv->ecc;
1339 err = regmap_read(priv->map_reg, MCP251XFD_REG_ECCSTAT, &ecc_stat);
1343 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_ECCSTAT,
1350 err = mcp251xfd_get_tx_nr_by_addr(priv->tx, &nr, addr);
1381 netdev_notice(priv->ndev, "%s 0x%04x.\n", msg, addr);
1391 netdev_info(priv->ndev,
1396 return mcp251xfd_handle_eccif_recover(priv, nr);
1400 return mcp251xfd_chip_set_normal_mode_nowait(priv);
1405 static int mcp251xfd_handle_spicrcif(struct mcp251xfd_priv *priv)
1410 err = regmap_read(priv->map_reg, MCP251XFD_REG_CRC, &crc);
1414 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_CRC,
1421 netdev_notice(priv->ndev, "CRC write command format error.\n");
1423 netdev_notice(priv->ndev,
1430 static int mcp251xfd_read_regs_status(struct mcp251xfd_priv *priv)
1432 const int val_bytes = regmap_get_val_bytes(priv->map_reg);
1435 if (priv->rx_ring_num == 1)
1436 len = sizeof(priv->regs_status.intf);
1438 len = sizeof(priv->regs_status);
1440 return regmap_bulk_read(priv->map_reg, MCP251XFD_REG_INT,
1441 &priv->regs_status, len / val_bytes);
1444 #define mcp251xfd_handle(priv, irq, ...) \
1446 struct mcp251xfd_priv *_priv = (priv); \
1459 struct mcp251xfd_priv *priv = dev_id;
1463 if (priv->rx_int)
1467 rx_pending = gpiod_get_value_cansleep(priv->rx_int);
1475 priv->regs_status.rxif = BIT(priv->rx[0]->fifo_nr);
1476 err = mcp251xfd_handle(priv, rxif);
1486 } while (priv->rx_ring_num == 1);
1492 err = mcp251xfd_read_regs_status(priv);
1497 priv->regs_status.intf) &
1499 priv->regs_status.intf);
1502 can_rx_offload_threaded_irq_finish(&priv->offload);
1517 err = regmap_update_bits(priv->map_reg,
1526 err = mcp251xfd_handle(priv, modif, &set_normal_mode);
1532 err = mcp251xfd_handle(priv, rxif);
1538 err = mcp251xfd_handle(priv, tefif);
1544 err = mcp251xfd_handle(priv, rxovif);
1550 err = mcp251xfd_handle(priv, txatif);
1556 err = mcp251xfd_handle(priv, ivmif);
1562 err = mcp251xfd_handle(priv, serrif);
1568 err = mcp251xfd_handle(priv, eccif, set_normal_mode);
1574 err = mcp251xfd_handle(priv, spicrcif);
1584 priv->can.state > CAN_STATE_ERROR_ACTIVE) {
1585 err = mcp251xfd_handle(priv, cerrif);
1596 if (priv->can.state == CAN_STATE_BUS_OFF) {
1597 can_rx_offload_threaded_irq_finish(&priv->offload);
1606 can_rx_offload_threaded_irq_finish(&priv->offload);
1608 netdev_err(priv->ndev, "IRQ handler returned %d (intf=0x%08x).\n",
1609 err, priv->regs_status.intf);
1610 mcp251xfd_dump(priv);
1611 mcp251xfd_chip_interrupts_disable(priv);
1612 mcp251xfd_timestamp_stop(priv);
1619 struct mcp251xfd_priv *priv = netdev_priv(ndev);
1620 const struct spi_device *spi = priv->spi;
1631 err = mcp251xfd_ring_alloc(priv);
1635 err = mcp251xfd_transceiver_enable(priv);
1639 mcp251xfd_timestamp_init(priv);
1641 err = mcp251xfd_chip_start(priv);
1645 clear_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
1646 can_rx_offload_enable(&priv->offload);
1648 priv->wq = alloc_ordered_workqueue("%s-mcp251xfd_wq",
1651 if (!priv->wq) {
1655 INIT_WORK(&priv->tx_work, mcp251xfd_tx_obj_write_sync);
1659 dev_name(&spi->dev), priv);
1663 err = mcp251xfd_chip_interrupts_enable(priv);
1672 free_irq(spi->irq, priv);
1674 destroy_workqueue(priv->wq);
1676 can_rx_offload_disable(&priv->offload);
1677 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
1679 mcp251xfd_transceiver_disable(priv);
1681 mcp251xfd_ring_free(priv);
1683 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
1693 struct mcp251xfd_priv *priv = netdev_priv(ndev);
1696 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
1697 hrtimer_cancel(&priv->rx_irq_timer);
1698 hrtimer_cancel(&priv->tx_irq_timer);
1699 mcp251xfd_chip_interrupts_disable(priv);
1700 free_irq(ndev->irq, priv);
1701 destroy_workqueue(priv->wq);
1702 can_rx_offload_disable(&priv->offload);
1703 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
1704 mcp251xfd_transceiver_disable(priv);
1705 mcp251xfd_ring_free(priv);
1722 mcp251xfd_register_quirks(struct mcp251xfd_priv *priv)
1724 const struct spi_device *spi = priv->spi;
1728 priv->devtype_data.quirks |= MCP251XFD_QUIRK_HALF_DUPLEX;
1731 static int mcp251xfd_register_chip_detect(struct mcp251xfd_priv *priv)
1733 const struct net_device *ndev = priv->ndev;
1741 err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_OSC,
1747 err = regmap_read(priv->map_reg, MCP251XFD_REG_OSC, &osc);
1756 if (mcp251xfd_is_251863(priv))
1764 if (!mcp251xfd_is_251XFD(priv) &&
1765 priv->devtype_data.model != devtype_data->model) {
1769 mcp251xfd_get_model_str(priv));
1771 priv->devtype_data = *devtype_data;
1774 mcp251xfd_register_quirks(priv);
1777 return mcp251xfd_regmap_init(priv);
1780 static int mcp251xfd_register_check_rx_int(struct mcp251xfd_priv *priv)
1784 if (!priv->rx_int)
1787 err = mcp251xfd_chip_rx_int_enable(priv);
1794 rx_pending = gpiod_get_value_cansleep(priv->rx_int);
1796 err = mcp251xfd_chip_rx_int_disable(priv);
1803 netdev_info(priv->ndev,
1805 devm_gpiod_put(&priv->spi->dev, priv->rx_int);
1806 priv->rx_int = NULL;
1812 mcp251xfd_register_get_dev_id(const struct mcp251xfd_priv *priv, u32 *dev_id,
1833 xfer[0].speed_hz = priv->spi_max_speed_hz_slow;
1836 xfer[1].speed_hz = priv->spi_max_speed_hz_fast;
1840 err = spi_sync_transfer(priv->spi, xfer, ARRAY_SIZE(xfer));
1857 (priv->devtype_data.quirks & MCP251XFD_QUIRK_##quirk ? '+' : '-')
1860 mcp251xfd_register_done(const struct mcp251xfd_priv *priv)
1866 err = mcp251xfd_register_get_dev_id(priv, &dev_id,
1872 clk_rate = clk_get_rate(priv->clk);
1874 netdev_info(priv->ndev,
1876 mcp251xfd_get_model_str(priv),
1879 priv->rx_int ? '+' : '-',
1880 priv->pll_enable ? '+' : '-',
1889 priv->can.clock.freq / 1000000,
1890 priv->can.clock.freq % 1000000 / 1000 / 10,
1891 priv->spi_max_speed_hz_orig / 1000000,
1892 priv->spi_max_speed_hz_orig % 1000000 / 1000 / 10,
1893 priv->spi_max_speed_hz_slow / 1000000,
1894 priv->spi_max_speed_hz_slow % 1000000 / 1000 / 10,
1897 priv->spi_max_speed_hz_fast / 1000000,
1898 priv->spi_max_speed_hz_fast % 1000000 / 1000 / 10,
1905 static int mcp251xfd_register(struct mcp251xfd_priv *priv)
1907 struct net_device *ndev = priv->ndev;
1910 err = mcp251xfd_clks_and_vdd_enable(priv);
1920 mcp251xfd_register_quirks(priv);
1922 err = mcp251xfd_chip_softreset(priv);
1928 err = mcp251xfd_chip_clock_init(priv);
1934 err = mcp251xfd_register_chip_detect(priv);
1938 err = mcp251xfd_register_check_rx_int(priv);
1942 mcp251xfd_ethtool_init(priv);
1948 err = mcp251xfd_register_done(priv);
1956 err = mcp251xfd_chip_sleep(priv);
1967 mcp251xfd_chip_sleep(priv);
1972 mcp251xfd_clks_and_vdd_disable(priv);
1977 static inline void mcp251xfd_unregister(struct mcp251xfd_priv *priv)
1979 struct net_device *ndev = priv->ndev;
1986 mcp251xfd_clks_and_vdd_disable(priv);
2030 struct mcp251xfd_priv *priv;
2099 priv = netdev_priv(ndev);
2100 spi_set_drvdata(spi, priv);
2101 priv->can.clock.freq = freq;
2103 priv->can.clock.freq *= MCP251XFD_OSC_PLL_MULTIPLIER;
2104 priv->can.do_set_mode = mcp251xfd_set_mode;
2105 priv->can.do_get_berr_counter = mcp251xfd_get_berr_counter;
2106 priv->can.bittiming_const = &mcp251xfd_bittiming_const;
2107 priv->can.fd.data_bittiming_const = &mcp251xfd_data_bittiming_const;
2108 priv->can.fd.tdc_const = &mcp251xfd_tdc_const;
2109 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
2114 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags);
2115 priv->ndev = ndev;
2116 priv->spi = spi;
2117 priv->rx_int = rx_int;
2118 priv->clk = clk;
2119 priv->pll_enable = pll_enable;
2120 priv->reg_vdd = reg_vdd;
2121 priv->reg_xceiver = reg_xceiver;
2122 priv->devtype_data = *(struct mcp251xfd_devtype_data *)spi_get_device_match_data(spi);
2151 priv->spi_max_speed_hz_orig = spi->max_speed_hz;
2152 priv->spi_max_speed_hz_slow = min(spi->max_speed_hz,
2154 if (priv->pll_enable)
2155 priv->spi_max_speed_hz_fast = min(spi->max_speed_hz,
2160 priv->spi_max_speed_hz_fast = priv->spi_max_speed_hz_slow;
2161 spi->max_speed_hz = priv->spi_max_speed_hz_slow;
2168 err = mcp251xfd_regmap_init(priv);
2172 err = can_rx_offload_add_manual(ndev, &priv->offload,
2177 err = mcp251xfd_register(priv);
2180 mcp251xfd_get_model_str(priv));
2187 can_rx_offload_del(&priv->offload);
2189 spi->max_speed_hz = priv->spi_max_speed_hz_orig;
2198 struct mcp251xfd_priv *priv = spi_get_drvdata(spi);
2199 struct net_device *ndev = priv->ndev;
2201 mcp251xfd_unregister(priv);
2202 can_rx_offload_del(&priv->offload);
2203 spi->max_speed_hz = priv->spi_max_speed_hz_orig;
2209 const struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2211 return mcp251xfd_clks_and_vdd_disable(priv);
2216 const struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2218 return mcp251xfd_clks_and_vdd_enable(priv);