Lines Matching defs:priv

66 rkcanfd_get_model_str(const struct rkcanfd_priv *priv)
68 return __rkcanfd_get_model_str(priv->devtype_data.model);
105 static void rkcanfd_chip_set_reset_mode(const struct rkcanfd_priv *priv)
107 reset_control_assert(priv->reset);
109 reset_control_deassert(priv->reset);
111 rkcanfd_write(priv, RKCANFD_REG_MODE, 0x0);
114 static void rkcanfd_chip_set_work_mode(const struct rkcanfd_priv *priv)
116 rkcanfd_write(priv, RKCANFD_REG_MODE, priv->reg_mode_default);
119 static int rkcanfd_set_bittiming(struct rkcanfd_priv *priv)
121 const struct can_bittiming *dbt = &priv->can.fd.data_bittiming;
122 const struct can_bittiming *bt = &priv->can.bittiming;
135 rkcanfd_write(priv, RKCANFD_REG_FD_NOMINAL_BITTIMING, reg_nbt);
137 if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD))
149 rkcanfd_write(priv, RKCANFD_REG_FD_DATA_BITTIMING, reg_dbt);
151 tdco = (priv->can.clock.freq / dbt->bitrate) * 2 / 3;
156 rkcanfd_write(priv, RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION,
162 static void rkcanfd_get_berr_counter_corrected(struct rkcanfd_priv *priv,
168 bec->rxerr = rkcanfd_read(priv, RKCANFD_REG_RXERRORCNT);
169 bec->txerr = rkcanfd_read(priv, RKCANFD_REG_TXERRORCNT);
178 * priv->bec, otherwise save the read value to priv->bec.
181 * priv->bec.rxerr for successfully RX'ed CAN frames.
189 * priv->bec.txerr for successfully TX'ed CAN frames.
192 *bec = priv->bec;
194 priv->bec = *bec;
196 reg_state = rkcanfd_read(priv, RKCANFD_REG_STATE);
197 netdev_vdbg(priv->ndev,
208 struct rkcanfd_priv *priv = netdev_priv(ndev);
215 rkcanfd_get_berr_counter_corrected(priv, bec);
222 static void rkcanfd_chip_interrupts_enable(const struct rkcanfd_priv *priv)
224 rkcanfd_write(priv, RKCANFD_REG_INT_MASK, priv->reg_int_mask_default);
226 netdev_dbg(priv->ndev, "%s: reg_int_mask=0x%08x\n", __func__,
227 rkcanfd_read(priv, RKCANFD_REG_INT_MASK));
230 static void rkcanfd_chip_interrupts_disable(const struct rkcanfd_priv *priv)
232 rkcanfd_write(priv, RKCANFD_REG_INT_MASK, RKCANFD_REG_INT_ALL);
235 static void rkcanfd_chip_fifo_setup(struct rkcanfd_priv *priv)
240 reg = rkcanfd_read(priv, RKCANFD_REG_RX_FIFO_CTRL);
242 rkcanfd_write(priv, RKCANFD_REG_RX_FIFO_CTRL, reg);
244 WRITE_ONCE(priv->tx_head, 0);
245 WRITE_ONCE(priv->tx_tail, 0);
246 netdev_reset_queue(priv->ndev);
249 static void rkcanfd_chip_start(struct rkcanfd_priv *priv)
253 rkcanfd_chip_set_reset_mode(priv);
256 rkcanfd_write(priv, RKCANFD_REG_IDCODE, 0x0);
257 rkcanfd_write(priv, RKCANFD_REG_IDMASK, RKCANFD_REG_IDCODE_EXTENDED_FRAME_ID);
266 reg = rkcanfd_read(priv, RKCANFD_REG_MODE);
267 priv->reg_mode_default = reg |
274 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
275 priv->reg_mode_default |= RKCANFD_REG_MODE_LBACK_MODE |
285 priv->reg_int_mask_default =
294 if (!(priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
295 priv->reg_int_mask_default |= RKCANFD_REG_INT_ERROR_INT;
297 memset(&priv->bec, 0x0, sizeof(priv->bec));
299 rkcanfd_chip_fifo_setup(priv);
300 rkcanfd_timestamp_init(priv);
301 rkcanfd_timestamp_start(priv);
303 rkcanfd_set_bittiming(priv);
305 rkcanfd_chip_interrupts_disable(priv);
306 rkcanfd_chip_set_work_mode(priv);
308 priv->can.state = CAN_STATE_ERROR_ACTIVE;
310 netdev_dbg(priv->ndev, "%s: reg_mode=0x%08x\n", __func__,
311 rkcanfd_read(priv, RKCANFD_REG_MODE));
314 static void __rkcanfd_chip_stop(struct rkcanfd_priv *priv, const enum can_state state)
316 priv->can.state = state;
318 rkcanfd_chip_set_reset_mode(priv);
319 rkcanfd_chip_interrupts_disable(priv);
322 static void rkcanfd_chip_stop(struct rkcanfd_priv *priv, const enum can_state state)
324 priv->can.state = state;
326 rkcanfd_timestamp_stop(priv);
327 __rkcanfd_chip_stop(priv, state);
330 static void rkcanfd_chip_stop_sync(struct rkcanfd_priv *priv, const enum can_state state)
332 priv->can.state = state;
334 rkcanfd_timestamp_stop_sync(priv);
335 __rkcanfd_chip_stop(priv, state);
341 struct rkcanfd_priv *priv = netdev_priv(ndev);
345 rkcanfd_chip_start(priv);
346 rkcanfd_chip_interrupts_enable(priv);
358 rkcanfd_alloc_can_err_skb(struct rkcanfd_priv *priv,
363 *timestamp = rkcanfd_get_timestamp(priv);
365 skb = alloc_can_err_skb(priv->ndev, cf);
367 rkcanfd_skb_set_timestamp(priv, skb, *timestamp);
394 rkcanfd_handle_error_int_reg_ec(struct rkcanfd_priv *priv, struct can_frame *cf,
397 struct net_device_stats *stats = &priv->ndev->stats;
402 reg_cmd = rkcanfd_read(priv, RKCANFD_REG_CMD);
403 reg_state = rkcanfd_read(priv, RKCANFD_REG_STATE);
405 netdev_dbg(priv->ndev, "%s Error in %s %s Phase: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s(0x%08x) CMD=%u RX=%u TX=%u Error-Warning=%u Bus-Off=%u\n",
440 priv->can.can_stats.bus_error++;
522 static int rkcanfd_handle_error_int(struct rkcanfd_priv *priv)
524 struct net_device_stats *stats = &priv->ndev->stats;
530 reg_ec = rkcanfd_read(priv, RKCANFD_REG_ERROR_CODE);
535 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) {
536 skb = rkcanfd_alloc_can_err_skb(priv, &cf, &timestamp);
540 rkcanfd_get_berr_counter_corrected(priv, &bec);
547 rkcanfd_handle_error_int_reg_ec(priv, cf, reg_ec);
552 err = can_rx_offload_queue_timestamp(&priv->offload, skb, timestamp);
559 static int rkcanfd_handle_state_error_int(struct rkcanfd_priv *priv)
561 struct net_device_stats *stats = &priv->ndev->stats;
563 struct net_device *ndev = priv->ndev;
570 rkcanfd_get_berr_counter_corrected(priv, &bec);
574 if (new_state == priv->can.state)
580 skb = rkcanfd_alloc_can_err_skb(priv, &cf, &timestamp);
584 rkcanfd_chip_stop(priv, CAN_STATE_BUS_OFF);
597 err = can_rx_offload_queue_timestamp(&priv->offload, skb, timestamp);
605 rkcanfd_handle_rx_fifo_overflow_int(struct rkcanfd_priv *priv)
607 struct net_device_stats *stats = &priv->ndev->stats;
617 netdev_dbg(priv->ndev, "RX-FIFO overflow\n");
619 skb = rkcanfd_alloc_can_err_skb(priv, &cf, &timestamp);
623 rkcanfd_get_berr_counter_corrected(priv, &bec);
630 err = can_rx_offload_queue_timestamp(&priv->offload, skb, timestamp);
637 #define rkcanfd_handle(priv, irq, ...) \
639 struct rkcanfd_priv *_priv = (priv); \
652 struct rkcanfd_priv *priv = dev_id;
655 reg_int_unmasked = rkcanfd_read(priv, RKCANFD_REG_INT);
656 reg_int = reg_int_unmasked & ~priv->reg_int_mask_default;
664 rkcanfd_write(priv, RKCANFD_REG_INT, reg_int);
667 rkcanfd_handle(priv, rx_int);
670 rkcanfd_handle(priv, error_int);
675 priv->can.state > CAN_STATE_ERROR_ACTIVE)
676 rkcanfd_handle(priv, state_error_int);
679 rkcanfd_handle(priv, rx_fifo_overflow_int);
684 netdev_err(priv->ndev, "%s: int=0x%08x\n", __func__, reg_int);
687 netdev_info(priv->ndev, "%s: WAKEUP_INT\n", __func__);
690 netdev_info(priv->ndev, "%s: TXE_FIFO_FULL_INT\n", __func__);
693 netdev_info(priv->ndev, "%s: TXE_FIFO_OV_INT\n", __func__);
696 netdev_info(priv->ndev, "%s: BUS_OFF_RECOVERY_INT\n", __func__);
699 netdev_info(priv->ndev, "%s: RX_FIFO_FULL_INT\n", __func__);
702 netdev_info(priv->ndev, "%s: OVERLOAD_INT\n", __func__);
704 can_rx_offload_irq_finish(&priv->offload);
711 struct rkcanfd_priv *priv = netdev_priv(ndev);
722 rkcanfd_chip_start(priv);
723 can_rx_offload_enable(&priv->offload);
725 err = request_irq(ndev->irq, rkcanfd_irq, IRQF_SHARED, ndev->name, priv);
729 rkcanfd_chip_interrupts_enable(priv);
736 rkcanfd_chip_stop_sync(priv, CAN_STATE_STOPPED);
745 struct rkcanfd_priv *priv = netdev_priv(ndev);
749 rkcanfd_chip_interrupts_disable(priv);
750 free_irq(ndev->irq, priv);
751 can_rx_offload_disable(&priv->offload);
752 rkcanfd_chip_stop_sync(priv, CAN_STATE_STOPPED);
769 struct rkcanfd_priv *priv = dev_get_drvdata(dev);
771 clk_bulk_disable_unprepare(priv->clks_num, priv->clks);
778 struct rkcanfd_priv *priv = dev_get_drvdata(dev);
780 return clk_bulk_prepare_enable(priv->clks_num, priv->clks);
783 static void rkcanfd_register_done(const struct rkcanfd_priv *priv)
787 dev_id = rkcanfd_read(priv, RKCANFD_REG_RTL_VERSION);
789 netdev_info(priv->ndev,
791 rkcanfd_get_model_str(priv),
794 priv->devtype_data.quirks);
796 if (priv->devtype_data.quirks & RKCANFD_QUIRK_RK3568_ERRATUM_5 &&
797 priv->can.clock.freq < RKCANFD_ERRATUM_5_SYSCLOCK_HZ_MIN)
798 netdev_info(priv->ndev,
800 priv->can.clock.freq / MEGA,
804 static int rkcanfd_register(struct rkcanfd_priv *priv)
806 struct net_device *ndev = priv->ndev;
815 rkcanfd_ethtool_init(priv);
821 rkcanfd_register_done(priv);
835 static inline void rkcanfd_unregister(struct rkcanfd_priv *priv)
837 struct net_device *ndev = priv->ndev;
858 struct rkcanfd_priv *priv;
867 priv = netdev_priv(ndev);
875 priv->clks_num = devm_clk_bulk_get_all(&pdev->dev, &priv->clks);
876 if (priv->clks_num < 0) {
877 err = priv->clks_num;
881 priv->regs = devm_platform_ioremap_resource(pdev, 0);
882 if (IS_ERR(priv->regs)) {
883 err = PTR_ERR(priv->regs);
887 priv->reset = devm_reset_control_array_get_exclusive(&pdev->dev);
888 if (IS_ERR(priv->reset)) {
889 err = dev_err_probe(&pdev->dev, PTR_ERR(priv->reset),
899 platform_set_drvdata(pdev, priv);
900 priv->can.clock.freq = clk_get_rate(priv->clks[0].clk);
901 priv->can.bittiming_const = &rkcanfd_bittiming_const;
902 priv->can.fd.data_bittiming_const = &rkcanfd_data_bittiming_const;
903 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
905 priv->can.do_set_mode = rkcanfd_set_mode;
906 priv->can.do_get_berr_counter = rkcanfd_get_berr_counter;
907 priv->ndev = ndev;
911 priv->devtype_data = *(struct rkcanfd_devtype_data *)match;
912 if (!(priv->devtype_data.quirks & RKCANFD_QUIRK_CANFD_BROKEN))
913 priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD;
916 err = can_rx_offload_add_manual(ndev, &priv->offload,
921 err = rkcanfd_register(priv);
928 can_rx_offload_del(&priv->offload);
937 struct rkcanfd_priv *priv = platform_get_drvdata(pdev);
938 struct net_device *ndev = priv->ndev;
940 rkcanfd_unregister(priv);
941 can_rx_offload_del(&priv->offload);