Lines Matching full:nor
18 #include <linux/mtd/spi-nor.h>
51 * @nor: pointer to a 'struct spi_nor'
59 static u8 spi_nor_get_cmd_ext(const struct spi_nor *nor,
62 switch (nor->cmd_ext_type) {
70 dev_err(nor->dev, "Unknown command extension type\n");
77 * @nor: pointer to a 'struct spi_nor'
82 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
103 * something like 4S-4D-4D, but SPI NOR can't. So, set all 4
114 ext = spi_nor_get_cmd_ext(nor, op);
119 if (proto == SNOR_PROTO_8_8_8_DTR && nor->flags & SNOR_F_SWAP16)
126 * @nor: pointer to 'struct spi_nor'
133 static bool spi_nor_spimem_bounce(struct spi_nor *nor, struct spi_mem_op *op)
138 if (op->data.nbytes > nor->bouncebuf_size)
139 op->data.nbytes = nor->bouncebuf_size;
140 op->data.buf.in = nor->bouncebuf;
149 * @nor: pointer to 'struct spi_nor'
154 static int spi_nor_spimem_exec_op(struct spi_nor *nor, struct spi_mem_op *op)
158 error = spi_mem_adjust_op_size(nor->spimem, op);
162 return spi_mem_exec_op(nor->spimem, op);
165 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
168 if (spi_nor_protocol_is_dtr(nor->reg_proto))
171 return nor->controller_ops->read_reg(nor, opcode, buf, len);
174 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
177 if (spi_nor_protocol_is_dtr(nor->reg_proto))
180 return nor->controller_ops->write_reg(nor, opcode, buf, len);
183 static int spi_nor_controller_ops_erase(struct spi_nor *nor, loff_t offs)
185 if (spi_nor_protocol_is_dtr(nor->reg_proto))
188 return nor->controller_ops->erase(nor, offs);
194 * @nor: pointer to 'struct spi_nor'
201 static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t from,
205 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 0),
206 SPI_MEM_OP_ADDR(nor->addr_nbytes, from, 0),
207 SPI_MEM_OP_DUMMY(nor->read_dummy, 0),
213 spi_nor_spimem_setup_op(nor, &op, nor->read_proto);
216 op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
217 if (spi_nor_protocol_is_dtr(nor->read_proto))
220 usebouncebuf = spi_nor_spimem_bounce(nor, &op);
222 if (nor->dirmap.rdesc) {
223 nbytes = spi_mem_dirmap_read(nor->dirmap.rdesc, op.addr.val,
226 error = spi_nor_spimem_exec_op(nor, &op);
240 * @nor: pointer to 'struct spi_nor'
247 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, u8 *buf)
249 if (nor->spimem)
250 return spi_nor_spimem_read_data(nor, from, len, buf);
252 return nor->controller_ops->read(nor, from, len, buf);
258 * @nor: pointer to 'struct spi_nor'
265 static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to,
269 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 0),
270 SPI_MEM_OP_ADDR(nor->addr_nbytes, to, 0),
276 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
279 spi_nor_spimem_setup_op(nor, &op, nor->write_proto);
281 if (spi_nor_spimem_bounce(nor, &op))
282 memcpy(nor->bouncebuf, buf, op.data.nbytes);
284 if (nor->dirmap.wdesc) {
285 nbytes = spi_mem_dirmap_write(nor->dirmap.wdesc, op.addr.val,
288 error = spi_nor_spimem_exec_op(nor, &op);
299 * @nor: pointer to 'struct spi_nor'
306 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
309 if (nor->spimem)
310 return spi_nor_spimem_write_data(nor, to, len, buf);
312 return nor->controller_ops->write(nor, to, len, buf);
318 * @nor: pointer to 'struct spi_nor'.
324 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,
327 if (!nor->spimem)
330 spi_nor_spimem_setup_op(nor, op, proto);
331 return spi_nor_spimem_exec_op(nor, op);
337 * @nor: pointer to 'struct spi_nor'
346 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,
351 if (!nor->spimem)
354 ret = spi_nor_write_enable(nor);
357 spi_nor_spimem_setup_op(nor, op, proto);
358 return spi_nor_spimem_exec_op(nor, op);
363 * @nor: pointer to 'struct spi_nor'.
367 int spi_nor_write_enable(struct spi_nor *nor)
371 if (nor->spimem) {
374 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
376 ret = spi_mem_exec_op(nor->spimem, &op);
378 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WREN,
383 dev_dbg(nor->dev, "error %d on Write Enable\n", ret);
390 * @nor: pointer to 'struct spi_nor'.
394 int spi_nor_write_disable(struct spi_nor *nor)
398 if (nor->spimem) {
401 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
403 ret = spi_mem_exec_op(nor->spimem, &op);
405 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRDI,
410 dev_dbg(nor->dev, "error %d on Write Disable\n", ret);
417 * @nor: pointer to 'struct spi_nor'.
428 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
433 if (nor->spimem) {
437 spi_nor_spimem_setup_op(nor, &op, proto);
438 ret = spi_mem_exec_op(nor->spimem, &op);
440 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDID, id,
448 * @nor: pointer to 'struct spi_nor'.
454 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
458 if (nor->spimem) {
461 if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
462 op.addr.nbytes = nor->params->rdsr_addr_nbytes;
463 op.dummy.nbytes = nor->params->rdsr_dummy;
471 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
473 ret = spi_mem_exec_op(nor->spimem, &op);
475 ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR, sr,
480 dev_dbg(nor->dev, "error %d reading SR\n", ret);
488 * @nor: pointer to 'struct spi_nor'
494 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr)
498 if (nor->spimem) {
501 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
503 ret = spi_mem_exec_op(nor->spimem, &op);
505 ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDCR, cr,
510 dev_dbg(nor->dev, "error %d reading CR\n", ret);
519 * @nor: pointer to 'struct spi_nor'.
525 int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable)
529 if (nor->spimem) {
532 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
534 ret = spi_mem_exec_op(nor->spimem, &op);
536 ret = spi_nor_controller_ops_write_reg(nor,
543 dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
552 * @nor: pointer to 'struct spi_nor'.
558 int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor, bool enable)
562 ret = spi_nor_write_enable(nor);
566 ret = spi_nor_set_4byte_addr_mode_en4b_ex4b(nor, enable);
570 return spi_nor_write_disable(nor);
576 * @nor: pointer to 'struct spi_nor'.
587 int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable)
591 nor->bouncebuf[0] = enable << 7;
593 if (nor->spimem) {
594 struct spi_mem_op op = SPI_NOR_BRWR_OP(nor->bouncebuf);
596 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
598 ret = spi_mem_exec_op(nor->spimem, &op);
600 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_BRWR,
601 nor->bouncebuf, 1);
605 dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
613 * @nor: pointer to 'struct spi_nor'.
617 int spi_nor_sr_ready(struct spi_nor *nor)
621 ret = spi_nor_read_sr(nor, nor->bouncebuf);
625 return !(nor->bouncebuf[0] & SR_WIP);
630 * @nor: pointer to 'struct spi_nor'.
634 static bool spi_nor_use_parallel_locking(struct spi_nor *nor)
636 return nor->flags & SNOR_F_RWW;
640 static int spi_nor_rww_start_rdst(struct spi_nor *nor)
642 struct spi_nor_rww *rww = &nor->rww;
644 guard(mutex)(&nor->lock);
655 static void spi_nor_rww_end_rdst(struct spi_nor *nor)
657 struct spi_nor_rww *rww = &nor->rww;
659 guard(mutex)(&nor->lock);
665 static int spi_nor_lock_rdst(struct spi_nor *nor)
667 if (spi_nor_use_parallel_locking(nor))
668 return spi_nor_rww_start_rdst(nor);
673 static void spi_nor_unlock_rdst(struct spi_nor *nor)
675 if (spi_nor_use_parallel_locking(nor)) {
676 spi_nor_rww_end_rdst(nor);
677 wake_up(&nor->rww.wait);
683 * @nor: pointer to 'struct spi_nor'.
687 static int spi_nor_ready(struct spi_nor *nor)
691 ret = spi_nor_lock_rdst(nor);
696 if (nor->params->ready)
697 ret = nor->params->ready(nor);
699 ret = spi_nor_sr_ready(nor);
701 spi_nor_unlock_rdst(nor);
709 * @nor: pointer to "struct spi_nor".
714 static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
726 ret = spi_nor_ready(nor);
735 dev_dbg(nor->dev, "flash operation timed out\n");
743 * @nor: pointer to "struct spi_nor".
747 int spi_nor_wait_till_ready(struct spi_nor *nor)
749 return spi_nor_wait_till_ready_with_timeout(nor,
755 * @nor: pointer to 'struct spi_nor'.
759 int spi_nor_global_block_unlock(struct spi_nor *nor)
763 ret = spi_nor_write_enable(nor);
767 if (nor->spimem) {
770 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
772 ret = spi_mem_exec_op(nor->spimem, &op);
774 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_GBULK,
779 dev_dbg(nor->dev, "error %d on Global Block Unlock\n", ret);
783 return spi_nor_wait_till_ready(nor);
788 * @nor: pointer to 'struct spi_nor'.
794 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len)
798 ret = spi_nor_write_enable(nor);
802 if (nor->spimem) {
805 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
807 ret = spi_mem_exec_op(nor->spimem, &op);
809 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR, sr,
814 dev_dbg(nor->dev, "error %d writing SR\n", ret);
818 return spi_nor_wait_till_ready(nor);
824 * @nor: pointer to a 'struct spi_nor'.
829 static int spi_nor_write_sr1_and_check(struct spi_nor *nor, u8 sr1)
833 nor->bouncebuf[0] = sr1;
835 ret = spi_nor_write_sr(nor, nor->bouncebuf, 1);
839 ret = spi_nor_read_sr(nor, nor->bouncebuf);
843 if (nor->bouncebuf[0] != sr1) {
844 dev_dbg(nor->dev, "SR1: read back test failed\n");
856 * @nor: pointer to a 'struct spi_nor'.
861 static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1)
864 u8 *sr_cr = nor->bouncebuf;
868 if (!(nor->flags & SNOR_F_NO_READ_CR)) {
869 ret = spi_nor_read_cr(nor, &sr_cr[1]);
872 } else if (spi_nor_get_protocol_width(nor->read_proto) == 4 &&
873 spi_nor_get_protocol_width(nor->write_proto) == 4 &&
874 nor->params->quad_enable) {
882 * consequence of the nor->params->quad_enable() call.
896 ret = spi_nor_write_sr(nor, sr_cr, 2);
900 ret = spi_nor_read_sr(nor, sr_cr);
905 dev_dbg(nor->dev, "SR: Read back test failed\n");
909 if (nor->flags & SNOR_F_NO_READ_CR)
914 ret = spi_nor_read_cr(nor, &sr_cr[1]);
919 dev_dbg(nor->dev, "CR: read back test failed\n");
931 * @nor: pointer to a 'struct spi_nor'.
936 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr)
939 u8 *sr_cr = nor->bouncebuf;
943 ret = spi_nor_read_sr(nor, sr_cr);
949 ret = spi_nor_write_sr(nor, sr_cr, 2);
955 ret = spi_nor_read_sr(nor, sr_cr);
960 dev_dbg(nor->dev, "SR: Read back test failed\n");
964 if (nor->flags & SNOR_F_NO_READ_CR)
967 ret = spi_nor_read_cr(nor, &sr_cr[1]);
972 dev_dbg(nor->dev, "CR: read back test failed\n");
983 * @nor: pointer to a 'struct spi_nor'.
988 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1)
990 if (nor->flags & SNOR_F_HAS_16BIT_SR)
991 return spi_nor_write_16bit_sr_and_check(nor, sr1);
993 return spi_nor_write_sr1_and_check(nor, sr1);
999 * @nor: pointer to 'struct spi_nor'.
1004 static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
1008 ret = spi_nor_write_enable(nor);
1012 if (nor->spimem) {
1015 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
1017 ret = spi_mem_exec_op(nor->spimem, &op);
1019 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR2,
1024 dev_dbg(nor->dev, "error %d writing SR2\n", ret);
1028 return spi_nor_wait_till_ready(nor);
1034 * @nor: pointer to 'struct spi_nor'.
1040 static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
1044 if (nor->spimem) {
1047 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
1049 ret = spi_mem_exec_op(nor->spimem, &op);
1051 ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR2, sr2,
1056 dev_dbg(nor->dev, "error %d reading SR2\n", ret);
1063 * @nor: pointer to 'struct spi_nor'.
1069 static int spi_nor_erase_die(struct spi_nor *nor, loff_t addr, size_t die_size)
1071 bool multi_die = nor->mtd.size != die_size;
1074 dev_dbg(nor->dev, " %lldKiB\n", (long long)(die_size >> 10));
1076 if (nor->spimem) {
1078 SPI_NOR_DIE_ERASE_OP(nor->params->die_erase_opcode,
1079 nor->addr_nbytes, addr, multi_die);
1081 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
1083 ret = spi_mem_exec_op(nor->spimem, &op);
1088 ret = spi_nor_controller_ops_write_reg(nor,
1094 dev_dbg(nor->dev, "error %d erasing chip\n", ret);
1158 static bool spi_nor_has_uniform_erase(const struct spi_nor *nor)
1160 return !!nor->params->erase_map.uniform_region.erase_mask;
1163 static void spi_nor_set_4byte_opcodes(struct spi_nor *nor)
1165 nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode);
1166 nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode);
1167 nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode);
1169 if (!spi_nor_has_uniform_erase(nor)) {
1170 struct spi_nor_erase_map *map = &nor->params->erase_map;
1182 static int spi_nor_prep(struct spi_nor *nor)
1186 if (nor->controller_ops && nor->controller_ops->prepare)
1187 ret = nor->controller_ops->prepare(nor);
1192 static void spi_nor_unprep(struct spi_nor *nor)
1194 if (nor->controller_ops && nor->controller_ops->unprepare)
1195 nor->controller_ops->unprepare(nor);
1207 static bool spi_nor_rww_start_io(struct spi_nor *nor)
1209 struct spi_nor_rww *rww = &nor->rww;
1211 guard(mutex)(&nor->lock);
1221 static void spi_nor_rww_end_io(struct spi_nor *nor)
1223 guard(mutex)(&nor->lock);
1224 nor->rww.ongoing_io = false;
1227 static int spi_nor_lock_device(struct spi_nor *nor)
1229 if (!spi_nor_use_parallel_locking(nor))
1232 return wait_event_killable(nor->rww.wait, spi_nor_rww_start_io(nor));
1235 static void spi_nor_unlock_device(struct spi_nor *nor)
1237 if (spi_nor_use_parallel_locking(nor)) {
1238 spi_nor_rww_end_io(nor);
1239 wake_up(&nor->rww.wait);
1244 static bool spi_nor_rww_start_exclusive(struct spi_nor *nor)
1246 struct spi_nor_rww *rww = &nor->rww;
1248 mutex_lock(&nor->lock);
1260 static void spi_nor_rww_end_exclusive(struct spi_nor *nor)
1262 struct spi_nor_rww *rww = &nor->rww;
1264 guard(mutex)(&nor->lock);
1270 int spi_nor_prep_and_lock(struct spi_nor *nor)
1274 ret = spi_nor_prep(nor);
1278 if (!spi_nor_use_parallel_locking(nor))
1279 mutex_lock(&nor->lock);
1281 ret = wait_event_killable(nor->rww.wait,
1282 spi_nor_rww_start_exclusive(nor));
1287 void spi_nor_unlock_and_unprep(struct spi_nor *nor)
1289 if (!spi_nor_use_parallel_locking(nor)) {
1290 mutex_unlock(&nor->lock);
1292 spi_nor_rww_end_exclusive(nor);
1293 wake_up(&nor->rww.wait);
1296 spi_nor_unprep(nor);
1300 static bool spi_nor_rww_start_pe(struct spi_nor *nor, loff_t start, size_t len)
1302 struct spi_nor_rww *rww = &nor->rww;
1307 guard(mutex)(&nor->lock);
1312 spi_nor_offset_to_banks(nor->params->bank_size, start, len, &first, &last);
1326 static void spi_nor_rww_end_pe(struct spi_nor *nor, loff_t start, size_t len)
1328 struct spi_nor_rww *rww = &nor->rww;
1332 guard(mutex)(&nor->lock);
1334 spi_nor_offset_to_banks(nor->params->bank_size, start, len, &first, &last);
1341 static int spi_nor_prep_and_lock_pe(struct spi_nor *nor, loff_t start, size_t len)
1345 ret = spi_nor_prep(nor);
1349 if (!spi_nor_use_parallel_locking(nor))
1350 mutex_lock(&nor->lock);
1352 ret = wait_event_killable(nor->rww.wait,
1353 spi_nor_rww_start_pe(nor, start, len));
1358 static void spi_nor_unlock_and_unprep_pe(struct spi_nor *nor, loff_t start, size_t len)
1360 if (!spi_nor_use_parallel_locking(nor)) {
1361 mutex_unlock(&nor->lock);
1363 spi_nor_rww_end_pe(nor, start, len);
1364 wake_up(&nor->rww.wait);
1367 spi_nor_unprep(nor);
1371 static bool spi_nor_rww_start_rd(struct spi_nor *nor, loff_t start, size_t len)
1373 struct spi_nor_rww *rww = &nor->rww;
1378 guard(mutex)(&nor->lock);
1383 spi_nor_offset_to_banks(nor->params->bank_size, start, len, &first, &last);
1398 static void spi_nor_rww_end_rd(struct spi_nor *nor, loff_t start, size_t len)
1400 struct spi_nor_rww *rww = &nor->rww;
1404 guard(mutex)(&nor->lock);
1406 spi_nor_offset_to_banks(nor->params->bank_size, start, len, &first, &last);
1408 nor->rww.used_banks &= ~BIT(bank);
1414 static int spi_nor_prep_and_lock_rd(struct spi_nor *nor, loff_t start, size_t len)
1418 ret = spi_nor_prep(nor);
1422 if (!spi_nor_use_parallel_locking(nor))
1423 mutex_lock(&nor->lock);
1425 ret = wait_event_killable(nor->rww.wait,
1426 spi_nor_rww_start_rd(nor, start, len));
1431 static void spi_nor_unlock_and_unprep_rd(struct spi_nor *nor, loff_t start, size_t len)
1433 if (!spi_nor_use_parallel_locking(nor)) {
1434 mutex_unlock(&nor->lock);
1436 spi_nor_rww_end_rd(nor, start, len);
1437 wake_up(&nor->rww.wait);
1440 spi_nor_unprep(nor);
1446 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
1450 if (nor->spimem) {
1452 SPI_NOR_SECTOR_ERASE_OP(nor->erase_opcode,
1453 nor->addr_nbytes, addr);
1455 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
1457 return spi_mem_exec_op(nor->spimem, &op);
1458 } else if (nor->controller_ops->erase) {
1459 return spi_nor_controller_ops_erase(nor, addr);
1466 for (i = nor->addr_nbytes - 1; i >= 0; i--) {
1467 nor->bouncebuf[i] = addr & 0xff;
1471 return spi_nor_controller_ops_write_reg(nor, nor->erase_opcode,
1472 nor->bouncebuf, nor->addr_nbytes);
1477 * @erase: pointer to a structure that describes a SPI NOR erase type
1497 * @map: the erase map of the SPI NOR
1498 * @region: pointer to a structure that describes a SPI NOR erase region
1544 * @region: pointer to a structure that describes a SPI NOR erase region
1545 * @erase: pointer to a structure that describes a SPI NOR erase type
1588 * @nor: pointer to a 'struct spi_nor'
1599 static int spi_nor_init_erase_cmd_list(struct spi_nor *nor,
1603 const struct spi_nor_erase_map *map = &nor->params->erase_map;
1649 * @nor: pointer to a 'struct spi_nor'
1658 static int spi_nor_erase_multi_sectors(struct spi_nor *nor, u64 addr, u32 len)
1664 ret = spi_nor_init_erase_cmd_list(nor, &erase_list, addr, len);
1669 nor->erase_opcode = cmd->opcode;
1671 dev_vdbg(nor->dev, "erase_cmd->size = 0x%08x, erase_cmd->opcode = 0x%02x, erase_cmd->count = %u\n",
1674 ret = spi_nor_lock_device(nor);
1678 ret = spi_nor_write_enable(nor);
1680 spi_nor_unlock_device(nor);
1684 ret = spi_nor_erase_sector(nor, addr);
1685 spi_nor_unlock_device(nor);
1689 ret = spi_nor_wait_till_ready(nor);
1707 static int spi_nor_erase_dice(struct spi_nor *nor, loff_t addr,
1721 (unsigned long)(nor->mtd.size / SZ_2M));
1724 ret = spi_nor_lock_device(nor);
1728 ret = spi_nor_write_enable(nor);
1730 spi_nor_unlock_device(nor);
1734 ret = spi_nor_erase_die(nor, addr, die_size);
1736 spi_nor_unlock_device(nor);
1740 ret = spi_nor_wait_till_ready_with_timeout(nor, timeout);
1753 * Erase an address range on the nor chip. The address range may extend
1758 struct spi_nor *nor = mtd_to_spi_nor(mtd);
1759 u8 n_dice = nor->params->n_dice;
1765 dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr,
1768 if (spi_nor_has_uniform_erase(nor)) {
1785 ret = spi_nor_prep_and_lock_pe(nor, instr->addr, instr->len);
1790 if ((len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) ||
1792 ret = spi_nor_erase_dice(nor, addr, len, die_size);
1802 } else if (spi_nor_has_uniform_erase(nor)) {
1804 ret = spi_nor_lock_device(nor);
1808 ret = spi_nor_write_enable(nor);
1810 spi_nor_unlock_device(nor);
1814 ret = spi_nor_erase_sector(nor, addr);
1815 spi_nor_unlock_device(nor);
1819 ret = spi_nor_wait_till_ready(nor);
1829 ret = spi_nor_erase_multi_sectors(nor, addr, len);
1834 ret = spi_nor_write_disable(nor);
1837 spi_nor_unlock_and_unprep_pe(nor, instr->addr, instr->len);
1845 * @nor: pointer to a 'struct spi_nor'
1851 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor)
1855 ret = spi_nor_read_sr(nor, nor->bouncebuf);
1859 if (nor->bouncebuf[0] & SR1_QUAD_EN_BIT6)
1862 nor->bouncebuf[0] |= SR1_QUAD_EN_BIT6;
1864 return spi_nor_write_sr1_and_check(nor, nor->bouncebuf[0]);
1870 * @nor: pointer to a 'struct spi_nor'.
1876 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor)
1880 if (nor->flags & SNOR_F_NO_READ_CR)
1881 return spi_nor_write_16bit_cr_and_check(nor, SR2_QUAD_EN_BIT1);
1883 ret = spi_nor_read_cr(nor, nor->bouncebuf);
1887 if (nor->bouncebuf[0] & SR2_QUAD_EN_BIT1)
1890 nor->bouncebuf[0] |= SR2_QUAD_EN_BIT1;
1892 return spi_nor_write_16bit_cr_and_check(nor, nor->bouncebuf[0]);
1897 * @nor: pointer to a 'struct spi_nor'
1907 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor)
1909 u8 *sr2 = nor->bouncebuf;
1914 ret = spi_nor_read_sr2(nor, sr2);
1923 ret = spi_nor_write_sr2(nor, sr2);
1930 ret = spi_nor_read_sr2(nor, sr2);
1935 dev_dbg(nor->dev, "SR2: Read back test failed\n");
1960 .name = "spi-nor-generic",
1963 static const struct flash_info *spi_nor_match_id(struct spi_nor *nor,
1974 nor->manufacturer = manufacturers[i];
1983 static const struct flash_info *spi_nor_detect(struct spi_nor *nor)
1986 u8 *id = nor->bouncebuf;
1989 ret = spi_nor_read_id(nor, 0, 0, id, nor->reg_proto);
1991 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", ret);
1996 nor->id = devm_kmemdup(nor->dev, id, SPI_NOR_MAX_ID_LEN, GFP_KERNEL);
1997 if (!nor->id)
2000 info = spi_nor_match_id(nor, id);
2004 ret = spi_nor_check_sfdp_signature(nor);
2010 dev_err(nor->dev, "unrecognized JEDEC id bytes: %*ph\n",
2020 struct spi_nor *nor = mtd_to_spi_nor(mtd);
2025 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len);
2027 ret = spi_nor_prep_and_lock_rd(nor, from_lock, len_lock);
2034 ret = spi_nor_read_data(nor, addr, len, buf);
2052 spi_nor_unlock_and_unprep_rd(nor, from_lock, len_lock);
2058 * Write an address range to the nor chip. Data must be written in
2065 struct spi_nor *nor = mtd_to_spi_nor(mtd);
2068 u32 page_size = nor->params->page_size;
2070 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
2072 ret = spi_nor_prep_and_lock_pe(nor, to, len);
2083 ret = spi_nor_lock_device(nor);
2087 ret = spi_nor_write_enable(nor);
2089 spi_nor_unlock_device(nor);
2093 ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
2094 spi_nor_unlock_device(nor);
2099 ret = spi_nor_wait_till_ready(nor);
2107 spi_nor_unlock_and_unprep_pe(nor, to, len);
2112 static int spi_nor_check(struct spi_nor *nor)
2114 if (!nor->dev ||
2115 (!nor->spimem && !nor->controller_ops) ||
2116 (!nor->spimem && nor->controller_ops &&
2117 (!nor->controller_ops->read ||
2118 !nor->controller_ops->write ||
2119 !nor->controller_ops->read_reg ||
2120 !nor->controller_ops->write_reg))) {
2121 pr_err("spi-nor: please fill all the necessary fields!\n");
2125 if (nor->spimem && nor->controller_ops) {
2126 dev_err(nor->dev, "nor->spimem and nor->controller_ops are mutually exclusive, please set just one of them.\n");
2209 *@nor: pointer to a 'struct spi_nor'
2214 static int spi_nor_spimem_check_op(struct spi_nor *nor,
2224 if (!spi_mem_supports_op(nor->spimem, op)) {
2225 if (nor->params->size > SZ_16M)
2230 if (!spi_mem_supports_op(nor->spimem, op))
2240 *@nor: pointer to a 'struct spi_nor'
2245 static int spi_nor_spimem_check_readop(struct spi_nor *nor,
2250 spi_nor_spimem_setup_op(nor, &op, read->proto);
2255 if (spi_nor_protocol_is_dtr(nor->read_proto))
2258 return spi_nor_spimem_check_op(nor, &op);
2264 *@nor: pointer to a 'struct spi_nor'
2269 static int spi_nor_spimem_check_pp(struct spi_nor *nor,
2274 spi_nor_spimem_setup_op(nor, &op, pp->proto);
2276 return spi_nor_spimem_check_op(nor, &op);
2282 * @nor: pointer to a 'struct spi_nor'
2287 spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps)
2289 struct spi_nor_flash_parameter *params = nor->params;
2299 if (nor->flags & SNOR_F_BROKEN_RESET)
2310 spi_nor_spimem_check_readop(nor, ¶ms->reads[rdidx]))
2317 if (spi_nor_spimem_check_pp(nor,
2324 * spi_nor_set_erase_type() - set a SPI NOR erase type
2325 * @erase: pointer to a structure that describes a SPI NOR erase type
2340 * spi_nor_mask_erase_type() - mask out a SPI NOR erase type
2341 * @erase: pointer to a structure that describes a SPI NOR erase type
2350 * @map: the erase map of the SPI NOR
2353 * @flash_size: the spi nor flash memory size
2365 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
2371 if (nor->manufacturer && nor->manufacturer->fixups &&
2372 nor->manufacturer->fixups->post_bfpt) {
2373 ret = nor->manufacturer->fixups->post_bfpt(nor, bfpt_header,
2379 if (nor->info->fixups && nor->info->fixups->post_bfpt)
2380 return nor->info->fixups->post_bfpt(nor, bfpt_header, bfpt);
2385 static int spi_nor_select_read(struct spi_nor *nor,
2398 read = &nor->params->reads[cmd];
2399 nor->read_opcode = read->opcode;
2400 nor->read_proto = read->proto;
2403 * In the SPI NOR framework, we don't need to make the difference
2412 nor->read_dummy = read->num_mode_clocks + read->num_wait_states;
2416 static int spi_nor_select_pp(struct spi_nor *nor,
2429 pp = &nor->params->page_programs[cmd];
2430 nor->program_opcode = pp->opcode;
2431 nor->write_proto = pp->proto;
2437 * @map: the erase map of the SPI NOR
2492 static int spi_nor_select_erase(struct spi_nor *nor)
2494 struct spi_nor_erase_map *map = &nor->params->erase_map;
2496 struct mtd_info *mtd = &nor->mtd;
2507 if (spi_nor_has_uniform_erase(nor)) {
2511 nor->erase_opcode = erase->opcode;
2518 * maximum erase sector size. No need to set nor->erase_opcode.
2534 static int spi_nor_set_addr_nbytes(struct spi_nor *nor)
2536 if (nor->params->addr_nbytes) {
2537 nor->addr_nbytes = nor->params->addr_nbytes;
2538 } else if (nor->read_proto == SNOR_PROTO_8_8_8_DTR) {
2551 nor->addr_nbytes = 4;
2552 } else if (nor->info->addr_nbytes) {
2553 nor->addr_nbytes = nor->info->addr_nbytes;
2555 nor->addr_nbytes = 3;
2558 if (nor->addr_nbytes == 3 && nor->params->size > 0x1000000) {
2560 nor->addr_nbytes = 4;
2563 if (nor->addr_nbytes > SPI_NOR_MAX_ADDR_NBYTES) {
2564 dev_dbg(nor->dev, "The number of address bytes is too large: %u\n",
2565 nor->addr_nbytes);
2570 if (nor->addr_nbytes == 4 && nor->flags & SNOR_F_4B_OPCODES &&
2571 !(nor->flags & SNOR_F_HAS_4BAIT))
2572 spi_nor_set_4byte_opcodes(nor);
2577 static int spi_nor_setup(struct spi_nor *nor,
2580 struct spi_nor_flash_parameter *params = nor->params;
2590 if (nor->spimem) {
2596 spi_nor_spimem_adjust_hwcaps(nor, &shared_mask);
2605 dev_dbg(nor->dev,
2612 err = spi_nor_select_read(nor, shared_mask);
2614 dev_dbg(nor->dev,
2620 err = spi_nor_select_pp(nor, shared_mask);
2622 dev_dbg(nor->dev,
2628 err = spi_nor_select_erase(nor);
2630 dev_dbg(nor->dev,
2635 return spi_nor_set_addr_nbytes(nor);
2641 * @nor: pointer to a 'struct spi_nor'.
2643 static void spi_nor_manufacturer_init_params(struct spi_nor *nor)
2645 if (nor->manufacturer && nor->manufacturer->fixups &&
2646 nor->manufacturer->fixups->default_init)
2647 nor->manufacturer->fixups->default_init(nor);
2649 if (nor->info->fixups && nor->info->fixups->default_init)
2650 nor->info->fixups->default_init(nor);
2655 * settings based on nor->info->sfdp_flags. This method should be called only by
2660 * @nor: pointer to a 'struct spi_nor'.
2662 static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
2664 struct spi_nor_flash_parameter *params = nor->params;
2666 const struct flash_info *info = nor->info;
2728 * spi_nor_init_flags() - Initialize NOR flags for settings that are not defined
2730 * @nor: pointer to a 'struct spi_nor'
2732 static void spi_nor_init_flags(struct spi_nor *nor)
2734 struct device_node *np = spi_nor_get_flash_node(nor);
2735 const u16 flags = nor->info->flags;
2738 nor->flags |= SNOR_F_BROKEN_RESET;
2741 nor->flags |= SNOR_F_NO_WP;
2744 nor->flags |= SNOR_F_SWP_IS_VOLATILE;
2747 nor->flags |= SNOR_F_HAS_LOCK;
2750 nor->flags |= SNOR_F_HAS_SR_TB;
2752 nor->flags |= SNOR_F_HAS_SR_TB_BIT6;
2756 nor->flags |= SNOR_F_HAS_4BIT_BP;
2758 nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
2761 if (flags & SPI_NOR_RWW && nor->params->n_banks > 1 &&
2762 !nor->controller_ops)
2763 nor->flags |= SNOR_F_RWW;
2767 * spi_nor_init_fixup_flags() - Initialize NOR flags for settings that can not
2772 * @nor: pointer to a 'struct spi_nor'
2774 static void spi_nor_init_fixup_flags(struct spi_nor *nor)
2776 const u8 fixup_flags = nor->info->fixup_flags;
2779 nor->flags |= SNOR_F_4B_OPCODES;
2782 nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
2787 * @nor: pointer to a 'struct spi_nor'
2793 static int spi_nor_late_init_params(struct spi_nor *nor)
2795 struct spi_nor_flash_parameter *params = nor->params;
2798 if (nor->manufacturer && nor->manufacturer->fixups &&
2799 nor->manufacturer->fixups->late_init) {
2800 ret = nor->manufacturer->fixups->late_init(nor);
2806 spi_nor_init_flags(nor);
2808 if (nor->info->fixups && nor->info->fixups->late_init) {
2809 ret = nor->info->fixups->late_init(nor);
2814 if (!nor->params->die_erase_opcode)
2815 nor->params->die_erase_opcode = SPINOR_OP_CHIP_ERASE;
2821 spi_nor_init_fixup_flags(nor);
2824 * NOR protection support. When locking_ops are not provided, we pick
2827 if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops)
2828 spi_nor_init_default_locking_ops(nor);
2839 * @nor: pointer to a 'struct spi_nor'.
2844 static void spi_nor_sfdp_init_params_deprecated(struct spi_nor *nor)
2848 memcpy(&sfdp_params, nor->params, sizeof(sfdp_params));
2850 if (spi_nor_parse_sfdp(nor)) {
2851 memcpy(nor->params, &sfdp_params, sizeof(*nor->params));
2852 nor->flags &= ~SNOR_F_4B_OPCODES;
2859 * @nor: pointer to a 'struct spi_nor'.
2865 static void spi_nor_init_params_deprecated(struct spi_nor *nor)
2867 spi_nor_no_sfdp_init_params(nor);
2869 spi_nor_manufacturer_init_params(nor);
2871 if (nor->info->no_sfdp_flags & (SPI_NOR_DUAL_READ |
2875 spi_nor_sfdp_init_params_deprecated(nor);
2882 * @nor: pointer to a 'struct spi_nor'.
2884 static void spi_nor_init_default_params(struct spi_nor *nor)
2886 struct spi_nor_flash_parameter *params = nor->params;
2887 const struct flash_info *info = nor->info;
2888 struct device_node *np = spi_nor_get_flash_node(nor);
2894 nor->flags |= SNOR_F_HAS_16BIT_SR;
2896 /* Set SPI NOR sizes. */
2931 * @nor: pointer to a 'struct spi_nor'.
2937 * based on nor->info data:
2966 static int spi_nor_init_params(struct spi_nor *nor)
2970 nor->params = devm_kzalloc(nor->dev, sizeof(*nor->params), GFP_KERNEL);
2971 if (!nor->params)
2974 spi_nor_init_default_params(nor);
2976 if (spi_nor_needs_sfdp(nor)) {
2977 ret = spi_nor_parse_sfdp(nor);
2979 dev_err(nor->dev, "BFPT parsing failed. Please consider using SPI_NOR_SKIP_SFDP when declaring the flash\n");
2982 } else if (nor->info->no_sfdp_flags & SPI_NOR_SKIP_SFDP) {
2983 spi_nor_no_sfdp_init_params(nor);
2985 spi_nor_init_params_deprecated(nor);
2988 ret = spi_nor_late_init_params(nor);
2992 if (WARN_ON(!is_power_of_2(nor->params->page_size)))
2999 * @nor: pointer to a 'struct spi_nor'
3004 static int spi_nor_set_octal_dtr(struct spi_nor *nor, bool enable)
3008 if (!nor->params->set_octal_dtr)
3011 if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
3012 nor->write_proto == SNOR_PROTO_8_8_8_DTR))
3015 if (!(nor->flags & SNOR_F_IO_MODE_EN_VOLATILE))
3018 ret = nor->params->set_octal_dtr(nor, enable);
3023 nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
3025 nor->reg_proto = SNOR_PROTO_1_1_1;
3032 * @nor: pointer to a 'struct spi_nor'
3036 static int spi_nor_quad_enable(struct spi_nor *nor)
3038 if (!nor->params->quad_enable)
3041 if (!(spi_nor_get_protocol_width(nor->read_proto) == 4 ||
3042 spi_nor_get_protocol_width(nor->write_proto) == 4))
3045 return nor->params->quad_enable(nor);
3050 * @nor: pointer to a 'struct spi_nor'.
3055 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
3057 struct spi_nor_flash_parameter *params = nor->params;
3068 WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET,
3072 ret = params->set_4byte_addr_mode(nor, enable);
3087 static int spi_nor_init(struct spi_nor *nor)
3091 err = spi_nor_set_octal_dtr(nor, true);
3093 dev_dbg(nor->dev, "octal mode not supported\n");
3097 err = spi_nor_quad_enable(nor);
3099 dev_dbg(nor->dev, "quad mode not supported\n");
3104 * Some SPI NOR flashes are write protected by default after a power-on
3115 nor->flags & SNOR_F_SWP_IS_VOLATILE))
3116 spi_nor_try_unlock_all(nor);
3118 if (nor->addr_nbytes == 4 &&
3119 nor->read_proto != SNOR_PROTO_8_8_8_DTR &&
3120 !(nor->flags & SNOR_F_4B_OPCODES))
3121 return spi_nor_set_4byte_addr_mode(nor, true);
3128 * @nor: pointer to 'struct spi_nor'
3141 static void spi_nor_soft_reset(struct spi_nor *nor)
3148 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
3150 ret = spi_mem_exec_op(nor->spimem, &op);
3153 dev_warn(nor->dev, "Software reset failed: %d\n", ret);
3159 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
3161 ret = spi_mem_exec_op(nor->spimem, &op);
3163 dev_warn(nor->dev, "Software reset failed: %d\n", ret);
3178 struct spi_nor *nor = mtd_to_spi_nor(mtd);
3182 ret = spi_nor_set_octal_dtr(nor, false);
3184 dev_err(nor->dev, "suspend() failed\n");
3192 struct spi_nor *nor = mtd_to_spi_nor(mtd);
3193 struct device *dev = nor->dev;
3196 /* re-initialize the nor chip */
3197 ret = spi_nor_init(nor);
3205 struct spi_nor *nor = mtd_to_spi_nor(master);
3208 if (nor->spimem)
3209 dev = nor->spimem->spi->controller->dev.parent;
3211 dev = nor->dev;
3222 struct spi_nor *nor = mtd_to_spi_nor(master);
3225 if (nor->spimem)
3226 dev = nor->spimem->spi->controller->dev.parent;
3228 dev = nor->dev;
3233 static void spi_nor_restore(struct spi_nor *nor)
3238 if (nor->addr_nbytes == 4 && !(nor->flags & SNOR_F_4B_OPCODES) &&
3239 nor->flags & SNOR_F_BROKEN_RESET) {
3240 ret = spi_nor_set_4byte_addr_mode(nor, false);
3247 dev_err(nor->dev, "Failed to exit 4-byte address mode, err = %d\n", ret);
3250 if (nor->flags & SNOR_F_SOFT_RESET)
3251 spi_nor_soft_reset(nor);
3254 static const struct flash_info *spi_nor_match_name(struct spi_nor *nor,
3263 nor->manufacturer = manufacturers[i];
3272 static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor,
3278 info = spi_nor_match_name(nor, name);
3287 jinfo = spi_nor_detect(nor);
3296 dev_warn(nor->dev, "found %s, expected %s\n",
3323 static int spi_nor_set_mtd_eraseregions(struct spi_nor *nor)
3325 const struct spi_nor_erase_map *map = &nor->params->erase_map;
3328 struct mtd_info *mtd = &nor->mtd;
3331 mtd_region = devm_kcalloc(nor->dev, map->n_regions, sizeof(*mtd_region),
3353 static int spi_nor_set_mtd_info(struct spi_nor *nor)
3355 struct mtd_info *mtd = &nor->mtd;
3356 struct device *dev = nor->dev;
3358 spi_nor_set_mtd_locking_ops(nor);
3359 spi_nor_set_mtd_otp_ops(nor);
3366 /* Unset BIT_WRITEABLE to enable JFFS2 write buffer for ECC'd NOR */
3367 if (nor->flags & SNOR_F_ECC)
3369 if (nor->info->flags & SPI_NOR_NO_ERASE)
3373 mtd->writesize = nor->params->writesize;
3374 mtd->writebufsize = nor->params->page_size;
3375 mtd->size = nor->params->size;
3385 if (!spi_nor_has_uniform_erase(nor))
3386 return spi_nor_set_mtd_eraseregions(nor);
3391 static int spi_nor_hw_reset(struct spi_nor *nor)
3395 reset = devm_gpiod_get_optional(nor->dev, "reset", GPIOD_OUT_LOW);
3412 int spi_nor_scan(struct spi_nor *nor, const char *name,
3416 struct device *dev = nor->dev;
3419 ret = spi_nor_check(nor);
3424 nor->reg_proto = SNOR_PROTO_1_1_1;
3425 nor->read_proto = SNOR_PROTO_1_1_1;
3426 nor->write_proto = SNOR_PROTO_1_1_1;
3432 * nor->params->page_size turns out to be greater than PAGE_SIZE (which
3433 * shouldn't happen before long since NOR pages are usually less
3436 nor->bouncebuf_size = PAGE_SIZE;
3437 nor->bouncebuf = devm_kmalloc(dev, nor->bouncebuf_size,
3439 if (!nor->bouncebuf)
3442 ret = spi_nor_hw_reset(nor);
3446 info = spi_nor_get_flash_info(nor, name);
3450 nor->info = info;
3452 mutex_init(&nor->lock);
3455 ret = spi_nor_init_params(nor);
3459 if (spi_nor_use_parallel_locking(nor))
3460 init_waitqueue_head(&nor->rww.wait);
3469 ret = spi_nor_setup(nor, hwcaps);
3474 ret = spi_nor_init(nor);
3479 ret = spi_nor_set_mtd_info(nor);
3484 SPI_NOR_MAX_ID_LEN, nor->id);
3490 static int spi_nor_create_read_dirmap(struct spi_nor *nor)
3493 .op_tmpl = SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 0),
3494 SPI_MEM_OP_ADDR(nor->addr_nbytes, 0, 0),
3495 SPI_MEM_OP_DUMMY(nor->read_dummy, 0),
3498 .length = nor->params->size,
3502 spi_nor_spimem_setup_op(nor, op, nor->read_proto);
3505 op->dummy.nbytes = (nor->read_dummy * op->dummy.buswidth) / 8;
3506 if (spi_nor_protocol_is_dtr(nor->read_proto))
3514 op->data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
3516 nor->dirmap.rdesc = devm_spi_mem_dirmap_create(nor->dev, nor->spimem,
3518 return PTR_ERR_OR_ZERO(nor->dirmap.rdesc);
3521 static int spi_nor_create_write_dirmap(struct spi_nor *nor)
3524 .op_tmpl = SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 0),
3525 SPI_MEM_OP_ADDR(nor->addr_nbytes, 0, 0),
3529 .length = nor->params->size,
3533 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
3536 spi_nor_spimem_setup_op(nor, op, nor->write_proto);
3543 op->data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
3545 nor->dirmap.wdesc = devm_spi_mem_dirmap_create(nor->dev, nor->spimem,
3547 return PTR_ERR_OR_ZERO(nor->dirmap.wdesc);
3555 struct spi_nor *nor;
3568 nor = devm_kzalloc(dev, sizeof(*nor), GFP_KERNEL);
3569 if (!nor)
3572 nor->spimem = spimem;
3573 nor->dev = dev;
3574 spi_nor_set_flash_node(nor, dev->of_node);
3576 spi_mem_set_drvdata(spimem, nor);
3579 nor->mtd.name = data->name;
3581 if (!nor->mtd.name)
3582 nor->mtd.name = spi_mem_get_name(spimem);
3592 else if (!strcmp(spi->modalias, "spi-nor"))
3597 ret = spi_nor_scan(nor, flash_name, &hwcaps);
3601 spi_nor_debugfs_register(nor);
3606 * a NOR we don't end up with buffer overflows.
3608 if (nor->params->page_size > PAGE_SIZE) {
3609 nor->bouncebuf_size = nor->params->page_size;
3610 devm_kfree(dev, nor->bouncebuf);
3611 nor->bouncebuf = devm_kmalloc(dev, nor->bouncebuf_size,
3613 if (!nor->bouncebuf)
3617 ret = spi_nor_create_read_dirmap(nor);
3621 ret = spi_nor_create_write_dirmap(nor);
3625 return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
3631 struct spi_nor *nor = spi_mem_get_drvdata(spimem);
3633 spi_nor_restore(nor);
3636 return mtd_device_unregister(&nor->mtd);
3641 struct spi_nor *nor = spi_mem_get_drvdata(spimem);
3643 spi_nor_restore(nor);
3652 * encourage new users to add support to the spi-nor library, and simply bind
3653 * against a generic string here (e.g., "jedec,spi-nor").
3660 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
3664 {"spi-nor"},
3668 * them with "spi-nor" in platform data.
3673 * Entries that were used in DTs without "jedec,spi-nor" fallback and
3705 * Generic compatibility for SPI NOR that can be identified by the
3708 { .compatible = "jedec,spi-nor" },
3721 .name = "spi-nor",
3748 MODULE_DESCRIPTION("framework for SPI NOR");