nand/raw/mxic_nand.c

184 static int mxic_nfc_clk_enable(struct mxic_nand_ctlr *nfc)
188 	ret = clk_prepare_enable(nfc->ps_clk);
192 	ret = clk_prepare_enable(nfc->send_clk);
196 	ret = clk_prepare_enable(nfc->send_dly_clk);
203 	clk_disable_unprepare(nfc->send_clk);
205 	clk_disable_unprepare(nfc->ps_clk);
210 static void mxic_nfc_clk_disable(struct mxic_nand_ctlr *nfc)
212 	clk_disable_unprepare(nfc->send_clk);
213 	clk_disable_unprepare(nfc->send_dly_clk);
214 	clk_disable_unprepare(nfc->ps_clk);
217 static void mxic_nfc_set_input_delay(struct mxic_nand_ctlr *nfc, u8 idly_code)
223 	       nfc->regs + IDLY_CODE(0));
228 	       nfc->regs + IDLY_CODE(1));
231 static int mxic_nfc_clk_setup(struct mxic_nand_ctlr *nfc, unsigned long freq)
235 	ret = clk_set_rate(nfc->send_clk, freq);
239 	ret = clk_set_rate(nfc->send_dly_clk, freq);
247 	mxic_nfc_set_input_delay(nfc, 0xf);
257 	ret = clk_set_phase(nfc->send_dly_clk, 9 * freq / 25000000);
264 static int mxic_nfc_set_freq(struct mxic_nand_ctlr *nfc, unsigned long freq)
271 	mxic_nfc_clk_disable(nfc);
272 	ret = mxic_nfc_clk_setup(nfc, freq);
276 	ret = mxic_nfc_clk_enable(nfc);
285 	struct mxic_nand_ctlr *nfc = dev_id;
288 	sts = readl(nfc->regs + INT_STS);
290 		complete(&nfc->complete);
297 static void mxic_nfc_hw_init(struct mxic_nand_ctlr *nfc)
301 	       HC_CFG_IDLE_SIO_LVL(1), nfc->regs + HC_CFG);
302 	writel(INT_STS_ALL, nfc->regs + INT_STS_EN);
303 	writel(INT_RDY_PIN, nfc->regs + INT_SIG_EN);
304 	writel(0x0, nfc->regs + ONFI_DIN_CNT(0));
305 	writel(0, nfc->regs + LRD_CFG);
306 	writel(0, nfc->regs + LRD_CTRL);
307 	writel(0x0, nfc->regs + HC_EN);
310 static void mxic_nfc_cs_enable(struct mxic_nand_ctlr *nfc)
312 	writel(readl(nfc->regs + HC_CFG) | HC_CFG_MAN_CS_EN,
313 	       nfc->regs + HC_CFG);
314 	writel(HC_CFG_MAN_CS_ASSERT | readl(nfc->regs + HC_CFG),
315 	       nfc->regs + HC_CFG);
318 static void mxic_nfc_cs_disable(struct mxic_nand_ctlr *nfc)
320 	writel(~HC_CFG_MAN_CS_ASSERT & readl(nfc->regs + HC_CFG),
321 	       nfc->regs + HC_CFG);
326 	struct mxic_nand_ctlr *nfc = nand_get_controller_data(chip);
329 	ret = wait_for_completion_timeout(&nfc->complete,
332 		dev_err(nfc->dev, "nand device timeout\n");
339 static int mxic_nfc_data_xfer(struct mxic_nand_ctlr *nfc, const void *txbuf,
356 		ret = readl_poll_timeout(nfc->regs + INT_STS, sts,
361 		writel(data, nfc->regs + TXD(nbytes % 4));
363 		ret = readl_poll_timeout(nfc->regs + INT_STS, sts,
368 		ret = readl_poll_timeout(nfc->regs + INT_STS, sts,
374 		data = readl(nfc->regs + RXD);
379 		if (readl(nfc->regs + INT_STS) & INT_RX_NOT_EMPTY)
380 			dev_warn(nfc->dev, "RX FIFO not empty\n");
391 	struct mxic_nand_ctlr *nfc = nand_get_controller_data(chip);
399 	mxic_nfc_cs_enable(nfc);
400 	init_completion(&nfc->complete);
406 			writel(0, nfc->regs + HC_EN);
407 			writel(HC_EN_BIT, nfc->regs + HC_EN);
409 			       OP_CMD_BYTES(0), nfc->regs + SS_CTRL(0));
411 			ret = mxic_nfc_data_xfer(nfc,
419 			       nfc->regs + SS_CTRL(0));
420 			ret = mxic_nfc_data_xfer(nfc,
426 			writel(0x0, nfc->regs + ONFI_DIN_CNT(0));
428 			       OP_READ, nfc->regs + SS_CTRL(0));
429 			ret = mxic_nfc_data_xfer(nfc, NULL,
436 			       nfc->regs + ONFI_DIN_CNT(0));
438 			       nfc->regs + SS_CTRL(0));
439 			ret = mxic_nfc_data_xfer(nfc,
449 	mxic_nfc_cs_disable(nfc);
457 	struct mxic_nand_ctlr *nfc = nand_get_controller_data(chip);
471 	ret =  mxic_nfc_set_freq(nfc, freq);
473 		dev_err(nfc->dev, "set freq:%ld failed\n", freq);
476 		writel(DATA_STROB_EDO_EN, nfc->regs + DATA_STROB);
490 	struct mxic_nand_ctlr *nfc;
495 	nfc = devm_kzalloc(&pdev->dev, sizeof(struct mxic_nand_ctlr),
497 	if (!nfc)
500 	nfc->ps_clk = devm_clk_get(&pdev->dev, "ps");
501 	if (IS_ERR(nfc->ps_clk))
502 		return PTR_ERR(nfc->ps_clk);
504 	nfc->send_clk = devm_clk_get(&pdev->dev, "send");
505 	if (IS_ERR(nfc->send_clk))
506 		return PTR_ERR(nfc->send_clk);
508 	nfc->send_dly_clk = devm_clk_get(&pdev->dev, "send_dly");
509 	if (IS_ERR(nfc->send_dly_clk))
510 		return PTR_ERR(nfc->send_dly_clk);
512 	nfc->regs = devm_platform_ioremap_resource(pdev, 0);
513 	if (IS_ERR(nfc->regs))
514 		return PTR_ERR(nfc->regs);
516 	nand_chip = &nfc->chip;
523 	nand_chip->priv = nfc;
524 	nfc->dev = &pdev->dev;
525 	nfc->controller.ops = &mxic_nand_controller_ops;
526 	nand_controller_init(&nfc->controller);
527 	nand_chip->controller = &nfc->controller;
533 	mxic_nfc_hw_init(nfc);
536 			       0, "mxic-nfc", nfc);
548 	platform_set_drvdata(pdev, nfc);
552 	mxic_nfc_clk_disable(nfc);
558 	struct mxic_nand_ctlr *nfc = platform_get_drvdata(pdev);
559 	struct nand_chip *chip = &nfc->chip;
566 	mxic_nfc_clk_disable(nfc);
579 		.name = "mxic-nfc",