platform/broadcom/bcm2835-unicam.c

61 #include "bcm2835-unicam-regs.h"
63 #define UNICAM_MODULE_NAME		"unicam"
175 	 * Dummy buffer intended to be used by unicam
250 	struct unicam_device *unicam =
253 	if (unicam->mdev.dev)
254 		media_device_cleanup(&unicam->mdev);
256 	mutex_destroy(&unicam->lock);
257 	kfree(unicam);
260 static struct unicam_device *unicam_get(struct unicam_device *unicam)
262 	kref_get(&unicam->kref);
264 	return unicam;
267 static void unicam_put(struct unicam_device *unicam)
269 	kref_put(&unicam->kref, unicam_release);
558 static void unicam_calc_image_size_bpl(struct unicam_device *unicam,
583 static void unicam_calc_meta_size_bpl(struct unicam_device *unicam,
601 static inline void unicam_clk_write(struct unicam_device *unicam, u32 val)
604 	writel(val | 0x5a000000, unicam->clk_gate_base);
607 static inline u32 unicam_reg_read(struct unicam_device *unicam, u32 offset)
609 	return readl(unicam->base + offset);
612 static inline void unicam_reg_write(struct unicam_device *unicam, u32 offset, u32 val)
614 	writel(val, unicam->base + offset);
631 static inline void unicam_reg_write_field(struct unicam_device *unicam, u32 offset,
634 	u32 val = unicam_reg_read(unicam, offset);
637 	unicam_reg_write(unicam, offset, val);
661 static unsigned int unicam_get_lines_done(struct unicam_device *unicam)
663 	struct unicam_node *node = &unicam->node[UNICAM_IMAGE_NODE];
671 	cur_addr = unicam_reg_read(unicam, UNICAM_IBWP);
706 static void unicam_queue_event_sof(struct unicam_device *unicam)
708 	struct unicam_node *node = &unicam->node[UNICAM_IMAGE_NODE];
711 		.u.frame_sync.frame_sequence = unicam->sequence,
719 	struct unicam_device *unicam = dev;
721 	unsigned int sequence = unicam->sequence;
727 	sta = unicam_reg_read(unicam, UNICAM_STA);
729 	unicam_reg_write(unicam, UNICAM_STA, sta);
731 	ista = unicam_reg_read(unicam, UNICAM_ISTA);
733 	unicam_reg_write(unicam, UNICAM_ISTA, ista);
735 	dev_dbg(unicam->dev, "ISR: ISTA: 0x%X, STA: 0x%X, sequence %d, lines done %d\n",
754 		bool inc_seq = unicam->frame_started;
762 		for (i = 0; i < ARRAY_SIZE(unicam->node); i++) {
763 			struct unicam_node *node = &unicam->node[i];
790 			unicam->sequence++;
791 			unicam->frame_started = false;
801 		for (i = 0; i < ARRAY_SIZE(unicam->node); i++) {
802 			struct unicam_node *node = &unicam->node[i];
810 				dev_dbg(unicam->v4l2_dev.dev,
821 		unicam_queue_event_sof(unicam);
822 		unicam->frame_started = true;
831 		for (i = 0; i < ARRAY_SIZE(unicam->node); i++) {
832 			struct unicam_node *node = &unicam->node[i];
847 static void unicam_set_packing_config(struct unicam_device *unicam,
850 	struct unicam_node *node = &unicam->node[UNICAM_IMAGE_NODE];
866 	unicam_reg_write(unicam, UNICAM_IPIPE, val);
869 static void unicam_cfg_image_id(struct unicam_device *unicam, u8 vc, u8 dt)
871 	if (unicam->bus_type == V4L2_MBUS_CSI2_DPHY) {
873 		unicam_reg_write(unicam, UNICAM_IDI0, (vc << 6) | dt);
876 		unicam_reg_write(unicam, UNICAM_IDI0, 0x80 | dt);
880 static void unicam_enable_ed(struct unicam_device *unicam)
882 	u32 val = unicam_reg_read(unicam, UNICAM_DCS);
888 	unicam_reg_write(unicam, UNICAM_DCS, val);
891 static int unicam_get_image_vc_dt(struct unicam_device *unicam,
905 	ret = v4l2_subdev_call(unicam->sensor.subdev, pad, get_frame_desc,
906 			       unicam->sensor.pad->index, &fd);
927 static void unicam_start_rx(struct unicam_device *unicam,
930 	struct unicam_node *node = &unicam->node[UNICAM_IMAGE_NODE];
956 	val = 0x155 & GENMASK(unicam->pipe.num_data_lanes * 2 + 1, 0);
957 	unicam_clk_write(unicam, val);
960 	unicam_reg_write(unicam, UNICAM_CTRL, UNICAM_MEM);
966 	unicam_reg_write(unicam, UNICAM_ANA, val);
970 	unicam_reg_write_field(unicam, UNICAM_ANA, 0, UNICAM_AR);
973 	unicam_reg_write_field(unicam, UNICAM_CTRL, 1, UNICAM_CPR);
974 	unicam_reg_write_field(unicam, UNICAM_CTRL, 0, UNICAM_CPR);
976 	unicam_reg_write_field(unicam, UNICAM_CTRL, 0, UNICAM_CPE);
979 	val = unicam_reg_read(unicam, UNICAM_CTRL);
980 	if (unicam->bus_type == V4L2_MBUS_CSI2_DPHY) {
985 		unicam_set_field(&val, unicam->bus_flags, UNICAM_DCM_MASK);
990 	unicam_reg_write(unicam, UNICAM_CTRL, val);
992 	unicam_reg_write(unicam, UNICAM_IHWIN, 0);
993 	unicam_reg_write(unicam, UNICAM_IVWIN, 0);
996 	val = unicam_reg_read(unicam, UNICAM_PRI);
1003 	unicam_reg_write(unicam, UNICAM_PRI, val);
1005 	unicam_reg_write_field(unicam, UNICAM_ANA, 0, UNICAM_DDL);
1010 	unicam_reg_write(unicam, UNICAM_ICTL, val);
1011 	unicam_reg_write(unicam, UNICAM_STA, UNICAM_STA_MASK_ALL);
1012 	unicam_reg_write(unicam, UNICAM_ISTA, UNICAM_ISTA_MASK_ALL);
1015 	unicam_reg_write_field(unicam, UNICAM_CLT, 2, UNICAM_CLT1_MASK);
1017 	unicam_reg_write_field(unicam, UNICAM_CLT, 6, UNICAM_CLT2_MASK);
1019 	unicam_reg_write_field(unicam, UNICAM_DLT, 2, UNICAM_DLT1_MASK);
1021 	unicam_reg_write_field(unicam, UNICAM_DLT, 6, UNICAM_DLT2_MASK);
1023 	unicam_reg_write_field(unicam, UNICAM_DLT, 0, UNICAM_DLT3_MASK);
1025 	unicam_reg_write_field(unicam, UNICAM_CTRL, 0, UNICAM_SOE);
1034 	unicam_reg_write(unicam, UNICAM_CMP0, val);
1038 	if (unicam->bus_type == V4L2_MBUS_CSI2_DPHY) {
1042 		if (!(unicam->bus_flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK)) {
1052 	unicam_reg_write(unicam, UNICAM_CLK, val);
1060 	if (unicam->bus_type == V4L2_MBUS_CSI2_DPHY) {
1064 		if (!(unicam->bus_flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK)) {
1074 	unicam_reg_write(unicam, UNICAM_DAT0, val);
1076 	if (unicam->pipe.num_data_lanes == 1)
1078 	unicam_reg_write(unicam, UNICAM_DAT1, val);
1080 	if (unicam->max_data_lanes > 2) {
1085 		if (unicam->pipe.num_data_lanes == 2)
1087 		unicam_reg_write(unicam, UNICAM_DAT2, val);
1089 		if (unicam->pipe.num_data_lanes == 3)
1091 		unicam_reg_write(unicam, UNICAM_DAT3, val);
1094 	unicam_reg_write(unicam, UNICAM_IBLS,
1097 	unicam_set_packing_config(unicam, fmtinfo);
1099 	ret = unicam_get_image_vc_dt(unicam, state, &vc, &dt);
1109 	unicam_cfg_image_id(unicam, vc, dt);
1111 	val = unicam_reg_read(unicam, UNICAM_MISC);
1114 	unicam_reg_write(unicam, UNICAM_MISC, val);
1117 	unicam_reg_write_field(unicam, UNICAM_CTRL, 1, UNICAM_CPE);
1120 	unicam_reg_write_field(unicam, UNICAM_ICTL, 1, UNICAM_LIP_MASK);
1126 	unicam_reg_write_field(unicam, UNICAM_ICTL, 1, UNICAM_TFC);
1129 static void unicam_start_metadata(struct unicam_device *unicam)
1131 	struct unicam_node *node = &unicam->node[UNICAM_METADATA_NODE];
1133 	unicam_enable_ed(unicam);
1135 	unicam_reg_write_field(unicam, UNICAM_DCS, 1, UNICAM_LDP);
1138 static void unicam_disable(struct unicam_device *unicam)
1141 	unicam_reg_write_field(unicam, UNICAM_ANA, 1, UNICAM_DDL);
1144 	unicam_reg_write_field(unicam, UNICAM_CTRL, 1, UNICAM_SOE);
1147 	unicam_reg_write(unicam, UNICAM_DAT0, 0);
1148 	unicam_reg_write(unicam, UNICAM_DAT1, 0);
1150 	if (unicam->max_data_lanes > 2) {
1151 		unicam_reg_write(unicam, UNICAM_DAT2, 0);
1152 		unicam_reg_write(unicam, UNICAM_DAT3, 0);
1156 	unicam_reg_write_field(unicam, UNICAM_CTRL, 1, UNICAM_CPR);
1158 	unicam_reg_write_field(unicam, UNICAM_CTRL, 0, UNICAM_CPR);
1161 	unicam_reg_write_field(unicam, UNICAM_CTRL, 0, UNICAM_CPE);
1164 	unicam_reg_write(unicam, UNICAM_DCS, 0);
1167 	unicam_clk_write(unicam, 0);
1337 	struct unicam_device *unicam = sd_to_unicam_device(sd);
1344 	    unicam->subdev.enabled_streams)
1412 	struct unicam_device *unicam = sd_to_unicam_device(sd);
1414 	if (which == V4L2_SUBDEV_FORMAT_ACTIVE && unicam->subdev.enabled_streams)
1424 	struct unicam_device *unicam = sd_to_unicam_device(sd);
1428 	if (!unicam->subdev.enabled_streams) {
1430 		unicam->sequence = 0;
1432 		if (unicam->pipe.nodes & BIT(UNICAM_METADATA_NODE))
1433 			unicam_start_metadata(unicam);
1435 		unicam->frame_started = false;
1436 		unicam_start_rx(unicam, state);
1444 	ret = v4l2_subdev_enable_streams(unicam->sensor.subdev,
1445 					 unicam->sensor.pad->index,
1448 		dev_err(unicam->dev, "stream on failed in subdev\n");
1452 	unicam->subdev.enabled_streams |= BIT(other_stream);
1461 	struct unicam_device *unicam = sd_to_unicam_device(sd);
1470 	v4l2_subdev_disable_streams(unicam->sensor.subdev,
1471 				    unicam->sensor.pad->index,
1474 	unicam->subdev.enabled_streams &= ~BIT(other_stream);
1476 	if (!unicam->subdev.enabled_streams)
1477 		unicam_disable(unicam);
1505 static int unicam_subdev_init(struct unicam_device *unicam)
1507 	struct v4l2_subdev *sd = &unicam->subdev.sd;
1512 	v4l2_set_subdevdata(sd, unicam);
1516 	sd->dev = unicam->dev;
1520 	strscpy(sd->name, "unicam", sizeof(sd->name));
1522 	unicam->subdev.pads[UNICAM_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1523 	unicam->subdev.pads[UNICAM_SD_PAD_SOURCE_IMAGE].flags = MEDIA_PAD_FL_SOURCE;
1524 	unicam->subdev.pads[UNICAM_SD_PAD_SOURCE_METADATA].flags = MEDIA_PAD_FL_SOURCE;
1526 	ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(unicam->subdev.pads),
1527 				     unicam->subdev.pads);
1529 		dev_err(unicam->dev, "Failed to initialize media entity: %d\n",
1536 		dev_err(unicam->dev, "Failed to initialize subdev: %d\n", ret);
1540 	ret = v4l2_device_register_subdev(&unicam->v4l2_dev, sd);
1542 		dev_err(unicam->dev, "Failed to register subdev: %d\n", ret);
1555 static void unicam_subdev_cleanup(struct unicam_device *unicam)
1557 	v4l2_subdev_cleanup(&unicam->subdev.sd);
1558 	media_entity_cleanup(&unicam->subdev.sd.entity);
1631 static int unicam_num_data_lanes(struct unicam_device *unicam)
1637 	if (unicam->bus_type != V4L2_MBUS_CSI2_DPHY)
1638 		return unicam->max_data_lanes;
1640 	ret = v4l2_subdev_call(unicam->sensor.subdev, pad, get_mbus_config,
1641 			       unicam->sensor.pad->index, &mbus_config);
1643 		return unicam->max_data_lanes;
1646 		dev_err(unicam->dev, "Failed to get mbus config: %d\n", ret);
1653 		dev_err(unicam->dev,
1655 			unicam->sensor.subdev->name, num_data_lanes);
1659 	if (num_data_lanes > unicam->max_data_lanes) {
1660 		dev_err(unicam->dev,
1662 			unicam->sensor.subdev->name, num_data_lanes,
1663 			unicam->max_data_lanes);
1673 	struct unicam_device *unicam = node->dev;
1680 	dev_dbg(unicam->dev, "Starting stream on %s device\n",
1687 	ret = video_device_pipeline_start(&node->video_dev, &unicam->pipe.pipe);
1689 		dev_dbg(unicam->dev, "Failed to start media pipeline: %d\n", ret);
1697 	if (unicam->pipe.pipe.start_count == 1) {
1698 		unicam->pipe.nodes = 0;
1700 		media_pipeline_for_each_pad(&unicam->pipe.pipe, &iter, pad) {
1701 			if (pad->entity != &unicam->subdev.sd.entity)
1705 				unicam->pipe.nodes |= BIT(UNICAM_IMAGE_NODE);
1707 				unicam->pipe.nodes |= BIT(UNICAM_METADATA_NODE);
1710 		if (!(unicam->pipe.nodes & BIT(UNICAM_IMAGE_NODE))) {
1711 			dev_dbg(unicam->dev,
1717 		ret = unicam_num_data_lanes(unicam);
1721 		unicam->pipe.num_data_lanes = ret;
1723 		dev_dbg(unicam->dev, "Running with %u data lanes, nodes %u\n",
1724 			unicam->pipe.num_data_lanes, unicam->pipe.nodes);
1745 	if (unicam->pipe.pipe.start_count < hweight32(unicam->pipe.nodes))
1748 	ret = pm_runtime_resume_and_get(unicam->dev);
1750 		dev_err(unicam->dev, "PM runtime resume failed: %d\n", ret);
1755 	ret = v4l2_subdev_enable_streams(&unicam->subdev.sd,
1759 		dev_err(unicam->dev, "stream on failed in subdev\n");
1763 	if (unicam->pipe.nodes & BIT(UNICAM_METADATA_NODE)) {
1764 		ret = v4l2_subdev_enable_streams(&unicam->subdev.sd,
1768 			dev_err(unicam->dev, "stream on failed in subdev\n");
1776 	v4l2_subdev_disable_streams(&unicam->subdev.sd,
1779 	pm_runtime_put_sync(unicam->dev);
1790 	struct unicam_device *unicam = node->dev;
1793 	if (unicam->pipe.pipe.start_count == hweight32(unicam->pipe.nodes)) {
1794 		if (unicam->pipe.nodes & BIT(UNICAM_METADATA_NODE))
1795 			v4l2_subdev_disable_streams(&unicam->subdev.sd,
1799 		v4l2_subdev_disable_streams(&unicam->subdev.sd,
1803 		pm_runtime_put(unicam->dev);
2048 	struct unicam_device *unicam = node->dev;
2052 	v4l2_device_call_all(&unicam->v4l2_dev, 0, core, log_status);
2054 	dev_info(unicam->dev, "-----Receiver status-----\n");
2055 	dev_info(unicam->dev, "V4L2 width/height:   %ux%u\n",
2057 	dev_info(unicam->dev, "V4L2 format:         %08x\n",
2059 	reg = unicam_reg_read(unicam, UNICAM_IPIPE);
2060 	dev_info(unicam->dev, "Unpacking/packing:   %u / %u\n",
2063 	dev_info(unicam->dev, "----Live data----\n");
2064 	dev_info(unicam->dev, "Programmed stride:   %4u\n",
2065 		 unicam_reg_read(unicam, UNICAM_IBLS));
2066 	dev_info(unicam->dev, "Detected resolution: %ux%u\n",
2067 		 unicam_reg_read(unicam, UNICAM_IHSTA),
2068 		 unicam_reg_read(unicam, UNICAM_IVSTA));
2069 	dev_info(unicam->dev, "Write pointer:       %08x\n",
2070 		 unicam_reg_read(unicam, UNICAM_IBWP));
2116 /* unicam capture driver file operations */
2235 static int unicam_register_node(struct unicam_device *unicam,
2241 	struct unicam_node *node = &unicam->node[type];
2246 	node->dev = unicam_get(unicam);
2262 	q->lock = &unicam->lock;
2264 	q->dev = unicam->dev;
2268 		dev_err(unicam->dev, "vb2_queue_init() failed\n");
2276 	vdev->v4l2_dev = &unicam->v4l2_dev;
2279 	vdev->lock = &unicam->lock;
2300 	node->dummy_buf_cpu_addr = dma_alloc_coherent(unicam->dev,
2305 		dev_err(unicam->dev, "Unable to allocate dummy buffer.\n");
2314 		dev_err(unicam->dev, "Unable to register video device %s\n",
2321 	ret = media_create_pad_link(&unicam->subdev.sd.entity,
2333 		dev_err(unicam->dev, "Unable to create pad link for %s\n",
2334 			unicam->sensor.subdev->name);
2341 	dma_free_coherent(unicam->dev, node->dummy_buf.size,
2347 	unicam_put(unicam);
2351 static void unicam_unregister_nodes(struct unicam_device *unicam)
2355 	for (i = 0; i < ARRAY_SIZE(unicam->node); i++) {
2356 		struct unicam_node *node = &unicam->node[i];
2364 			dma_free_coherent(unicam->dev, node->dummy_buf.size,
2376 	struct unicam_device *unicam = dev_get_drvdata(dev);
2379 	ret = clk_set_min_rate(unicam->vpu_clock, UNICAM_MIN_VPU_CLOCK_RATE);
2381 		dev_err(unicam->dev, "failed to set up VPU clock\n");
2385 	ret = clk_prepare_enable(unicam->vpu_clock);
2387 		dev_err(unicam->dev, "Failed to enable VPU clock: %d\n", ret);
2391 	ret = clk_set_rate(unicam->clock, 100 * 1000 * 1000);
2393 		dev_err(unicam->dev, "failed to set up CSI clock\n");
2397 	ret = clk_prepare_enable(unicam->clock);
2399 		dev_err(unicam->dev, "Failed to enable CSI clock: %d\n", ret);
2406 	clk_disable_unprepare(unicam->vpu_clock);
2408 	if (clk_set_min_rate(unicam->vpu_clock, 0))
2409 		dev_err(unicam->dev, "failed to reset the VPU clock\n");
2416 	struct unicam_device *unicam = dev_get_drvdata(dev);
2418 	clk_disable_unprepare(unicam->clock);
2420 	if (clk_set_min_rate(unicam->vpu_clock, 0))
2421 		dev_err(unicam->dev, "failed to reset the VPU clock\n");
2423 	clk_disable_unprepare(unicam->vpu_clock);
2440 	struct unicam_device *unicam = notifier_to_unicam_device(notifier);
2441 	struct media_pad *sink = &unicam->subdev.pads[UNICAM_SD_PAD_SINK];
2445 	dev_dbg(unicam->dev, "Using sensor %s for capture\n",
2455 		dev_err(unicam->dev, "No connected sensor pad\n");
2459 	unicam->sensor.subdev = subdev;
2460 	unicam->sensor.pad = source;
2467 	struct unicam_device *unicam = notifier_to_unicam_device(notifier);
2470 	ret = unicam_register_node(unicam, UNICAM_IMAGE_NODE);
2472 		dev_err(unicam->dev, "Unable to register image video device.\n");
2476 	ret = unicam_register_node(unicam, UNICAM_METADATA_NODE);
2478 		dev_err(unicam->dev, "Unable to register metadata video device.\n");
2482 	ret = v4l2_device_register_subdev_nodes(&unicam->v4l2_dev);
2484 		dev_err(unicam->dev, "Unable to register subdev nodes.\n");
2491 	unicam_unregister_nodes(unicam);
2492 	unicam_put(unicam);
2502 static int unicam_async_nf_init(struct unicam_device *unicam)
2509 	ret = of_property_read_u32(unicam->dev->of_node, "brcm,num-data-lanes",
2510 				   &unicam->max_data_lanes);
2512 		dev_err(unicam->dev, "Missing %s DT property\n",
2518 	ep_handle = fwnode_graph_get_endpoint_by_id(dev_fwnode(unicam->dev), 0, 0,
2521 		dev_err(unicam->dev, "No endpoint found\n");
2527 		dev_err(unicam->dev, "Failed to parse endpoint: %d\n", ret);
2531 	unicam->bus_type = ep.bus_type;
2539 			dev_err(unicam->dev, "%u data lanes not supported\n",
2545 		if (num_data_lanes > unicam->max_data_lanes) {
2546 			dev_err(unicam->dev,
2548 				num_data_lanes, unicam->max_data_lanes);
2553 		unicam->max_data_lanes = num_data_lanes;
2554 		unicam->bus_flags = ep.bus.mipi_csi2.flags;
2559 		unicam->max_data_lanes = 1;
2560 		unicam->bus_flags = ep.bus.mipi_csi1.strobe;
2565 		dev_err(unicam->dev, "Unsupported bus type %u\n", ep.bus_type);
2571 	v4l2_async_nf_init(&unicam->notifier, &unicam->v4l2_dev);
2573 	asc = v4l2_async_nf_add_fwnode_remote(&unicam->notifier, ep_handle,
2580 		dev_err(unicam->dev, "Failed to add entry to notifier: %d\n",
2585 	unicam->notifier.ops = &unicam_async_ops;
2587 	ret = v4l2_async_nf_register(&unicam->notifier);
2589 		dev_err(unicam->dev, "Error registering device notifier: %d\n",
2605 static int unicam_media_init(struct unicam_device *unicam)
2609 	unicam->mdev.dev = unicam->dev;
2610 	strscpy(unicam->mdev.model, UNICAM_MODULE_NAME,
2611 		sizeof(unicam->mdev.model));
2612 	unicam->mdev.hw_revision = 0;
2614 	media_device_init(&unicam->mdev);
2616 	unicam->v4l2_dev.mdev = &unicam->mdev;
2618 	ret = v4l2_device_register(unicam->dev, &unicam->v4l2_dev);
2620 		dev_err(unicam->dev, "Unable to register v4l2 device\n");
2624 	ret = media_device_register(&unicam->mdev);
2626 		dev_err(unicam->dev,
2634 	v4l2_device_unregister(&unicam->v4l2_dev);
2636 	media_device_cleanup(&unicam->mdev);
2642 	struct unicam_device *unicam;
2645 	unicam = kzalloc(sizeof(*unicam), GFP_KERNEL);
2646 	if (!unicam)
2649 	kref_init(&unicam->kref);
2650 	mutex_init(&unicam->lock);
2652 	unicam->dev = &pdev->dev;
2653 	platform_set_drvdata(pdev, unicam);
2655 	unicam->base = devm_platform_ioremap_resource_byname(pdev, "unicam");
2656 	if (IS_ERR(unicam->base)) {
2657 		ret = PTR_ERR(unicam->base);
2661 	unicam->clk_gate_base = devm_platform_ioremap_resource_byname(pdev, "cmi");
2662 	if (IS_ERR(unicam->clk_gate_base)) {
2663 		ret = PTR_ERR(unicam->clk_gate_base);
2667 	unicam->clock = devm_clk_get(&pdev->dev, "lp");
2668 	if (IS_ERR(unicam->clock)) {
2669 		dev_err(unicam->dev, "Failed to get lp clock\n");
2670 		ret = PTR_ERR(unicam->clock);
2674 	unicam->vpu_clock = devm_clk_get(&pdev->dev, "vpu");
2675 	if (IS_ERR(unicam->vpu_clock)) {
2676 		dev_err(unicam->dev, "Failed to get vpu clock\n");
2677 		ret = PTR_ERR(unicam->vpu_clock);
2686 			       "unicam_capture0", unicam);
2695 	ret = unicam_media_init(unicam);
2699 	ret = unicam_subdev_init(unicam);
2703 	ret = unicam_async_nf_init(unicam);
2710 	unicam_subdev_cleanup(unicam);
2712 	media_device_unregister(&unicam->mdev);
2716 	unicam_put(unicam);
2723 	struct unicam_device *unicam = platform_get_drvdata(pdev);
2725 	unicam_unregister_nodes(unicam);
2726 	v4l2_device_unregister(&unicam->v4l2_dev);
2727 	media_device_unregister(&unicam->mdev);
2728 	v4l2_async_nf_unregister(&unicam->notifier);
2730 	unicam_subdev_cleanup(unicam);
2732 	unicam_put(unicam);
2738 	{ .compatible = "brcm,bcm2835-unicam", },