Lines Matching defs:s
20 static void ivtv_dma_dec_start(struct ivtv_stream *s);
31 struct ivtv_stream *s = &itv->streams[IVTV_ENC_STREAM_TYPE_PCM];
43 buf = ivtv_dequeue(s, &s->q_io);
45 buf = ivtv_dequeue(s, &s->q_full);
54 ivtv_enqueue(s, buf, &s->q_free);
60 struct ivtv_stream *s = &itv->streams[itv->cur_pio_stream];
66 s->vdev.v4l2_dev == NULL || !ivtv_use_pio(s)) {
72 IVTV_DEBUG_HI_DMA("Process PIO %s\n", s->name);
73 list_for_each_entry(buf, &s->q_dma.list, list) {
74 u32 size = s->sg_processing[i].size & 0x3ffff;
77 if (s->type == IVTV_DEC_STREAM_TYPE_VBI) {
78 memcpy_fromio(buf->buf, itv->dec_mem + s->sg_processing[i].src - IVTV_DECODER_OFFSET, size);
81 memcpy_fromio(buf->buf, itv->enc_mem + s->sg_processing[i].src, size);
84 if (i == s->sg_processing_size)
111 static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MAX_DATA])
113 struct ivtv *itv = s->itv;
118 int skip_bufs = s->q_predma.buffers;
119 int idx = s->sg_pending_size;
123 if (s->vdev.v4l2_dev == NULL) {
124 IVTV_DEBUG_WARN("Stream %s not started\n", s->name);
127 if (!test_bit(IVTV_F_S_CLAIMED, &s->s_flags)) {
128 IVTV_DEBUG_WARN("Stream %s not open\n", s->name);
133 switch (s->type) {
137 s->pending_pts = 0;
145 s->pending_pts = ((u64) data[5] << 32) | data[6];
151 s->pending_pts = read_dec(offset - 8) |
164 s->pending_pts = read_enc(offset - 4) | ((u64)read_enc(offset - 8) << 32);
170 s->pending_pts = 0;
179 if (s->sg_pending_size == 0 && ivtv_use_dma(s)) {
180 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM ||
181 s->type == IVTV_DEC_STREAM_TYPE_VBI)) {
182 s->pending_backup = read_dec(offset - IVTV_DECODER_OFFSET);
186 s->pending_backup = read_enc(offset);
189 s->pending_offset = offset;
193 if (s->type == IVTV_ENC_STREAM_TYPE_YUV) {
197 bytes_needed = s->buf_size * ((bytes_needed + s->buf_size - 1) / s->buf_size);
201 IVTV_DEBUG_HI_DMA("%s %s: 0x%08x bytes at 0x%08x\n",
202 ivtv_use_pio(s) ? "PIO" : "DMA", s->name, bytes_needed, offset);
204 rc = ivtv_queue_move(s, &s->q_free, &s->q_full, &s->q_predma, bytes_needed);
206 IVTV_DEBUG_WARN("Cannot obtain %d bytes for %s data transfer\n",
207 bytes_needed, s->name);
210 if (rc && !s->buffers_stolen && test_bit(IVTV_F_S_APPL_IO, &s->s_flags)) {
211 IVTV_WARN("All %s stream buffers are full. Dropping data.\n", s->name);
214 s->buffers_stolen = rc;
217 buf = list_entry(s->q_predma.list.next, struct ivtv_buffer, list);
219 list_for_each_entry(buf, &s->q_predma.list, list) {
222 s->sg_pending[idx].dst = buf->dma_handle;
223 s->sg_pending[idx].src = offset;
224 s->sg_pending[idx].size = s->buf_size;
225 buf->bytesused = min(size, s->buf_size);
226 buf->dma_xfer_cnt = s->dma_xfer_cnt;
228 s->q_predma.bytesused += buf->bytesused;
230 offset += s->buf_size;
233 ivtv_buf_sync_for_device(s, buf);
242 s->sg_pending_size = idx;
246 static void dma_post(struct ivtv_stream *s)
248 struct ivtv *itv = s->itv;
255 IVTV_DEBUG_HI_DMA("%s %s completed (%x)\n", ivtv_use_pio(s) ? "PIO" : "DMA",
256 s->name, s->dma_offset);
257 list_for_each(p, &s->q_dma.list) {
262 ivtv_buf_sync_for_cpu(s, buf);
264 if (x == 0 && ivtv_use_dma(s)) {
265 offset = s->dma_last_offset;
273 IVTV_DEBUG_WARN("%s: Couldn't find start of buffer within the first 256 bytes\n", s->name);
274 offset = s->dma_last_offset;
276 if (s->dma_last_offset != offset)
277 IVTV_DEBUG_WARN("%s: offset %d -> %d\n", s->name, s->dma_last_offset, offset);
278 s->dma_last_offset = offset;
280 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM ||
281 s->type == IVTV_DEC_STREAM_TYPE_VBI)) {
282 write_dec_sync(0, s->dma_offset - IVTV_DECODER_OFFSET);
285 write_enc_sync(0, s->dma_offset);
291 *u32buf = cpu_to_le32(s->dma_backup);
295 if (s->type == IVTV_ENC_STREAM_TYPE_MPG ||
296 s->type == IVTV_ENC_STREAM_TYPE_VBI)
300 buf->bytesused += s->dma_last_offset;
301 if (buf && s->type == IVTV_DEC_STREAM_TYPE_VBI) {
302 list_for_each_entry(buf, &s->q_dma.list, list) {
304 s->q_dma.bytesused -= buf->bytesused;
305 ivtv_process_vbi_data(itv, buf, 0, s->type);
306 s->q_dma.bytesused += buf->bytesused;
308 if (s->fh == NULL) {
309 ivtv_queue_move(s, &s->q_dma, NULL, &s->q_free, 0);
314 ivtv_queue_move(s, &s->q_dma, NULL, &s->q_full, s->q_dma.bytesused);
316 if (s->type == IVTV_ENC_STREAM_TYPE_PCM &&
333 if (s->fh)
334 wake_up(&s->waitq);
337 void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock)
339 struct ivtv *itv = s->itv;
350 IVTV_DEBUG_HI_DMA("DEC PREPARE DMA %s: %08x %08x\n", s->name, s->q_predma.bytesused, offset);
353 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && f->offset_y) {
355 s->sg_pending[idx].src = yi->blanking_dmaptr;
356 s->sg_pending[idx].dst = offset;
357 s->sg_pending[idx].size = 720 * 16;
363 list_for_each_entry(buf, &s->q_predma.list, list) {
365 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && !y_done &&
367 s->sg_pending[idx].src = buf->dma_handle;
368 s->sg_pending[idx].dst = offset;
369 s->sg_pending[idx].size = y_size - bytes_written;
371 if (s->sg_pending[idx].size != buf->bytesused) {
373 s->sg_pending[idx].src =
374 buf->dma_handle + s->sg_pending[idx - 1].size;
375 s->sg_pending[idx].dst = offset;
376 s->sg_pending[idx].size =
377 buf->bytesused - s->sg_pending[idx - 1].size;
378 offset += s->sg_pending[idx].size;
382 s->sg_pending[idx].src = buf->dma_handle;
383 s->sg_pending[idx].dst = offset;
384 s->sg_pending[idx].size = buf->bytesused;
390 ivtv_buf_sync_for_device(s, buf);
393 s->sg_pending_size = idx;
396 ivtv_stream_sync_for_device(s);
402 ivtv_dma_dec_start(s);
404 set_bit(IVTV_F_S_DMA_PENDING, &s->s_flags);
408 ivtv_dma_dec_start(s);
410 set_bit(IVTV_F_S_DMA_PENDING, &s->s_flags);
414 static void ivtv_dma_enc_start_xfer(struct ivtv_stream *s)
416 struct ivtv *itv = s->itv;
418 s->sg_dma->src = cpu_to_le32(s->sg_processing[s->sg_processed].src);
419 s->sg_dma->dst = cpu_to_le32(s->sg_processing[s->sg_processed].dst);
420 s->sg_dma->size = cpu_to_le32(s->sg_processing[s->sg_processed].size | 0x80000000);
421 s->sg_processed++;
423 ivtv_stream_sync_for_device(s);
424 write_reg(s->sg_handle, IVTV_REG_ENCDMAADDR);
430 static void ivtv_dma_dec_start_xfer(struct ivtv_stream *s)
432 struct ivtv *itv = s->itv;
434 s->sg_dma->src = cpu_to_le32(s->sg_processing[s->sg_processed].src);
435 s->sg_dma->dst = cpu_to_le32(s->sg_processing[s->sg_processed].dst);
436 s->sg_dma->size = cpu_to_le32(s->sg_processing[s->sg_processed].size | 0x80000000);
437 s->sg_processed++;
439 ivtv_stream_sync_for_device(s);
440 write_reg(s->sg_handle, IVTV_REG_DECDMAADDR);
447 static void ivtv_dma_enc_start(struct ivtv_stream *s)
449 struct ivtv *itv = s->itv;
453 IVTV_DEBUG_HI_DMA("start %s for %s\n", ivtv_use_dma(s) ? "DMA" : "PIO", s->name);
455 if (s->q_predma.bytesused)
456 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused);
458 if (ivtv_use_dma(s))
459 s->sg_pending[s->sg_pending_size - 1].size += 256;
469 clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags);
470 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && s_vbi->sg_pending_size &&
471 s->sg_pending_size + s_vbi->sg_pending_size <= s->buffers) {
476 s->sg_pending[s->sg_pending_size++] = s_vbi->sg_pending[i];
481 set_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags);
482 IVTV_DEBUG_HI_DMA("include DMA for %s\n", s_vbi->name);
485 s->dma_xfer_cnt++;
486 memcpy(s->sg_processing, s->sg_pending, sizeof(struct ivtv_sg_host_element) * s->sg_pending_size);
487 s->sg_processing_size = s->sg_pending_size;
488 s->sg_pending_size = 0;
489 s->sg_processed = 0;
490 s->dma_offset = s->pending_offset;
491 s->dma_backup = s->pending_backup;
492 s->dma_pts = s->pending_pts;
494 if (ivtv_use_pio(s)) {
498 itv->cur_pio_stream = s->type;
502 ivtv_dma_enc_start_xfer(s);
504 itv->cur_dma_stream = s->type;
508 static void ivtv_dma_dec_start(struct ivtv_stream *s)
510 struct ivtv *itv = s->itv;
512 if (s->q_predma.bytesused)
513 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused);
514 s->dma_xfer_cnt++;
515 memcpy(s->sg_processing, s->sg_pending, sizeof(struct ivtv_sg_host_element) * s->sg_pending_size);
516 s->sg_processing_size = s->sg_pending_size;
517 s->sg_pending_size = 0;
518 s->sg_processed = 0;
520 IVTV_DEBUG_HI_DMA("start DMA for %s\n", s->name);
522 ivtv_dma_dec_start_xfer(s);
524 itv->cur_dma_stream = s->type;
529 struct ivtv_stream *s = NULL;
541 s = &itv->streams[itv->cur_dma_stream];
542 ivtv_stream_sync_for_cpu(s);
547 s->sg_processed, s->sg_processing_size, itv->dma_retries);
552 s->sg_processed = s->sg_processing_size;
557 s->sg_processed = 0;
561 if (s->sg_processed < s->sg_processing_size) {
563 ivtv_dma_dec_start_xfer(s);
566 if (s->type == IVTV_DEC_STREAM_TYPE_YUV)
568 IVTV_DEBUG_HI_DMA("DEC DATA READ %s: %d\n", s->name, s->q_dma.bytesused);
576 ivtv_vapi(itv, CX2341X_DEC_SCHED_DMA_FROM_HOST, 3, 0, s->q_dma.bytesused,
580 while ((buf = ivtv_dequeue(s, &s->q_dma)) != NULL) {
581 ivtv_buf_sync_for_cpu(s, buf);
582 ivtv_enqueue(s, buf, &s->q_free);
584 wake_up(&s->waitq);
595 struct ivtv_stream *s;
605 s = &itv->streams[itv->cur_dma_stream];
606 ivtv_stream_sync_for_cpu(s);
610 s->dma_offset, s->sg_processed, s->sg_processing_size, itv->dma_retries);
615 s->sg_processed = s->sg_processing_size;
620 s->sg_processed = 0;
624 if (s->sg_processed < s->sg_processing_size) {
626 ivtv_dma_enc_start_xfer(s);
631 dma_post(s);
632 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) {
633 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI];
634 dma_post(s);
636 s->sg_processing_size = 0;
637 s->sg_processed = 0;
643 struct ivtv_stream *s;
649 s = &itv->streams[itv->cur_pio_stream];
650 IVTV_DEBUG_HI_IRQ("ENC PIO COMPLETE %s\n", s->name);
653 dma_post(s);
654 if (s->type == IVTV_ENC_STREAM_TYPE_MPG)
656 else if (s->type == IVTV_ENC_STREAM_TYPE_YUV)
658 else if (s->type == IVTV_ENC_STREAM_TYPE_PCM)
661 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) {
662 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI];
663 dma_post(s);
694 struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream];
696 if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) {
702 ivtv_dma_dec_start(s);
723 s->sg_processed = 0;
725 ivtv_dma_enc_start_xfer(s);
745 struct ivtv_stream *s;
756 s = &itv->streams[ivtv_stream_map[data[0]]];
757 if (!stream_enc_dma_append(s, data)) {
758 set_bit(ivtv_use_pio(s) ? IVTV_F_S_PIO_PENDING : IVTV_F_S_DMA_PENDING, &s->s_flags);
765 struct ivtv_stream *s;
768 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI];
770 if (!stream_enc_dma_append(s, data))
771 set_bit(ivtv_use_pio(s) ? IVTV_F_S_PIO_PENDING : IVTV_F_S_DMA_PENDING, &s->s_flags);
777 struct ivtv_stream *s = &itv->streams[IVTV_DEC_STREAM_TYPE_VBI];
780 if (test_bit(IVTV_F_S_CLAIMED, &s->s_flags) &&
781 !stream_enc_dma_append(s, data)) {
782 set_bit(IVTV_F_S_PIO_PENDING, &s->s_flags);
789 struct ivtv_stream *s;
800 s = &itv->streams[IVTV_DEC_STREAM_TYPE_YUV];
806 s = &itv->streams[IVTV_DEC_STREAM_TYPE_MPG];
808 IVTV_DEBUG_HI_IRQ("DEC DATA REQ %s: %d %08x %u\n", s->name, s->q_full.bytesused,
810 if (itv->dma_data_req_size == 0 || s->q_full.bytesused < itv->dma_data_req_size) {
811 set_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags);
816 clear_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags);
817 ivtv_queue_move(s, &s->q_full, NULL, &s->q_predma, itv->dma_data_req_size);
818 ivtv_dma_stream_dec_prepare(s, itv->dma_data_req_offset + IVTV_DECODER_OFFSET, 0);
865 struct ivtv_stream *s = ivtv_get_output_stream(itv);
878 if (s)
879 wake_up(&s->waitq);
881 if (s && s->vdev.v4l2_dev)
882 v4l2_event_queue(&s->vdev, frame ? &evtop : &evbottom);
1022 struct ivtv_stream *s = &itv->streams[idx];
1024 if (!test_and_clear_bit(IVTV_F_S_DMA_PENDING, &s->s_flags))
1026 if (s->type >= IVTV_DEC_STREAM_TYPE_MPG)
1027 ivtv_dma_dec_start(s);
1029 ivtv_dma_enc_start(s);
1042 struct ivtv_stream *s = &itv->streams[idx];
1044 if (!test_and_clear_bit(IVTV_F_S_PIO_PENDING, &s->s_flags))
1046 if (s->type == IVTV_DEC_STREAM_TYPE_VBI || s->type < IVTV_DEC_STREAM_TYPE_MPG)
1047 ivtv_dma_enc_start(s);
1058 /* If we've just handled a 'forced' vsync, it's safest to say it