Lines Matching +full:0 +full:x200
24 u32 value = 0;
25 u32 tmp = 0;
63 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp);
64 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */
66 value |= 0x00000080; /* set BLUE_FIELD_EN */
67 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value);
69 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp);
70 value &= 0xFFFFFF7F;
72 value |= 0x00000080; /* set BLUE_FIELD_EN */
73 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value);
78 int ret_val = 0;
79 int i = 0;
80 u32 value = 0;
81 u32 tmp = 0;
83 for (i = 0; i < MAX_DECODERS; i++) {
85 value = cx25821_i2c_read(&dev->i2c_bus[0],
86 MODE_CTRL + (0x200 * i), &tmp);
87 value &= 0xFFFFFFF0;
89 value |= 0x10001;
90 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
91 MODE_CTRL + (0x200 * i), value);
94 value = cx25821_i2c_read(&dev->i2c_bus[0],
95 HORIZ_TIM_CTRL + (0x200 * i), &tmp);
96 value &= 0x00C00C00;
97 value |= 0x612D0074;
98 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
99 HORIZ_TIM_CTRL + (0x200 * i), value);
101 value = cx25821_i2c_read(&dev->i2c_bus[0],
102 VERT_TIM_CTRL + (0x200 * i), &tmp);
103 value &= 0x00C00C00;
104 value |= 0x1C1E001A; /* vblank_cnt + 2 to get camera ID */
105 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
106 VERT_TIM_CTRL + (0x200 * i), value);
109 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
110 SC_STEP_SIZE + (0x200 * i), 0x43E00000);
113 value = cx25821_i2c_read(&dev->i2c_bus[0],
114 OUT_CTRL_NS + (0x200 * i), &tmp);
115 value &= 0xFFFBFFFF;
116 value |= 0x00040000;
117 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
118 OUT_CTRL_NS + (0x200 * i), value);
121 value = cx25821_i2c_read(&dev->i2c_bus[0],
122 OUT_CTRL1 + (0x200 * i), &tmp);
123 value &= 0xFFFBFFFF;
124 value |= 0x00040000;
125 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
126 OUT_CTRL1 + (0x200 * i), value);
132 value = cx25821_i2c_read(&dev->i2c_bus[0],
133 MISC_TIM_CTRL + (0x200 * i), &tmp);
137 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
138 MISC_TIM_CTRL + (0x200 * i), value);
140 /* set vbi_gate_en to 0 */
141 value = cx25821_i2c_read(&dev->i2c_bus[0],
142 DFE_CTRL1 + (0x200 * i), &tmp);
144 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
145 DFE_CTRL1 + (0x200 * i), value);
151 for (i = 0; i < MAX_ENCODERS; i++) {
153 value = cx25821_i2c_read(&dev->i2c_bus[0],
154 DENC_A_REG_1 + (0x100 * i), &tmp);
155 value &= 0xF000FC00;
156 value |= 0x06B402D0;
157 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
158 DENC_A_REG_1 + (0x100 * i), value);
161 value = cx25821_i2c_read(&dev->i2c_bus[0],
162 DENC_A_REG_2 + (0x100 * i), &tmp);
163 value &= 0xFF000000;
164 value |= 0x007E9054;
165 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
166 DENC_A_REG_2 + (0x100 * i), value);
168 value = cx25821_i2c_read(&dev->i2c_bus[0],
169 DENC_A_REG_3 + (0x100 * i), &tmp);
170 value &= 0xFC00FE00;
171 value |= 0x00EC00F0;
172 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
173 DENC_A_REG_3 + (0x100 * i), value);
176 value = cx25821_i2c_read(&dev->i2c_bus[0],
177 DENC_A_REG_4 + (0x100 * i), &tmp);
178 value &= 0x00FCFFFF;
179 value |= 0x13020000;
180 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
181 DENC_A_REG_4 + (0x100 * i), value);
183 value = cx25821_i2c_read(&dev->i2c_bus[0],
184 DENC_A_REG_5 + (0x100 * i), &tmp);
185 value &= 0xFFFF0000;
186 value |= 0x0000E575;
187 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
188 DENC_A_REG_5 + (0x100 * i), value);
190 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
191 DENC_A_REG_6 + (0x100 * i), 0x009A89C1);
194 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
195 DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);
199 /* 0 - 720 */
200 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], HSCALE_CTRL, 0x0);
201 /* 0 - 480 */
202 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], VSCALE_CTRL, 0x0);
205 value = cx25821_i2c_read(&dev->i2c_bus[0], BYP_AB_CTRL, &tmp);
206 value |= 0x00080200;
207 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], BYP_AB_CTRL, value);
215 u32 value = 0, tmp = 0;
218 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
219 COMB_2D_HFS_CFG + (0x200 * dec), 0x20002861);
220 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
221 COMB_2D_HFD_CFG + (0x200 * dec), 0x20002861);
222 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
223 COMB_2D_LF_CFG + (0x200 * dec), 0x200A1023);
226 value = cx25821_i2c_read(&dev->i2c_bus[0],
227 COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);
228 value &= 0x06230000;
229 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
230 COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);
233 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
234 COMB_2D_BLEND + (0x200 * dec), 0x210F0F0F);
237 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
238 COMB_MISC_CTRL + (0x200 * dec), 0x41120A7F);
245 int ret_val = 0;
246 int i = 0;
247 u32 value = 0;
248 u32 tmp = 0;
250 for (i = 0; i < MAX_DECODERS; i++) {
252 value = cx25821_i2c_read(&dev->i2c_bus[0],
253 MODE_CTRL + (0x200 * i), &tmp);
254 value &= 0xFFFFFFF0;
256 value |= 0x10004;
257 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
258 MODE_CTRL + (0x200 * i), value);
261 value = cx25821_i2c_read(&dev->i2c_bus[0],
262 HORIZ_TIM_CTRL + (0x200 * i), &tmp);
263 value &= 0x00C00C00;
264 value |= 0x632D007D;
265 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
266 HORIZ_TIM_CTRL + (0x200 * i), value);
269 value = cx25821_i2c_read(&dev->i2c_bus[0],
270 VERT_TIM_CTRL + (0x200 * i), &tmp);
271 value &= 0x00C00C00;
272 value |= 0x28240026; /* vblank_cnt + 2 to get camera ID */
273 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
274 VERT_TIM_CTRL + (0x200 * i), value);
277 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
278 SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);
281 value = cx25821_i2c_read(&dev->i2c_bus[0],
282 OUT_CTRL_NS + (0x200 * i), &tmp);
283 value &= 0xFFFBFFFF;
284 value |= 0x00040000;
285 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
286 OUT_CTRL_NS + (0x200 * i), value);
289 value = cx25821_i2c_read(&dev->i2c_bus[0],
290 OUT_CTRL1 + (0x200 * i), &tmp);
291 value &= 0xFFFBFFFF;
292 value |= 0x00040000;
293 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
294 OUT_CTRL1 + (0x200 * i), value);
300 value = cx25821_i2c_read(&dev->i2c_bus[0],
301 MISC_TIM_CTRL + (0x200 * i), &tmp);
305 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
306 MISC_TIM_CTRL + (0x200 * i), value);
308 /* set vbi_gate_en to 0 */
309 value = cx25821_i2c_read(&dev->i2c_bus[0],
310 DFE_CTRL1 + (0x200 * i), &tmp);
312 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
313 DFE_CTRL1 + (0x200 * i), value);
321 for (i = 0; i < MAX_ENCODERS; i++) {
323 value = cx25821_i2c_read(&dev->i2c_bus[0],
324 DENC_A_REG_1 + (0x100 * i), &tmp);
325 value &= 0xF000FC00;
326 value |= 0x06C002D0;
327 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
328 DENC_A_REG_1 + (0x100 * i), value);
331 value = cx25821_i2c_read(&dev->i2c_bus[0],
332 DENC_A_REG_2 + (0x100 * i), &tmp);
333 value &= 0xFF000000;
334 value |= 0x007E9754;
335 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
336 DENC_A_REG_2 + (0x100 * i), value);
339 value = cx25821_i2c_read(&dev->i2c_bus[0],
340 DENC_A_REG_3 + (0x100 * i), &tmp);
341 value &= 0xFC00FE00;
342 value |= 0x00FC0120;
343 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
344 DENC_A_REG_3 + (0x100 * i), value);
346 /* set PAL vblank, phase alternation, 0 IRE pedestal */
347 value = cx25821_i2c_read(&dev->i2c_bus[0],
348 DENC_A_REG_4 + (0x100 * i), &tmp);
349 value &= 0x00FCFFFF;
350 value |= 0x14010000;
351 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
352 DENC_A_REG_4 + (0x100 * i), value);
354 value = cx25821_i2c_read(&dev->i2c_bus[0],
355 DENC_A_REG_5 + (0x100 * i), &tmp);
356 value &= 0xFFFF0000;
357 value |= 0x0000F078;
358 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
359 DENC_A_REG_5 + (0x100 * i), value);
361 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
362 DENC_A_REG_6 + (0x100 * i), 0x00A493CF);
365 ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
366 DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);
370 /* 0 - 720 */
371 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], HSCALE_CTRL, 0x0);
372 /* 0 - 576 */
373 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], VSCALE_CTRL, 0x0);
376 value = cx25821_i2c_read(&dev->i2c_bus[0], BYP_AB_CTRL, &tmp);
377 value &= 0xFFF7FDFF;
378 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], BYP_AB_CTRL, value);
385 int status = 0;
386 u32 value = 0, tmp = 0;
394 value = cx25821_i2c_read(&dev->i2c_bus[0], DENC_A_REG_4, &tmp);
396 status = cx25821_i2c_write(&dev->i2c_bus[0], DENC_A_REG_4, value);
399 value = cx25821_i2c_read(&dev->i2c_bus[0], DENC_B_REG_4, &tmp);
401 status = cx25821_i2c_write(&dev->i2c_bus[0], DENC_B_REG_4, value);
409 int decoder = 0;
410 int decoder_count = 0;
411 u32 hscale = 0x0;
412 u32 vscale = 0x0;
422 if (decoder_select <= 7 && decoder_select >= 0) {
426 decoder = 0;
432 hscale = 0x13E34B;
433 vscale = 0x0;
437 hscale = 0x10A273;
438 vscale = 0x0;
442 hscale = 0x3115B2;
443 vscale = 0x1E00;
447 hscale = 0x378D84;
448 vscale = 0x1E00;
452 hscale = 0x0;
453 vscale = 0x0;
459 cx25821_i2c_write(&dev->i2c_bus[0],
460 HSCALE_CTRL + (0x200 * decoder), hscale);
461 cx25821_i2c_write(&dev->i2c_bus[0],
462 VSCALE_CTRL + (0x200 * decoder), vscale);
469 u32 fld_cnt = 0;
470 u32 tmp = 0;
496 fld_cnt = cx25821_i2c_read(&dev->i2c_bus[0], disp_cnt_reg, &tmp);
499 fld_cnt &= 0xFFFF0000;
502 fld_cnt &= 0x0000FFFF;
506 cx25821_i2c_write(&dev->i2c_bus[0], disp_cnt_reg, fld_cnt);
535 return 0;
542 if (numeric >= 0)
545 temp = ~(abs(numeric) & 0xFF);
553 int ret_val = 0;
554 int value = 0;
555 u32 val = 0, tmp = 0;
564 val = cx25821_i2c_read(&dev->i2c_bus[0],
565 VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);
566 val &= 0xFFFFFF00;
567 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
568 VDEC_A_BRITE_CTRL + (0x200 * decoder), val | value);
574 int ret_val = 0;
575 int value = 0;
576 u32 val = 0, tmp = 0;
584 val = cx25821_i2c_read(&dev->i2c_bus[0],
585 VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);
586 val &= 0xFFFFFF00;
587 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
588 VDEC_A_CNTRST_CTRL + (0x200 * decoder), val | value);
595 int ret_val = 0;
596 int value = 0;
597 u32 val = 0, tmp = 0;
607 val = cx25821_i2c_read(&dev->i2c_bus[0],
608 VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);
609 val &= 0xFFFFFF00;
611 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
612 VDEC_A_HUE_CTRL + (0x200 * decoder), val | value);
619 int ret_val = 0;
620 int value = 0;
621 u32 val = 0, tmp = 0;
631 val = cx25821_i2c_read(&dev->i2c_bus[0],
632 VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);
633 val &= 0xFFFFFF00;
634 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
635 VDEC_A_USAT_CTRL + (0x200 * decoder), val | value);
637 val = cx25821_i2c_read(&dev->i2c_bus[0],
638 VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);
639 val &= 0xFFFFFF00;
640 ret_val |= cx25821_i2c_write(&dev->i2c_bus[0],
641 VDEC_A_VSAT_CTRL + (0x200 * decoder), val | value);
650 u32 value = 0, tmp = 0;
651 int ret_val = 0;
652 int i = 0;
655 value = cx25821_i2c_read(&dev->i2c_bus[0], MON_A_CTRL, &tmp);
656 value &= 0xFFFFF0FF;
657 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], MON_A_CTRL, value);
659 if (ret_val < 0)
663 value = cx25821_i2c_read(&dev->i2c_bus[0], MON_A_CTRL, &tmp);
664 value &= 0xFFFFFFDF;
665 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], MON_A_CTRL, value);
667 if (ret_val < 0)
671 * FIXME: due to a coding bug the duration was always 0. It's
674 * now just fill in 0 as the duration.
676 for (i = 0; i < dev->_max_num_decoders; i++)
677 medusa_set_decoderduration(dev, i, 0);
680 value = cx25821_i2c_read(&dev->i2c_bus[0], DENC_AB_CTRL, &tmp);
681 value &= 0xFF70FF70;
682 value |= 0x00090008; /* set en_active */
683 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], DENC_AB_CTRL, value);
685 if (ret_val < 0)
689 value = cx25821_i2c_read(&dev->i2c_bus[0], BYP_AB_CTRL, &tmp);
690 value |= 0x00040100; /* enable VIP */
691 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], BYP_AB_CTRL, value);
693 if (ret_val < 0)
697 value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);
698 value &= 0x83FFFFFF;
699 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL,
700 value | 0x10000000);
702 if (ret_val < 0)
706 value = cx25821_i2c_read(&dev->i2c_bus[0], PIN_OE_CTRL, &tmp);
707 value &= 0xFEF0FE00;
715 value |= 0x010001F8;
718 value |= 0x010F0108;
722 ret_val = cx25821_i2c_write(&dev->i2c_bus[0], PIN_OE_CTRL, value);
724 if (ret_val < 0)