pci/cx18/cx18-i2c.c

69 static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
73 	struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
86 		init_data->name = cx->card_name;
95 int cx18_i2c_register(struct cx18 *cx, unsigned idx)
99 	struct i2c_adapter *adap = &cx->i2c_adap[bus];
105 		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
106 				adap, type, 0, cx->card_i2c->radio);
109 		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
110 				adap, type, 0, cx->card_i2c->demod);
113 		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
114 				adap, type, 0, cx->card_i2c->tv);
121 		return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
128 	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
136 struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
141 	spin_lock(&cx->v4l2_dev.lock);
142 	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
148 	spin_unlock(&cx->v4l2_dev.lock);
154 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
157 	u32 r = cx18_read_reg(cx, addr);
160 		cx18_write_reg(cx, r | SETSCL_BIT, addr);
162 		cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
167 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
170 	u32 r = cx18_read_reg(cx, addr);
173 		cx18_write_reg(cx, r | SETSDL_BIT, addr);
175 		cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
180 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
184 	return cx18_read_reg(cx, addr) & GETSCL_BIT;
189 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
193 	return cx18_read_reg(cx, addr) & GETSDL_BIT;
217 int init_cx18_i2c(struct cx18 *cx)
224 		cx->i2c_algo[i] = cx18_i2c_algo_template;
225 		cx->i2c_algo_cb_data[i].cx = cx;
226 		cx->i2c_algo_cb_data[i].bus_index = i;
227 		cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
230 		cx->i2c_adap[i] = cx18_i2c_adap_template;
231 		cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
232 		sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
233 				" #%d-%d", cx->instance, i);
234 		i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
235 		cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
238 	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
241 		cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
244 		cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
248 	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
250 	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
252 	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
256 	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
258 	cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
262 	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
263 	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
264 	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
267 	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
268 	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
269 	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
271 	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
274 	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
277 	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
283 	i2c_del_adapter(&cx->i2c_adap[0]);
288 void exit_cx18_i2c(struct cx18 *cx)
292 	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
294 	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
298 		i2c_del_adapter(&cx->i2c_adap[i]);