Lines Matching refs:wm8775_write
63 static int wm8775_write(struct v4l2_subdev *sd, int reg, u16 val)
95 wm8775_write(sd, R21, 0x0c0 | state->input);
97 wm8775_write(sd, R14, vol_l | 0x100); /* 0x100= Left channel ADC zero cross enable */
98 wm8775_write(sd, R15, vol_r | 0x100); /* 0x100= Right channel ADC zero cross enable */
102 wm8775_write(sd, R21, state->input);
139 wm8775_write(sd, R17, (ctrl->val ? ALC_EN : 0) | ALC_HOLD);
238 wm8775_write(sd, R23, 0x000);
240 wm8775_write(sd, R7, 0x000);
242 wm8775_write(sd, R11, 0x021);
244 wm8775_write(sd, R12, 0x102);
246 wm8775_write(sd, R13, 0x000);
250 wm8775_write(sd, R14, 0x1d4);
252 wm8775_write(sd, R15, 0x1d4);
254 wm8775_write(sd, R16, 0x1bf);
257 wm8775_write(sd, R17, 0x185);
260 wm8775_write(sd, R16, 0x1bb);
262 wm8775_write(sd, R17, (state->loud->val ? ALC_EN : 0) | ALC_HOLD);
265 wm8775_write(sd, R18, 0x0a2);
267 wm8775_write(sd, R19, 0x005);
270 wm8775_write(sd, R20, 0x07a);
272 wm8775_write(sd, R21, 0x102);
275 wm8775_write(sd, R20, 0x0fb);