Lines Matching +full:- +full:30
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
59 #define TRACE_IN dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
60 #define TRACE_OUT dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
68 .addr = state->config->demod_address,
76 state->config->demod_address, buf[0], buf[1]);
78 ret = i2c_transfer(state->i2c_adap, &msg, 1);
80 return (ret != 1) ? -EREMOTEIO : 0;
91 .addr = state->config->demod_address,
96 .addr = state->config->demod_address,
102 ret = i2c_transfer(state->i2c_adap, msg, 2);
109 return -EREMOTEIO;
131 return -EREMOTEIO;
140 m = 1 << state->deci;
141 tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk;
146 if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) |
147 (state->csel << 1) |
148 state->rsel) < 0)
158 return -1;
169 return -EREMOTEIO;
186 return -1;
201 return -EREMOTEIO;
214 return -EREMOTEIO;
227 return -EREMOTEIO;
269 return -EREMOTEIO;
282 return -EREMOTEIO;
299 return -EREMOTEIO;
324 return -EREMOTEIO;
338 return -EREMOTEIO;
344 state->deci = 0; state->csel = 0; state->rsel = 0;
346 state->deci = 0; state->csel = 0; state->rsel = 1;
348 state->deci = 0; state->csel = 1; state->rsel = 0;
350 state->deci = 0; state->csel = 1; state->rsel = 1;
352 state->deci = 1; state->csel = 0; state->rsel = 0;
354 state->deci = 1; state->csel = 0; state->rsel = 1;
356 state->deci = 1; state->csel = 1; state->rsel = 0;
358 state->deci = 1; state->csel = 1; state->rsel = 1;
360 state->deci = 2; state->csel = 0; state->rsel = 0;
362 state->deci = 2; state->csel = 0; state->rsel = 1;
364 state->deci = 2; state->csel = 1; state->rsel = 0;
366 state->deci = 2; state->csel = 1; state->rsel = 1;
368 state->deci = 3; state->csel = 0; state->rsel = 0;
370 state->deci = 3; state->csel = 0; state->rsel = 1;
372 state->deci = 3; state->csel = 1; state->rsel = 0;
374 state->deci = 3; state->csel = 1; state->rsel = 1;
376 state->deci = 4; state->csel = 0; state->rsel = 0;
378 state->deci = 4; state->csel = 0; state->rsel = 1;
380 state->deci = 4; state->csel = 1; state->rsel = 0;
382 state->deci = 4; state->csel = 1; state->rsel = 1;
384 state->deci = 5; state->csel = 0; state->rsel = 0;
386 state->deci = 5; state->csel = 0; state->rsel = 1;
388 state->deci = 5; state->csel = 1; state->rsel = 0;
390 state->deci = 5; state->csel = 1; state->rsel = 1;
393 if (state->csel == 0)
394 state->master_clk = 92000;
396 state->master_clk = 61333;
412 return -1;
417 return -1;
433 return -EREMOTEIO;
445 return -1;
459 int ack = -1;
519 dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error");
520 return -EREMOTEIO;
540 afcm = AFCM - 4096;
543 afcerr = afcm * state->master_clk / 8192;
549 return -EREMOTEIO;
568 return -EREMOTEIO;
574 struct mb86a16_state *state = fe->demodulator_priv;
605 return -EREMOTEIO;
625 return -EREMOTEIO;
646 crm = CRM - 256;
676 afcm = AFCM - 512;
680 afcerr = afcm * state->master_clk / 8192;
698 fOSC_OFS = fOSC - fTP;
704 frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000;
712 return -EREMOTEIO;
748 *afcex_freq = *fOSC * 1000 - crnt_swp_freq;
750 *afcex_freq = crnt_swp_freq - *fOSC * 1000;
752 AFCEX = *afcex_freq * 8192 / state->master_clk;
765 if ((v - 1 == vmin) &&
766 (*(V + 30 + v) >= 0) &&
767 (*(V + 30 + v - 1) >= 0) &&
768 (*(V + 30 + v - 1) > *(V + 30 + v)) &&
769 (*(V + 30 + v - 1) > SIGMIN)) {
771 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
772 *SIG1 = *(V + 30 + v - 1);
774 (*(V + 30 + v) >= 0) &&
775 (*(V + 30 + v - 1) >= 0) &&
776 (*(V + 30 + v) > *(V + 30 + v - 1)) &&
777 (*(V + 30 + v) > SIGMIN)) {
780 *SIG1 = *(V + 30 + v);
781 } else if ((*(V + 30 + v) > 0) &&
782 (*(V + 30 + v - 1) > 0) &&
783 (*(V + 30 + v - 2) > 0) &&
784 (*(V + 30 + v - 3) > 0) &&
785 (*(V + 30 + v - 1) > *(V + 30 + v)) &&
786 (*(V + 30 + v - 2) > *(V + 30 + v - 3)) &&
787 ((*(V + 30 + v - 1) > SIGMIN) ||
788 (*(V + 30 + v - 2) > SIGMIN))) {
790 if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) {
791 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
792 *SIG1 = *(V + 30 + v - 1);
794 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2;
795 *SIG1 = *(V + 30 + v - 2);
798 (*(V + 30 + v) >= 0) &&
799 (*(V + 30 + v - 1) >= 0) &&
800 (*(V + 30 + v - 2) >= 0) &&
801 (*(V + 30 + v) > *(V + 30 + v - 2)) &&
802 (*(V + 30 + v - 1) > *(V + 30 + v - 2)) &&
803 ((*(V + 30 + v) > SIGMIN) ||
804 (*(V + 30 + v - 1) > SIGMIN))) {
806 if (*(V + 30 + v) >= *(V + 30 + v - 1)) {
808 *SIG1 = *(V + 30 + v);
810 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
811 *SIG1 = *(V + 30 + v - 1);
814 swp_freq = -1 ;
818 if ((*(V + 30 + v) > 0) &&
819 (*(V + 30 + v + 1) > 0) &&
820 (*(V + 30 + v + 2) > 0) &&
821 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
822 (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
823 (*(V + 30 + v + 1) > SIGMIN)) {
826 *SIG1 = *(V + 30 + v + 1);
828 (*(V + 30 + v) >= 0) &&
829 (*(V + 30 + v + 1) >= 0) &&
830 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
831 (*(V + 30 + v + 1) > SIGMIN)) {
834 *SIG1 = *(V + 30 + v);
836 (*(V + 30 + v) > 0) &&
837 (*(V + 30 + v + 1) > 0) &&
838 (*(V + 30 + v + 2) > 0) &&
839 (*(V + 30 + v) > *(V + 30 + v + 1)) &&
840 (*(V + 30 + v) > *(V + 30 + v + 2)) &&
841 (*(V + 30 + v) > SIGMIN)) {
844 *SIG1 = *(V + 30 + v);
845 } else if ((*(V + 30 + v) >= 0) &&
846 (*(V + 30 + v + 1) >= 0) &&
847 (*(V + 30 + v + 2) >= 0) &&
848 (*(V + 30 + v + 3) >= 0) &&
849 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
850 (*(V + 30 + v + 2) > *(V + 30 + v + 3)) &&
851 ((*(V + 30 + v + 1) > SIGMIN) ||
852 (*(V + 30 + v + 2) > SIGMIN))) {
854 if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
856 *SIG1 = *(V + 30 + v + 1);
859 *SIG1 = *(V + 30 + v + 2);
861 } else if ((*(V + 30 + v) >= 0) &&
862 (*(V + 30 + v + 1) >= 0) &&
863 (*(V + 30 + v + 2) >= 0) &&
864 (*(V + 30 + v + 3) >= 0) &&
865 (*(V + 30 + v) > *(V + 30 + v + 2)) &&
866 (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
867 (*(V + 30 + v) > *(V + 30 + v + 3)) &&
868 (*(V + 30 + v + 1) > *(V + 30 + v + 3)) &&
869 ((*(V + 30 + v) > SIGMIN) ||
870 (*(V + 30 + v + 1) > SIGMIN))) {
872 if (*(V + 30 + v) >= *(V + 30 + v + 1)) {
874 *SIG1 = *(V + 30 + v);
877 *SIG1 = *(V + 30 + v + 1);
880 (*(V + 30 + v) >= 0) &&
881 (*(V + 30 + v + 1) >= 0) &&
882 (*(V + 30 + v + 2) >= 0) &&
883 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
884 (*(V + 30 + v + 2) > *(V + 30 + v)) &&
885 ((*(V + 30 + v + 1) > SIGMIN) ||
886 (*(V + 30 + v + 2) > SIGMIN))) {
888 if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
890 *SIG1 = *(V + 30 + v + 1);
893 *SIG1 = *(V + 30 + v + 2);
895 } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) {
897 *SIG1 = *(V + 30 + v);
899 swp_freq = -1;
901 swp_freq = -1;
923 *afcex_freq = *fOSC * 1000 - swp_freq;
925 *afcex_freq = swp_freq - *fOSC * 1000;
927 AFCEX = *afcex_freq * 8192 / state->master_clk;
939 AFCEX = afcex_freq * 8192 / state->master_clk;
949 return -EREMOTEIO;
960 return -EREMOTEIO;
970 return -EREMOTEIO;
980 return -EREMOTEIO;
990 return -EREMOTEIO;
1038 int ret = -1;
1041 dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate);
1044 swp_ofs = state->srate / 4;
1047 V[i] = -1;
1054 for (n = 0; ((n < 3) && (ret == -1)); n++) {
1069 return -1;
1073 return -1;
1077 return -1; /* (0, 0) */
1079 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1081 return -1; /* (1, smrt) = (1, symbolrate) */
1085 return -1; /* (0, 1, 2) */
1089 return -1; /* (0, 0) */
1091 smrt_info_get(state, state->srate);
1092 if (smrt_set(state, state->srate) < 0) {
1094 return -1;
1097 R = vco_dev_get(state, state->srate);
1099 fOSC_start = state->frequency;
1102 if (state->frequency % 2 == 0) {
1103 fOSC_start = state->frequency;
1105 fOSC_start = state->frequency + 1;
1107 fOSC_start = state->frequency - 1;
1120 vmax--;
1123 (ftemp - state->frequency * 1000 >= fcp + state->srate / 4))
1132 ftemp = ftemp - swp_ofs;
1133 vmin--;
1141 (state->frequency * 1000 - ftemp >= fcp + state->srate / 4))
1146 wait_t = (8000 + state->srate / 2) / state->srate;
1160 swp_info_get(state, fOSC_start, state->srate,
1165 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1167 return -1;
1172 return -1;
1176 return -1;
1182 return -1;
1184 V[30 + v] = SIG1 ;
1191 if ((abs(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) {
1196 if ((signal_dupl == 0) && (swp_freq > 0) && (abs(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) {
1197 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate);
1200 swp_info_get2(state, state->srate, R, swp_freq,
1204 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1206 return -1;
1210 return -1;
1212 signal = signal_det(state, state->srate, &SIG1);
1218 smrt_info_get(state, state->srate);
1219 if (smrt_set(state, state->srate) < 0) {
1221 return -1;
1239 v = -i / 2;
1255 return -1;
1257 smrt_info_get(state, state->srate);
1258 if (smrt_set(state, state->srate) < 0) {
1260 return -1;
1264 return -1;
1266 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1268 return -1;
1273 return -1;
1277 return -1;
1280 wait_t = 200000 / state->master_clk + 200000 / state->srate;
1283 if (afcerr == -1)
1284 return -1;
1288 if (state->srate >= 1500)
1289 smrt_d = state->srate / 3;
1291 smrt_d = state->srate / 2;
1295 return -1;
1299 return -1;
1304 return -1;
1307 temp_freq = swp_freq + (i - 1) * state->srate / 8;
1311 return -1;
1315 return -1;
1317 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1323 (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) {
1325 temp_freq = swp_freq - 2 * state->srate / 8;
1329 return -1;
1333 return -1;
1335 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1339 delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300;
1344 (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) {
1346 temp_freq = swp_freq + 2 * state->srate / 8;
1350 return -1;
1354 return -1;
1356 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1360 delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300;
1370 if (abs(state->frequency * 1000 - swp_freq) > 3800) {
1371 dprintk(verbose, MB86A16_INFO, 1, "NO -- SIGNAL !");
1382 return -1;
1386 return -1;
1388 R = vco_dev_get(state, state->srate);
1389 smrt_info_get(state, state->srate);
1390 if (smrt_set(state, state->srate) < 0) {
1392 return -1;
1396 return -1;
1398 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1400 return -1;
1402 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1403 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1405 return -1;
1409 return -1;
1413 return -1;
1415 wait_t = 7 + (10000 + state->srate / 2) / state->srate;
1421 return -EREMOTEIO;
1426 wait_t = 7 + (917504 + state->srate / 2) / state->srate;
1429 wait_t = 7 + (1048576 + state->srate / 2) / state->srate;
1432 wait_t = 7 + (1310720 + state->srate / 2) / state->srate;
1435 wait_t = 7 + (1572864 + state->srate / 2) / state->srate;
1438 wait_t = 7 + (2097152 + state->srate / 2) / state->srate;
1447 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync);
1452 wait_t = (786432 + state->srate / 2) / state->srate;
1454 wait_t = (1572864 + state->srate / 2) / state->srate;
1465 wait_t = (786432 + state->srate / 2) / state->srate;
1467 wait_t = (1572864 + state->srate / 2) / state->srate;
1471 dprintk(verbose, MB86A16_INFO, 1, "NO -- SYNC");
1473 ret = -1;
1477 dprintk(verbose, MB86A16_INFO, 1, "NO -- SIGNAL");
1478 ret = -1;
1484 freqerr_chk(state, state->frequency, state->srate, 1);
1492 ret = -EREMOTEIO;
1502 struct mb86a16_state *state = fe->demodulator_priv;
1503 int ret = -EREMOTEIO;
1516 if (cmd->msg_len > 5 || cmd->msg_len < 4) {
1517 ret = -EINVAL;
1521 for (i = 0; i < cmd->msg_len; i++) {
1522 if (mb86a16_write(state, regs, cmd->msg[i]) < 0)
1546 struct mb86a16_state *state = fe->demodulator_priv;
1569 return -EREMOTEIO;
1574 struct mb86a16_state *state = fe->demodulator_priv;
1596 return -EINVAL;
1602 return -EREMOTEIO;
1607 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1608 struct mb86a16_state *state = fe->demodulator_priv;
1610 state->frequency = p->frequency / 1000;
1611 state->srate = p->symbol_rate / 1000;
1624 struct mb86a16_state *state = fe->demodulator_priv;
1643 struct mb86a16_state *state = fe->demodulator_priv;
1664 * value with a Reed-Solomon decoder error amount at
1702 return -EREMOTEIO;
1708 struct mb86a16_state *state = fe->demodulator_priv;
1713 return -EREMOTEIO;
1716 *strength = ((0xff - agcm) * 100) / 256;
1718 *strength = (0xffff - 0xff) + agcm;
1749 { 208, 30 }
1754 struct mb86a16_state *state = fe->demodulator_priv;
1756 int low_tide = 2, high_tide = 30, q_level;
1762 return -EREMOTEIO;
1771 q_level = (*snr * 100) / (high_tide - low_tide);
1773 *snr = (0xffff - 0xff) + *snr;
1781 struct mb86a16_state *state = fe->demodulator_priv;
1785 return -EREMOTEIO;
1800 .name = "Fujitsu MB86A16 DVB-S",
1840 state->config = config;
1841 state->i2c_adap = i2c_adap;
1847 memcpy(&state->frontend.ops, &mb86a16_ops, sizeof(struct dvb_frontend_ops));
1848 state->frontend.demodulator_priv = state;
1849 state->frontend.ops.set_voltage = state->config->set_voltage;
1851 return &state->frontend;
1857 MODULE_DESCRIPTION("Fujitsu MB86A16 DVB-S/DSS DC Receiver driver");