drivers/iommu/io-pgtable-arm.c

224  *   a) 40 bits PA size with 4K: use level 1 instead of level 0 (2 tables for ias = oas)
225  *   b) 40 bits PA size with 16K: use level 2 instead of level 1 (16 tables for ias = oas)
226  *   c) 42 bits PA size with 4K: use level 1 instead of level 0 (8 tables for ias = oas)
227  *   d) 48 bits PA size with 16K: use level 1 instead of level 0 (2 tables for ias = oas)
233 	unsigned int oas = cfg->oas;
237 		return (oas == 48) || (ias == 48);
241 		return (oas == 40) || (oas == 42);
245 	       (data->start_level == 1) && (oas == 40);
567 	if (WARN_ON(iaext || paddr >> cfg->oas))
906 		if (cfg->oas > 48)
915 	cfg->oas = min(cfg->oas, max_addr_bits);
932 	if (cfg->oas > ARM_LPAE_MAX_ADDR_BITS)
1008 	switch (cfg->oas) {
1115 	switch (cfg->oas) {
1165 	if (cfg->ias > 32 || cfg->oas > 40)
1175 	if (cfg->ias > 40 || cfg->oas > 40)
1191 	if (cfg->ias > 48 || cfg->oas > 40)
1449 			/* Don't use ias > oas as it is not valid for stage-2. */
1453 				cfg.oas = address_size[j];
1455 					pgsize[i], cfg.ias, cfg.oas);