hw/mthca/mthca_qp.c

300 			int attr_mask)
302 	if (attr_mask & IB_QP_PKEY_INDEX)
304 	if (attr_mask & IB_QP_QKEY)
306 	if (attr_mask & IB_QP_SQ_PSN)
329 				  int attr_mask)
335 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
340 	if (attr_mask & IB_QP_ACCESS_FLAGS)
557 			     const struct ib_qp_attr *attr, int attr_mask,
584 	if (!(attr_mask & IB_QP_PATH_MIG_STATE))
605 	else if (attr_mask & IB_QP_PATH_MTU) {
631 	if (attr_mask & IB_QP_DEST_QPN) {
639 		if (attr_mask & IB_QP_PORT) {
646 	if (attr_mask & IB_QP_PKEY_INDEX) {
652 	if (attr_mask & IB_QP_RNR_RETRY) {
659 	if (attr_mask & IB_QP_AV) {
661 				   attr_mask & IB_QP_PORT ? attr->port_num : qp->port))
680 	if (attr_mask & IB_QP_TIMEOUT) {
685 	if (attr_mask & IB_QP_ALT_PATH) {
717 	if (attr_mask & IB_QP_RETRY_CNT) {
722 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
733 	if (attr_mask & IB_QP_SQ_PSN)
742 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
750 	if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) {
751 		qp_context->params2      |= get_hw_access_flags(qp, attr, attr_mask);
762 	if (attr_mask & IB_QP_MIN_RNR_TIMER) {
766 	if (attr_mask & IB_QP_RQ_PSN)
779 	if (attr_mask & IB_QP_QKEY) {
789 	    attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY		&&
802 	if (attr_mask & IB_QP_ACCESS_FLAGS)
804 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
806 	if (attr_mask & IB_QP_PORT)
808 	if (attr_mask & IB_QP_ALT_PATH)
812 		store_attrs(qp->sqp, attr, attr_mask);
858 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
866 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
870 	if (attr_mask & IB_QP_CUR_STATE) {
880 	new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
883 				attr_mask)) {
887 			  attr_mask);
891 	if ((attr_mask & IB_QP_PKEY_INDEX) &&
898 	if ((attr_mask & IB_QP_PORT) &&
904 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
911 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
923 	err = __mthca_modify_qp(ibqp, attr, attr_mask, cur_state, new_state,