hw/mlx4/qp.c

1943 	context->pri_path.sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | ((qp->port - 1) << 6);
1950 			context->pri_path.grh_mylmc = 0x80 | (u8) smac_index;
2101 			pri_path) + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH;
2250 			mlx4_set_sched(&context->pri_path, attr->port_num);
2266 			context->pri_path.counter_index = counter_index;
2269 				context->pri_path.fl |=
2271 				context->pri_path.vlan_control |=
2275 			context->pri_path.counter_index =
2294 			context->pri_path.disable_pkey_check = 0x40;
2295 		context->pri_path.pkey_index = attr->pkey_index;
2316 		if (mlx4_set_path(dev, attr, attr_mask, qp, &context->pri_path,
2337 		context->pri_path.ackto |= attr->timeout << 3;
2452 		context->pri_path.sched_queue = (qp->port - 1) << 6;
2456 			context->pri_path.sched_queue |= MLX4_IB_DEFAULT_QP0_SCHED_QUEUE;
2458 				context->pri_path.fl = 0x80;
2461 				context->pri_path.fl = 0x80;
2462 			context->pri_path.sched_queue |= MLX4_IB_DEFAULT_SCHED_QUEUE;
2468 				context->pri_path.feup = 1 << 7; /* don't fsm */
2485 		context->pri_path.ackto = (context->pri_path.ackto & 0xf8) |
2499 			context->pri_path.ackto = MLX4_IB_LINK_TYPE_ETH;
4060 		to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context.pri_path);
4067 	qp_attr->pkey_index = context.pri_path.pkey_index & 0x7f;
4071 		qp_attr->port_num = context.pri_path.sched_queue & 0x40 ? 2 : 1;
4082 	qp_attr->timeout	    = context.pri_path.ackto >> 3;