Lines Matching +full:hw +full:- +full:settle +full:- +full:time +full:- +full:us

1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/iio/adc/qcom-vadc-common.h>
23 #include <dt-bindings/iio/qcom,spmi-vadc.h>
74 * Conversion time varies based on the decimation, clock rate, fast average
104 * struct adc5_channel_prop - ADC channel property.
111 * @hw_settle_time: the time between AMUX being configured and the
133 * struct adc5_chip - ADC private structure.
160 return regmap_bulk_read(adc->regmap, adc->base + offset, data, len);
165 return regmap_bulk_write(adc->regmap, adc->base + offset, data, len);
170 return regmap_update_bits(adc->regmap, adc->base + offset, mask, val);
189 dev_err(adc->dev, "Invalid data:0x%x\n", *data);
190 return -EINVAL;
193 dev_dbg(adc->dev, "voltage raw code:0x%x\n", *data);
217 return -ETIMEDOUT;
225 *data |= (prop->cal_val << ADC5_USR_DIG_PARAM_CAL_VAL_SHIFT);
229 *data |= (prop->cal_method << ADC5_USR_DIG_PARAM_CAL_SEL_SHIFT);
233 *data |= (prop->decimation << ADC5_USR_DIG_PARAM_DEC_RATIO_SEL_SHIFT);
252 buf[1] |= prop->avg_samples;
255 buf[2] = prop->channel;
257 /* Select HW settle delay for channel */
259 buf[3] |= prop->hw_settle_time;
267 if (!adc->poll_eoc)
268 reinit_completion(&adc->complete);
279 ret = adc5_masked_write(adc, ADC_APP_SID, ADC_APP_SID_MASK, prop->sid);
292 buf[1] |= prop->avg_samples;
295 buf[2] = prop->channel;
297 /* Select HW settle delay for channel */
299 buf[3] |= prop->hw_settle_time;
304 if (!adc->poll_eoc)
305 reinit_completion(&adc->complete);
321 mutex_lock(&adc->lock);
325 dev_err(adc->dev, "ADC configure failed with %d\n", ret);
329 if (adc->poll_eoc) {
332 dev_err(adc->dev, "EOC bit not set\n");
336 ret = wait_for_completion_timeout(&adc->complete,
339 dev_dbg(adc->dev, "Did not get completion timeout.\n");
342 dev_err(adc->dev, "EOC bit not set\n");
350 mutex_unlock(&adc->lock);
363 mutex_lock(&adc->lock);
367 dev_err(adc->dev, "ADC configure failed with %d\n", ret);
372 wait_for_completion_timeout(&adc->complete, ADC7_CONV_TIMEOUT);
379 dev_err(adc->dev, "Unexpected conversion fault\n");
380 ret = -EIO;
387 mutex_unlock(&adc->lock);
401 complete(&adc->complete);
412 for (i = 0; i < adc->nchannels; i++)
413 if (adc->chan_props[i].channel == iiospec->args[0])
416 return -EINVAL;
425 for (i = 0; i < adc->nchannels; i++) {
426 v_channel = (adc->chan_props[i].sid << ADC_CHANNEL_OFFSET) |
427 adc->chan_props[i].channel;
428 if (v_channel == iiospec->args[0])
432 return -EINVAL;
444 prop = &adc->chan_props[chan->address];
453 ret = qcom_adc5_hw_scale(prop->scale_fn_type,
454 prop->prescale,
455 adc->data,
462 return -EINVAL;
638 struct device *dev = adc->dev;
642 return -ENOMEM;
645 name[strchrnul(name, '@') - name] = '\0';
657 if (adc->data->info == &adc7_info) {
664 return -EINVAL;
668 prop->channel = chan;
669 prop->sid = sid;
673 channel_name = data->adc_chans[chan].datasheet_name;
675 prop->channel_name = channel_name;
679 ret = qcom_adc5_decimation_from_dt(value, data->decimation);
685 prop->decimation = ret;
687 prop->decimation = ADC5_DECIMATION_DEFAULT;
690 ret = fwnode_property_read_u32_array(fwnode, "qcom,pre-scaling", varr, 2);
694 dev_err(dev, "%02x invalid pre-scaling <%d %d>\n",
698 prop->prescale = ret;
700 prop->prescale =
701 adc->data->adc_chans[prop->channel].prescale_index;
704 ret = fwnode_property_read_u32(fwnode, "qcom,hw-settle-time", &value);
720 adc->data->info == &adc7_info)
721 ret = qcom_adc5_hw_settle_time_from_dt(value, data->hw_settle_2);
723 ret = qcom_adc5_hw_settle_time_from_dt(value, data->hw_settle_1);
726 dev_err(dev, "%02x invalid hw-settle-time %d us\n",
730 prop->hw_settle_time = ret;
732 prop->hw_settle_time = VADC_DEF_HW_SETTLE_TIME;
735 ret = fwnode_property_read_u32(fwnode, "qcom,avg-samples", &value);
739 dev_err(dev, "%02x invalid avg-samples %d\n",
743 prop->avg_samples = ret;
745 prop->avg_samples = VADC_DEF_AVG_SAMPLES;
749 prop->cal_method = ADC5_RATIOMETRIC_CAL;
751 prop->cal_method = ADC5_ABSOLUTE_CAL;
755 * for every conversion will increase the overall time for a request.
757 prop->cal_val = ADC5_TIMER_CAL;
808 .compatible = "qcom,spmi-adc5",
812 .compatible = "qcom,spmi-adc7",
816 .compatible = "qcom,spmi-adc-rev2",
831 adc->nchannels = device_get_child_node_count(adc->dev);
832 if (!adc->nchannels)
833 return dev_err_probe(adc->dev, -EINVAL, "no channels defined\n");
835 adc->iio_chans = devm_kcalloc(adc->dev, adc->nchannels,
836 sizeof(*adc->iio_chans), GFP_KERNEL);
837 if (!adc->iio_chans)
838 return -ENOMEM;
840 adc->chan_props = devm_kcalloc(adc->dev, adc->nchannels,
841 sizeof(*adc->chan_props), GFP_KERNEL);
842 if (!adc->chan_props)
843 return -ENOMEM;
845 chan_props = adc->chan_props;
846 iio_chan = adc->iio_chans;
847 adc->data = device_get_match_data(adc->dev);
848 if (!adc->data)
849 adc->data = &adc5_data_pmic;
851 device_for_each_child_node_scoped(adc->dev, child) {
852 ret = adc5_get_fw_channel_data(adc, &prop, child, adc->data);
857 adc->data->adc_chans[prop.channel].scale_fn_type;
859 adc_chan = &adc->data->adc_chans[prop.channel];
861 iio_chan->channel = prop.channel;
862 iio_chan->datasheet_name = adc_chan->datasheet_name;
863 iio_chan->extend_name = prop.channel_name;
864 iio_chan->info_mask_separate = adc_chan->info_mask;
865 iio_chan->type = adc_chan->type;
866 iio_chan->address = index;
877 struct device *dev = &pdev->dev;
884 regmap = dev_get_regmap(dev->parent, NULL);
886 return -ENODEV;
894 return -ENOMEM;
897 adc->regmap = regmap;
898 adc->dev = dev;
899 adc->base = reg;
901 init_completion(&adc->complete);
902 mutex_init(&adc->lock);
910 if (irq_eoc == -EPROBE_DEFER || irq_eoc == -EINVAL)
912 adc->poll_eoc = true;
915 "pm-adc5", adc);
920 indio_dev->name = pdev->name;
921 indio_dev->modes = INDIO_DIRECT_MODE;
922 indio_dev->info = adc->data->info;
923 indio_dev->channels = adc->iio_chans;
924 indio_dev->num_channels = adc->nchannels;
931 .name = "qcom-spmi-adc5",
938 MODULE_ALIAS("platform:qcom-spmi-adc5");