iio/adc/lpc18xx_adc.c

69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch)
74 	reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW;
75 	writel(reg, adc->base + LPC18XX_ADC_CR);
77 	ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg,
80 		dev_warn(adc->dev, "adc read timed out\n");
91 	struct lpc18xx_adc *adc = iio_priv(indio_dev);
95 		mutex_lock(&adc->lock);
96 		*val = lpc18xx_adc_read_chan(adc, chan->channel);
97 		mutex_unlock(&adc->lock);
104 		*val = regulator_get_voltage(adc->vref) / 1000;
119 	struct lpc18xx_adc *adc = data;
121 	writel(0, adc->base + LPC18XX_ADC_CR);
132 	struct lpc18xx_adc *adc;
137 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
141 	adc = iio_priv(indio_dev);
142 	adc->dev = &pdev->dev;
143 	mutex_init(&adc->lock);
145 	adc->base = devm_platform_ioremap_resource(pdev, 0);
146 	if (IS_ERR(adc->base))
147 		return PTR_ERR(adc->base);
149 	adc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
150 	if (IS_ERR(adc->clk))
151 		return dev_err_probe(&pdev->dev, PTR_ERR(adc->clk),
154 	adc->vref = devm_regulator_get(&pdev->dev, "vref");
155 	if (IS_ERR(adc->vref))
156 		return dev_err_probe(&pdev->dev, PTR_ERR(adc->vref),
165 	ret = regulator_enable(adc->vref);
171 	ret = devm_add_action_or_reset(&pdev->dev, lpc18xx_regulator_disable, adc->vref);
175 	rate = clk_get_rate(adc->clk);
178 	adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) |
180 	writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR);
182 	ret = devm_add_action_or_reset(&pdev->dev, lpc18xx_clear_cr_reg, adc);
190 	{ .compatible = "nxp,lpc1850-adc" },
198 		.name = "lpc18xx-adc",